STMICROELECTRONICS EMIF03

EMIF03-SIM02F3
3-line IPAD™, EMI filter including ESD protection
Features
■
EMI symmetrical (I/O) low-pass filter
■
High efficiency in EMI filtering
■
Lead-free package
■
Very low PCB space occupation: 1.2 mm2
■
Very thin package: 0.60 mm
■
High efficiency in ESD suppression
■
High reliability offered by monolithic integration
■
High reduction of parasitic elements through
integration and wafer level packaging
Flip Chip
(8 bumps)
Figure 1.
Complies with the following standards:
■
■
■
IEC 61000-4-2 Level 4 on external and
Vcc pins:
– 15 kV (air discharge)
– 8 kV (contact discharge)
Level 1 on internal pins:
– 2 kV (air discharge)
– 2 kV (contact discharge)
Figure 2.
MIL STD 883E - Method 3015-6 Class 3
Pin layout (bump side)
3
2
1
RST
in
RST
ext
CLK
in
Gnd
CLK
ext
B
Data
in
VCC
Data
ext
C
A
Device configuration
VCC
100 Ω
RST in
CLK in
SIM interface (subscriber identity module)
■
UIM interface (universal identity module)
CLK ext
R2
100 Ω
EMI filtering and ESD protection for:
■
RST ext
R1
47 Ω
Applications
Data ext
Data in
R3
Cline = 20 pF max.
GND
Description
The EMIF03-SIM02F3 is a highly integrated
device designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic
interference.
This filter includes ESD protection circuitry which
prevents damage to the protected device when
subjected to ESD surges up to 15 kV.
TM: IPAD is a trademark of STMicroelectronics.
April 2008
Rev 3
1/9
www.st.com
9
Characteristics
1
EMIF03-SIM02F3
Characteristics
Table 1.
Symbol
VPP
Tj
Absolute maximum ratings (Tamb = 25 °C)
Parameter and test conditions
Unit
Internal pins (A3, B3, C3):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
External pins (A2, B1, C2, C1):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
15
8
Maximum junction temperature
125
°C
2
2
kV
Top
Operating temperature range
-40 to +85
°C
Tstg
Storage temperature range
-55 to 150
°C
Table 2.
Electrical characteristics (Tamb = 25 °C)
Symbol
Parameters
VBR
Breakdown voltage
IRM
Leakage current @ VRM
VRM
Stand-off voltage
VCL
Clamping voltage
IPP
Peak pulse current
RI/O
Series resistance between input
and output
Cline
I
IF
VF
VCL VBR VRM
V
IRM
IR
IPP
Input capacitance per line
Symbol
Test conditions
VBR
IR = 1 mA
IRM
VRM = 3 V
Rd
Min
Typ
6
Max
Unit
20
V
0.2
µA
1.5
Ω
R1, R3
Tolerance ± 20%
100
Ω
R2
Tolerance ± 20%
47
Ω
Cline
2/9
Value
Vline = 0 V, Vosc = 30 mV, F = 1 MHz
20
pF
EMIF03-SIM02F3
Figure 3.
0.00
Characteristics
S21 (dB) attenuation measurement Figure 4.
(A2-A3 line)
dB
0.00
-10.00
-10.00
-20.00
-20.00
-30.00
-30.00
S21 (dB) attenuation measurement
(B1-B3 line)
dB
F (Hz)
F (Hz)
-40.00
100.0k
1.0M
10.0M
100.0M
-40.00
100.0k
1.0G
1.0M
10.0M
100.0M
a2/a3
Figure 5.
0.00
1.0G
b1/b3
S21 (dB) attenuation measurement Figure 6.
(C1-C3 line)
dB
0.00
Analog crosstalk measurement
dB
-10.00
-20.00
-10.00
-30.00
-40.00
-20.00
-50.00
-60.00
-70.00
-30.00
-80.00
-90.00
F (Hz)
-40.00
100.0k
1.0M
10.0M
100.0M
-100.00
100.0k
1.0G
F (Hz)
1.0M
10.0M
Figure 7.
100.0M
1.0G
Xtalka3/b1
c1/c3
Digital crosstalk measurement
Figure 8.
Line capacitance versus reverse
applied voltage (typical)
C(pF)
18
Output Line 2
2mV/d
15
12
9
6
Input Line 1
1V/d
3
0
Bumps A3 (RSTin) and B1 (CLKout)
10ns/d
5Gs/s
0
2
4
6
VR(V)
3/9
Characteristics
Figure 9.
EMIF03-SIM02F3
Voltages when IEC 61000-4-2 (+15 kV air discharge) applied to
external pin
Vexternal: 10V/d
Vinternal: 10V/d
100ns/d
Figure 10. Voltages when IEC 61000-4-2 (- 15 kV air discharge) applied to
external pin
Vexternal: 10V/d
Vinternal: 10V/d
100ns/d
4/9
EMIF03-SIM02F3
2
Application information
Application information
Figure 11. Aplac model
c2
Lbump Rbump
a2
Lbump Rbump
100
b1
Lbump Rbump
47
c1
Lbump Rbump
100
MODEL = Dext1
MODEL = Dext3
Rbump
MODEL = Dint1
MODEL = Dext1
MODEL = Dext2
Lbump
a3
Rbump Lbump
b3
Rbump Lbump
c3
MODEL = Dint1
MODEL = Dint2
Bulk
Lbump
Rbump
Lgnd
Cgnd
Rgnd
Figure 12. Aplac parameters
aplacvar Ls 950pH
aplacvar Rs 150m
aplacvar Cext1 12pF
aplacvar Cext2 14pF
aplacvar Cext3 18pF
aplacvar Cint1 4.5pF
aplacvar Cint2 4pF
aplacvar Rbump 17m
aplacvar Lbump 43pH
aplacvar Rgnd 500m
aplacvar Lgnd 50pH
aplacvar Cgnd 0.15pF
aplacvar Rsub 100m
Dint1
BV=15
CJO=Cint1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.29
VJ=0.6
TT=50n
Dext1
BV=15
CJO=Cext1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.25
VJ=0.6
TT=50n
Dint2
BV=15
CJO=Cint2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.31
VJ=0.6
TT=50n
Dext2
BV=15
CJO=Cext2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.28
VJ=0.6
TT=50n
Dext3
BV=15
CJO=Cext3
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.25
VJ=0.6
TT=50n
5/9
Ordering information scheme
3
EMIF03-SIM02F3
Ordering information scheme
Figure 13. Ordering information scheme
EMIF
yy
-
xxx zz
Fx
EMI Filter
Number of lines
Information
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
Package
F = Flip Chip
x = 3: Lead-free, pitch = 400 µm, bump = 255 µm
4
Package information
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at
www.st.com.
Figure 14. Package dimensions
605 µm ± 55
255 µm ± 40
185 µm ± 10
1.17 mm ± 30 µm
400 µm ± 50
400 µm ± 40
6/9
185 µm ± 10
1.17 mm ± 30 µm
EMIF03-SIM02F3
Ordering information
Figure 15. Footprint
Figure 16. Marking
Dot, ST logo
xx = marking
z = manufacturing location
yww = datecode
(y = year
ww = week)
Copper pad Diameter:
220 µm recommended
260 µm maximum
E
Solder mask opening:
300 µm minimum
x x z
y ww
Solder stencil opening :
220 µm recommended
Figure 17. Flip Chip tape and reel specification
Dot identifying Pin A1 location
3.5 ± 0.1
1.27
ST E
xxz
yww
1.27
4 ± 0.1
User direction of unreeling
All dimensions in mm
Note:
ST E
xxz
yww
ST E
xxz
yww
8 ± 0.3
0.69 ± 0.05
1.75 ± 0.1
Ø 1.5 ± 0.1
4 ± 0.1
More information is available in the application notes:
AN2348: “STMicroelectronics 400 micro-metre Flip Chip: Package description and
recommendation for use”
AN1751: "EMI Filters: Recommendations and measurements"
5
Ordering information
Table 3.
Ordering information
Order code
Marking
Package
Weight
Base qty
Delivery mode
EMIF03-SIM02F3
HA
Flip Chip
1.74 mg
5000
Tape and reel 7”
7/9
Revision history
6
EMIF03-SIM02F3
Revision history
Table 4.
8/9
Document revision history
Date
Revision
Changes
19-Jul-2005
1
Initial release.
26-Feb-2007
2
Changed out to ext in Configuration diagram on page 1. Added
Ecopack statement. Reformatted to current layour standard.
Updated Application note AN2348 reference and description.
28-Apr-2008
3
Updated ECOPACK statement. Updated Figure 13, Figure 14, and
Figure 17. Reformatted to current standards.
EMIF03-SIM02F3
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