N-Channel Enhancement Mode MOSFET General Purpose Amplifier Switch CORPORATION IT1750 ABSOLUTE MAXIMUM RATINGS (TA = 25oC unless otherwise specified) FEATURES • Low ON Resistance • Low Cdg Gain • High • Low Threshold Voltage Drain-Source and Gate-Source Voltage . . . . . . . . . . . . . . 25V Peak Gate-Source Voltage (Note 1) . . . . . . . . . . . . . . . ±125V Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100mA Storage Temperature Range . . . . . . . . . . . . . -65oC to +200oC Operating Temperature Range . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering, 10sec) . . . . . . . . . . . . . +300oC Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 375mW Derate above 25oC . . . . . . . . . . . . . . . . . . . . . . . . 3mW/ oC PIN CONFIGURATION NOTE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. TO-72 ORDERING INFORMATION C D 1003 S G Part Package Temperature Range IT1750 XIT1750 Hermetic TO-72 Sorted Chips in Carriers -55oC to +150oC -55oC to +150oC ELECTRICAL CHARACTERISTICS (TA = 25oC, Body connected to Source and VBS = 0 unless otherwise specified) SYMBOL PARAMETER MIN MAX UNITS 0.50 3.0 V nA VDS = 10V, VGS = 0 V ID = 10µA, VGS = 0 VGS(th) Gate to Source Threshold Voltage IDSS Drain Leakage Current 10 IGSS Gate Leakage Current (See note 2) BVDSS Drain Breakdown Voltage rDS(on) Drain to Source on Resistance ID(on) Drain Current Yfs Forward Transadmittance Ciss Total Gate Input Capacitance Cdg Gate to Drain Capacitance 25 50 ohms TEST CONDITIONS VDS = VGS, I D = 10µA VGS = 20V 10 mA VDS = VGS =10V 3,000 µS VDS = 10V, ID = 10mA, f = 1kHz 6.0 pF ID = 10mA, VDS = 10V, f = 1MHz (Note 3) 1.6 pF VDG = 10V, f = 1MHz (Note 3) NOTES: 1. Devices must not be tested at ±125V more than once nor longer than 300ms. 2. Actual gate current is immeasurable. Package suppliers are required to guarantee a package leakage of < 10pA. External package leakage is the dominant mode which is sensitive to both transient and storage environment, which cannot be guaranteed. 3. For design reference only, not 100% tested.