CS8121
CS8121
5V, 1A Linear Regulator
with RESET and ENABLE
Description
The CS8121 is a 5V, 1A precision linear
regulator with two microprocessor
compatible control functions and protection circuitry included on chip. The
composite NPN-PNP output pass transistor assures a lower dropout voltage
(1.2V @ 1A) without requiring excessive supply current (4mA).
The CS8121’s two logic control functions make this regulator well suited to
applications requiring microprocessorbased control at the board or module
level. ENABLE controls the output
stage. A high voltage (>2.9V) on
the ENABLE lead turns off the regulator’s pass transistor and sends the IC
into Sleep mode where it draws only
Features
250µA. RESET sends a RESET signal
when the IC is powering up or whenever the output voltage falls out of regulation. The RESET signal is valid
down to VOUT = 1V.
The CS8121 design optimizes supply
rejection by switching the internal
bandgap reference from the supply
input to the regulator output as soon as
the nominal output voltage is achieved.
Additional on chip filtering enhances
rejection of high frequency transients
on all external leads.
The CS8121 is fault protected against
short circuit, over voltage and thermal
runaway conditions.
■ 5V ± 4% Output Voltage
■ Low Dropout Voltage
(1.2V @ 1A)
■ Low Quiescent Current
(4mA @ IOUT = 1A)
■ µP Compatible Control
Functions
RESET
ENABLE
■ Low Current Sleep Mode
IQ = 250µA
■ Fault Protection
Thermal Shutdown
Short Circuit
60V Peak Transient
Voltage
Package Options
Block Diagram
5 Lead TO-220
V OUT
V IN
Over
Voltage
Shutdown
-
ENABLE
Output
Current
Limit
ENABLE
Comparator
Bandgap
Supply
-
+
1 VIN
2 ENABLE
3 Gnd
V OUT(SENSE)
Error
Amplifier
+
1
VREF
Thermal
Shutdown
TO VOUT
RESET
5 Lead
TO-220
7 Lead D2PAK
Bandgap
Reference
4 RESET
5 VOUT
1 NC
2 VIN
3 ENABLE
4 Gnd
RESET
Comparator +
Gnd
1
5 RESET
6 VOUT
7 VOUT(SENSE)
ON Semiconductor
2000 South County Trail, East Greenwich, RI 02818
Tel: (401)885–3600 Fax: (401)885–5786
N. American Technical Support: 800-282-9855
Web Site: www.cherry–semi.com
May, 1999 - Rev. 6
1
CS8121
Absolute Maximum Ratings
DC Input Voltage ...........................................................................................................................................................-0.7 to 26V
Peak Transient Voltage (46V Load Dump).............................................................................................................................60V
Output Current .................................................................................................................................................Internally Limited
Electrostatic Discharge (Human Body Model) ......................................................................................................................2kV
Operating, Temperature ..........................................................................................................................................-40C to 125°C
Junction Temperature...............................................................................................................................................-40C to 150°C
Storage Temperatures.............................................................................................................................................-55°C to 150°C
Lead Temperature Soldering
Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260°C peak
Reflow (SMD styles only) ......................................................................................60 sec. max above 183°C, 230°C peak
Electrical Characteristics: IOUT = 5mA, -40°C ≤ TJ ≤150°C , 7V ≤ VIN ≤ 26V, -40°C ≤ TA ≤ 125°C unless otherwise specified
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
4.8
5.0
5.2
V
■ Output Stage
Output Voltage, VOUT
7V ≤ VIN ≤ 26V, 1mA ≤ IOUT ≤ 1A
Line Regulation
7V ≤ VIN ≤ 26V, IOUT = 5mA
0
50
mV
Load Regulation
5mA ≤ IOUT ≤ 1A
10
70
mV
Supply Voltage Rejection
VIN = 14VDC + 1VRMS
@120Hz, ILOAD = 50Ω
Dropout Voltage
IOUT = 1A
1.2
1.8
V
Quiescent Current
ENABLE = High, VIN = 12V
ENABLE = Low, IOUT = 1A
0.25
4
0.65
20
mA
mA
54
70
dB
■ Protection Circuits
Short Circuit Current
1.5
A
Thermal Shutdown
150
190
°C
Overvoltage Shutdown
26
40
V
■ RESET
RESET Saturation Voltage
1V < VOUT < VRT(OFF), 3.1kΩ pull-up
to VOUT
RESET Output Leakage
Current
ENABLE = Low
VOUT > VRT(ON), V RESET = VOUT
Power ON/OFF RESET
Peak Output Voltage
3.1kΩ pull-up to VOUT
RESET Threshold ON
(VOUT Increasing)
RESET Threshold OFF
(VOUT Decreasing)
RESET Threshold Hysteresis
0.1
0.4
V
0
25
µA
0.7
1.0
V
VOUT - 0.10
VOUT - 0.04
V
4.75
VOUT - 0.14
V
10
40
mV
■ ENABLE
Input High Voltage
7V < VIN < 26V
2.9
Input Low Voltage
7V < VIN < 26V
1.1
2.1
Input Hysteresis
7V < VIN < 26V
0.4
0.8
2.8
V
Input Current
Gnd < VIN(HI) < VOUT
0
±10
µA
2
3.9
V
V
CS8121
Package Lead Description
PACKAGE LEAD #
7 Lead
D2PAK
LEAD SYMBOL
FUNCTION
5 Lead TO-220
1
NC
No Connection.
2
1
VIN
Supply voltage to IC, usually direct from the battery.
3
2
ENABLE
CMOS compatible logical. VOUT is disabled i.e. placed in a
high impedance state when ENABLE is high.
4
3
Gnd
Ground connection.
5
4
RESET
CMOS compatible output lead. RESET goes low whenever
VOUT falls out of regulation. The RESET delay is externally
programmed.
6
5
7
VOUT
Regulated output voltage, 5V (typ).
VOUT(SENSE)
Remote sensing of output voltage.
Typical Performance Characteristics
Output Voltage vs. Temperature
Load Regulation vs. Output Current Over Temperature
5.02
0
IOUT = 100mA
–40°C
-5
5.00V @ 25˚C
-10
5
4.99
4.98
4.97
25°C
125°C
-15
Load Reg. (mV)
VOUT (V)
5.01
-20
-25
-30
-35
-40
4.96
4.95
-40
VIN =14V
-45
-20
0
20
40
60
80
100
-50
120 140 150
0
Junction Temperature (˚C)
200
400
600
800
1A
IOUT (A)
Dropout Voltage vs. Output Current Over Temperature
Line Regulation vs. Output Current Over Temperature
50
1.5
VIN = 7 to 26V
1.4
40
1.3
1.1
30
20
125˚C
Dropout Voltage (V)
Line Reg. (mV)
1.2
25˚C
10
1.0
0.9
-40°C
0.8
25°C
0.7
125°C
0.6
0.5
-40˚C
0.4
0
0.3
0.2
0.1
0.0
-10
0
0.2
0.4
0.6
0.8
1A
0
IOUT(A)
0.1
0.2
0.3
0.4
0.5
0.6
IOUT (A)
3
0.7
0.8
0.9
1.0
CS8121
Typical Performance Characteristics: continued
3.5
3.0
-40°C
VOUT
4.0
2.5
VOUT(V)
Quiescent Current (mA)
22.0
20.0
5.5
5.0
25°C
2.0
125°C
1.5
16.0
3.0
12.0
IQ
2.0
8.0
1.0
4.0
1.0
Supply Current (mA)
Output Voltage and Supply Current vs. Input Voltage
Quiescent Current vs. Output Current Over Temperature
0.5
0.0
VIN = 14V
0.0
0.0
0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
2.0
1.0
4.0
6.0
8.0
0.0
10.0
Supply Voltage
IOUT
RESET Output Voltage vs. Output Current
2000
Reset Output Voltage (mV)
1800
VIN = 5V
1600
1400
1200
1000
800
600
400
200
0
1
5
10
15
20
25
30
35
40
Reset Output Current (mA)
Circuit Description
The NPN pass device prevents deep saturation of the output
stage which in turn improves the IC’s efficiency by preventing excess current from being used and dissipated by the IC.
Voltage Reference and Output Circuitry
Precision Voltage Reference
The regulated output voltage depends on the precision
band gap voltage reference in the IC. By adding an error
amplifier into the feedback loop, the output voltage is
maintained within ±4% over temperature and supply variation.
Output Stage Protection
The output stage is protected against overvoltage, short
circuit and thermal runaway conditions (Figure 2).
> 30V
VIN
Output Stage
The composite PNPNPN output structure
(Figure 1) provides 1A
(typ) of output current
while maintaining a
low drop out voltage
(1.2V) and drawing little quiescent current
(4mA).
VIN
VOUT
IOUT
VOUT
Load
Dump
Figure 1. Composite Output Stage of the CS8121
Short
Circuit
Thermal
Shutdown
Figure 2. Typical Circuit Waveforms for Output Stage Protection.
4
If the input voltage rises above 30V (e.g. load dump), the
output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage
transients.
Using an emitter sense scheme, the amount of current
through the NPN pass transistor is monitored. Feedback
circuitry insures that the output current never exceeds a
preset limit.
Should the junction temperature of the power device
exceed 180°C (typ) the power transistor is turned off.
Thermal shutdown is an effective means to prevent die
overheating since the power transistor is the principle
heat source in the IC.
RESET Function
A RESET signal (low voltage) is generated as the IC powers up (VOUT > VOUT - 100mV) or when VOUT drops out of
regulation (VOUT < VOUT - 140mV, typ). 40mV of hysteresis
is included in the function to minimize oscillations.
The RESET output is an open collector NPN transistor,
controlled by a low voltage detection circuit. The circuit is
functionally independent of the rest of the IC, thereby
guaranteeing that the RESET signal is valid for VOUT as
low as 1V.
An external RC network on the RESET lead (Figure 4) provides a sufficiently long delay for most microprocessor
based applications. RC values can be chosen using the
following formula:
–tDelay
RTOT × CRST
[
Regulator Control Functions
The CS8121 contains two microprocessor compatible control functions: ENABLE and RESET (Figure 3).
ln
(
VT – VOUT
VRST – VOUT
)]
FOR 7V < VIN < 26V
where:
RTOT
RIN
CRST
tDelay
VIN
ENABLE
HI
VIN(HI)
LO
VRT(ON)
= RRST in parallel with RIN,
= µP port impedance,
= RESET delay capacitor,
VRST
= desired delay time,
= VSAT of RESET lead (0.7V @ turn - on), and
VT
= µP logic threshold voltage.
VRT(OFF)
VOUT
(1)
VR
RESET
VOUT
(2)
PEAK
VR
VR
PEAK
SAT
CS8121
(1) = NO RESET DELAY CAPACITOR
(2) = WITH RESET DELAY CAPACITOR
RRST
to µP
RESET
Port
RESET
Figure 3. Circuit Waveforms for the CS8121
CRST
ENABLE Function
The ENABLE function switches the output transistor.
When the voltage on the ENABLE lead exceeds 2.9V typ,
the output pass transistor turns off, leaving a high
impedance facing the load. The IC will remain in Sleep
mode, drawing only 250µA, until the voltage on the lead
drops below 2.1V typ. Hysteresis (800mV) is built into the
ENABLE function to provide good noise immunity.
Figure 4. RC Network for RESET Delay
5
10µF
tantalum
5V to µP
and
System
Power
CS8121
Circuit Description: continued
CS8121
Applications Notes
VIN
VBAT
C1
0.1µF
VOUT
CS8121
500kΩ
ENABLE
SWITCH
Gnd
VCC
C2
10µF
RRST
µP
RESET
RESET
I/O Port
CRST
Q1
100kΩ
100kΩ
500kΩ
Figure 5. Microprocessor control of CS8121 using external switching transistor Q1.
The circuit depicted in Figure 5 lets the microprocessor
control its power source, the CS8121 regulator. An I/O
port on the µP and the SWITCH port are used to drive the
base of Q1. When Q1 is driven into saturation, the voltage
on the ENABLE lead falls below its lower threshold and
the regulator’s output is switched on. When the drive current is removed, the voltage on the ENABLE lead rises,
the output is switched off and the IC moves into Sleep
mode where it typically draws 250µA.
By coupling these two controls with ENABLE , the system
has added flexibility. Once the system is running, the
state of the SWITCH is irrelevant as long as the I/O port
continues to drive Q1. The µP can turn off its own power
by withdrawing drive current, once the SWITCH is open.
This software control at the I/O port allows the µP to finish key housekeeping functions before power is removed.
The logic options are summarized in Table 1 below
expensive solution, but, if the circuit operates at low
temperatures (-25°C to -40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information.
The value for the output capacitor C2 shown in the test
and applications circuit should work for most applications, however it is not necessarily the optimized solution.
To determine an acceptable value for C2 for a particular
application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part.
Step 1: Place the completed circuit with a tantalum
capacitor of the recommended value in an environmental
chamber at the lowest specified operating temperature
and monitor the outputs with an oscilloscope. A decade
box connected in series with the capacitor will simulate
the higher ESR of an aluminum capacitor. Leave the
decade box outside the chamber, the small resistance
added by the longer leads is negligible.
Step 2: With the input voltage at its maximum value,
increase the load current slowly from zero to full load
while observing the output for any oscillations. If no
oscillations are observed, the capacitor is large enough to
ensure a stable design under steady state conditions.
Step 3: Increase the ESR of the capacitor from zero using
the decade box and vary the load current until oscillations
appear. Record the values of load current and ESR that
cause the greatest oscillation. This represents the worst
case load conditions for the regulator at low temperature.
Step 4: Maintain the worst case load conditions set in
step 3 and vary the input voltage until the oscillations
increase. This point represents the worst case input voltage conditions.
Step 5: If the capacitor is adequate, repeat steps 3 and 4
with the next smaller valued capacitor. A smaller capacitor will usually cost less and occupy less board space. If
the output oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger
standard capacitor value.
Table 1: Logic Control of CS8121 Output
µP I/O drive
SWITCH ENABLE
Output
ON
Closed
LOW
ON
Open
LOW
ON
OFF
Closed
LOW
ON
Open
HIGH
OFF
The I/O port of the µP typically provides 50 µA to Q1. In
automotive applications the SWITCH is connected to the
ignition switch.
Stability Considerations
The output or compensation capacitor C2 helps determine
three main characteristics of a linear regulator: start-up
delay, load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum
or aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least
6
CS8121
Application Notes: continued
VIN
5V to µP and
System
Power
VOUT
C1*
0.1µF
CS8121
C2**
10µF
RRST
to µP
RESET
Port
RESET
ENABLE
CRST
C1*required if regulator is located far from
the power supply filter.
C2** required for stability.
Figure 6: Test and application circuit showing output compensation.
Step 6: Test the load transient response by switching in
various loads at several frequencies to simulate its real
working environment. Vary the ESR to reduce ringing.
Step 7: Remove the unit from the environmental chamber
and heat the IC with a heat gun. Vary the load current as
instructed in step 5 to test for any oscillations.
Once the minimum capacitor value with the maximum
ESR is found, a safety factor should be added to allow for
the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic
capacitors have a tolerance of +/- 20% so the minimum
value found should be increased by at least 50% to allow
for this tolerance plus the variation which will occur at
low temperatures. The ESR of the capacitor should be less
than 50% of the maximum allowable ESR found in step 3
above.
where:
VIN(max) is the maximum input voltage,
VOUT(min) is the minimum output voltage,
IOUT(max) is the maximum output current for the application, and
IQ is the quiescent current the regulator consumes at
IOUT(max).
Once the value of PD(max) is known, the maximum permissible value of RΘJA can be calculated:
RΘJA =
150°C - TA
PD
(2)
The value of RΘJA can then be compared with those in
the package section of the data sheet. Those packages
with RΘJA's less than the calculated value in equation 2
will keep the die temperature below 150°C.
Calculating Power Dissipation
in a Single Output Linear Regulator
In some cases, none of the packages will be sufficient to
dissipate the heat generated by the IC, and an external
heatsink will be required.
The maximum power dissipation for a single output regulator (Figure 7) is:
PD(max) = {VIN(max) - VOUT(min)}IOUT(max) + VIN(max)IQ
(1)
Heat Sinks
A heat sink effectively increases the surface area of the
package to improve the flow of heat away from the IC
and into the surrounding air.
IIN
VIN
Smart
Regulator
}
Each material in the heat flow path between the IC and
the outside environment will have a thermal resistance.
Like series electrical resistances, these resistances are
summed to determine the value of RΘJA:
IOUT
VOUT
RΘJA = RΘJC + RΘCS + RΘSA
Control
Features
(3)
where:
RΘJC = the junction–to–case thermal resistance,
RΘCS = the case–to–heatsink thermal resistance, and
RΘSA = the heatsink–to–ambient thermal resistance.
RΘJC appears in the package section of the data sheet. Like
RΘJA, it too is a function of package type. RΘCS and RΘSA
are functions of the package type, heatsink and the interface between them. These values appear in heat sink data
sheets of heat sink manufacturers.
IQ
Figure 7: Single output regulator with key performance parameters
labeled.
7
CS8121
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES)
PACKAGE THERMAL DATA
Thermal Data
5 Lead TO-220 (T) Straight
10.54 (.415)
9.78 (.385)
2.87 (.113)
6.55 (.258) 2.62 (.103)
5.94 (.234)
RΘJC
RΘJA
1.40 (.055)
1.14 (.045)
4.83 (.190)
4.06 (.160)
typ
typ
5 Lead
TO-220
7 Lead
D2PAK
2.5
50
2.5
10-50*
°C/W
°C/W
*Depending on thermal properties of substrate, RΘJA = RΘJC + RΘCA.
3.96 (.156)
3.71 (.146)
5 Lead TO-220 (TVA) Vertical
14.99 (.590)
14.22 (.560)
4.83 (.190)
4.06 (.160)
10.54 (.415)
9.78 (.385)
3.96 (.156)
3.71 (.146)
1.40 (.055)
1.14 (.045)
6.55 (.258)
5.94 (.234)
14.22 (.560)
13.72 (.540)
2.87 (.113)
2.62 (.103)
14.99 (.590)
14.22 (.560)
1.02 (.040)
0.76 (.030)
1.78 (.070)
0.56 (.022)
0.36 (.014)
1.83(.072)
1.57(.062)
1.02(.040)
0.63(.025)
6.93(.273)
6.68(.263)
2.92 (.115)
2.29 (.090)
8.64 (.340)
7.87 (.310)
2.92 (.115)
2.29 (.090)
4.34 (.171)
1.68
(.066) typ
1.70 (.067)
0.56 (.022)
0.36 (.014)
7.51 (.296)
7 Lead D2PAK (DPS)* Short-Leaded
1.68 (.066)
1.40 (.055)
8.53 (.336)
8.28 (.326)
6.80 (.268)
1.40 (.055)
1.14 (.045)
10.31 (.406)
10.05 (.396)
.94 (.037)
.69 (.027)
2.79 (.110)
2.54 (.100)
14.71 (.579)
13.69 (.539)
1.98 (.078)
1.47 (.058)
0.91 (.036)
0.66 (.026)
TERMINAL 8
1.27 (.050)
REF
.254 (.010)
REF
6.50 (.256) REF
4.57 (.180)
4.31 (.170)
7.75 (.305)
REF
0.10 (.004)
0.00 (.000)
*ON SEMICONDUCTOR SHORT-LEADED FOOTPRINT
Ordering Information
Part Number
CS8121YT5
CS8121YTVA5
CS8121YTHA5
CS8121YDPS7
CS8121YDPSR7
Description
5 Lead TO-220 Straight
5 Lead TO-220 Vertical
5 Lead TO-220 Horizontal
7 Lead D2PAK Short-Leaded
7 Lead D2PAK Short-Leaded
(tape & reel)
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Semiconductor reserves the right to make changes without
further notice to any products herein. For additional information and the latest available information, please contact
your local ON Semiconductor representative.
8
© Semiconductor Components Industries, LLC, 2000