TI TS3A4741DGKR

TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
www.ti.com
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
FEATURES
APPLICATIONS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
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Low ON-State Resistance (ron)
– 0.9 Ω Max (3-V Supply)
– 1.5 Ω Max (1.8-V Supply)
0.4-Ω Max ron Flatness (3-V Supply)
1.6-V to 3.6-V Single-Supply Operation
Available in SOT-23 and MSOP Packages
High Current-Handling Capacity (100 mA
Continuous)
1.8-V CMOS Logic Compatible (3-V Supply)
Fast Switching: tON = 14 ns, tOFF = 9 ns
Power Routing
Battery-Powered Systems
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Communications Circuits
PCMCIA Cards
Cellular Phones
Modems
Hard Drives
DCN PACKAGE
(TOP VIEW)
DGK PACKAGE
(TOP VIEW)
NO1 1
COM1 2
8 V+
IN1
1
8
NO1
7 IN1
V+
2
7
COM1
6 COM2
IN2 3
5 NO2
GND 4
NO2 3
COM2 4
6 IN2
5
GND
DESCRIPTION/ORDERING INFORMATION
The TS3A4741 is a low ON-state resistance (ron), low-voltage, dual single-pole/single-throw (SPST) analog
switch that operates from a single 1.6-V to 3.6-V supply. This device has fast switching speeds, handles
rail-to-rail analog signals, and consumes very low quiescent power.
The digital logic input is 1.8-V CMOS compatible when using a single 3-V supply.
The TS3A4741 has two normally open (NO) switches that are available in 8-pin SOT-23 and MSOP packages.
ORDERING INFORMATION
PACKAGE (1)
TA
–40°C to 85°C
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
MSOP – DGK
Reel of 2500
TS3A4741DGKR
JYR
SOT-23 – DCN
Reel of 3000
TS3A4741DCNR
TBD
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
IN
NO TO COM,
COM TO NO
L
OFF
H
ON
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
www.ti.com
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
Absolute Minimum and Maximum Ratings (1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
V+
Supply voltage reference to GND (2)
–0.3
4
V
VNO
VCOM
VIN
Analog and digital voltage range
–0.3
V+ + 0.3
V
INO
ICOM
On-state switch current
–100
100
mA
I+
IGND
Continuous current through V+ or GND
±100
mA
±200
mA
VNO, VCOM = 0 to V+
Peak current pulsed at 1 ms, 10% duty cycle
θJA
Package thermal impedance (3)
TA
Operating temperature range
TJ
Junction temperature
Tstg
Storage temperature range
(1)
(2)
(3)
2
COM, VNO, VCOM
DCN package
88
DGK package
88
–40
–65
UNIT
°C/W
85
°C
150
°C
150
°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Signals on COM or NO exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to maximum current rating.
The package thermal impedance is measured in accordance with JESD 51-7.
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
www.ti.com
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
Electrical Characteristics for 3-V Supply
(1) (2)
V+ = 2.7 V to 3.6 V, TA = –40°C to 85°C, VIH = 1.4 V, VIL = 0.5 V (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
MIN
TYP (3)
MAX
UNIT
Analog Switch
Analog signal range
VCOM, VNO
ON-state resistance
ron
V+ = 2.7 V, ICOM = –100 mA,
VNO = 1.5 V
25°C
∆ron
V+ = 2.7 V, ICOM = –100 mA,
VNO = 1.5 V
25°C
ron(flat)
V+ = 2.7 V, ICOM = –100 mA,
VNO = 1 V, 1.5 V, 2 V
25°C
ON-state resistance match
between channels (4)
ON-state resistance
flatness (5)
0
V+
0.7
Full
0.9
1.1
0.03
Full
0.05
0.15
0.23
Full
0.4
0.5
NO
OFF leakage current (6)
INO(OFF)
V+ = 3.6 V, VCOM = 0.3 V, 3 V,
VNO = 3 V, 0.3 V
25°C
–2
Full
–18
COM
OFF leakage current (6)
ICOM(OFF)
V+ = 3.6 V, VCOM = 0.3 V, 3 V,
VNO = 3 V, 0.3 V
25°C
–2
Full
–18
COM
ON leakage current (6)
ICOM(ON)
V+ = 3.6 V, VCOM = 0.3 V, 3 V,
VNO = 0.3 V, 3 V, or floating
25°C
–2.5
Full
–5
1
2
18
1
2
18
0.01
2.5
5
V
Ω
Ω
Ω
nA
nA
nA
Dynamic
Turn-on time
tON
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
25°C
Turn-off time
tOFF
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
25°C
Charge injection
QC
VGEN = 0, RGEN = 0, CL = 1 nF,
See Figure 15
25°C
3
pC
CNO(OFF)
f = 1 MHz, See Figure 16
25°C
23
pF
COM OFF capacitance
CCOM(OFF)
f = 1 MHz, See Figure 16
25°C
20
pF
COM ON capacitance
CCOM(ON)
f = 1 MHz, See Figure 16
25°C
43
pF
25°C
125
MHz
NO OFF capacitance
Bandwidth
BW
RL = 50 Ω, Switch ON
OFF isolation (7)
OISO
RL = 50 Ω, CL = 5 pF,
See Figure 17
f = 10 MHz
Crosstalk
XTALK
RL = 50 Ω, CL = 5 pF,
See Figure 17
f = 10 MHz
Total harmonic distortion
THD
f = 20 Hz to 20 kHz,
VCOM = 2 VP-P
f = 1 MHz
f = 1 MHz
RL = 32 Ω
RL = 600 Ω
5
Full
14
15
4
Full
9
10
–40
25°C
–73
dB
–95
0.04
25°C
ns
dB
–62
25°C
ns
%
0.003
Digital Control Inputs (IN1, IN2)
Input logic high
VIH
Full
Input logic low
VIL
Full
Input leakage current
IIN
VI = 0 or V+
1.4
25°C
Full
V
0.5
0.5
–20
1
20
V
nA
Supply
Power-supply range
Positive-supply current
(1)
(2)
(3)
(4)
(5)
(6)
(7)
V+
I+
1.6
V+ = 3.6 V, VIN = 0 or V+
3.6
25°C
0.075
Full
0.75
V
µA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
Parts are tested at 85°C and specified by design and correlation over the full temperature range.
Typical values are at V+ = 3 V, TA = 25°C.
∆ron = ron(max) – ron(min)
Flatness is defined as the difference between the maximum and minimum value of ron as measured over the specified analog signal
ranges.
Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at TA = 25°C.
OFF isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to OFF switch
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
www.ti.com
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
Electrical Characteristics for 1.8-V Supply (1) (2)
V+ = 1.65 V to 1.95 V, TA = –40°C to 85°C, VIH = 1 V, VIL = 0.4 V (unless otherwise noted)
PARAMETER
SYMBOL
TEST CONDITIONS
TA
MIN
TYP (3)
MAX
UNIT
Analog Switch
Analog signal range
VCOM, VNO
ON-state resistance
ron
V+ = 1.8 V, ICOM = –10 mA,
VNO = 0.9 V
25°C
∆ron
V+ = 1.8 V, ICOM = –10 mA,
VNO = 0.9 V
25°C
ron(flat)
V+ = 1.8 V, ICOM = –10 mA,
0 ≤ VNO ≤ V+
25°C
ON-state resistance match
between channels (4)
ON-state resistance
flatness (5)
0
V+
1
Full
1.5
2
0.09
Full
0.15
0.25
0.7
Full
0.9
1.5
NO
OFF leakage current (6)
INO(OFF)
V+ = 1.95 V, VCOM = 0.15 V, 1.65 V,
VNO = 1.8 V, 0.15 V
25°C
–1
Full
–10
COM
OFF leakage current (6)
ICOM(OFF)
V+ = 1.95 V, VCOM = 0.15 V, 1.65 V,
VNO = 1.8 V, 0.15 V
25°C
–1
Full
–10
COM
ON leakage current (6)
ICOM(ON)
V+ = 1.95 V, VCOM = 0.15 V, 1.65 V,
VNO = 0.15 V, 1.65 V, or floating
25°C
–1
Full
–3
0.5
1
10
0.5
1
10
0.01
1
3
V
Ω
Ω
Ω
nA
nA
nA
Dynamic
Turn-on time
tON
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
25°C
Turn-off time
tOFF
VNO = 1.5 V, RL = 50 Ω,
CL = 35 pF, See Figure 14
25°C
Charge injection
QC
VGEN = 0, RGEN = 0, CL = 1 nF,
See Figure 15
25°C
3.2
pC
CNO(OFF)
f = 1 MHz, See Figure 16
25°C
23
pF
COM OFF capacitance
CCOM(OFF)
f = 1 MHz, See Figure 16
25°C
20
pF
COM ON capacitance
CCOM(ON)
f = 1 MHz, See Figure 16
25°C
43
pF
25°C
123
MHz
NO OFF capacitance
6
Full
20
5
Full
Bandwidth
BW
RL = 50 Ω, Switch ON
OFF isolation (7)
OISO
RL = 50 Ω, CL = 5 pF,
See Figure 17
f = 10 MHz
Crosstalk
XTALK
RL = 50 Ω, CL = 5 pF,
See Figure 17
f = 10 MHz
Total harmonic distortion
THD
f = 20 Hz to 20 kHz, VCOM
= 2 VP-P
f = 100 MHz
f = 100 MHz
RL = 32 Ω
RL = 600 Ω
18
10
12
–61
25°C
–95
dB
–73
0.14
25°C
ns
dB
–36
25°C
ns
%
0.013
Digital Control Inputs (IN1, IN2)
Input logic high
VIH
Full
Input logic low
VIL
Full
Input leakage current
IIN
VI = 0 or V+
1
25°C
Full
V
0.4
0.1
5
–10
10
1.6
1.95
V
nA
Supply
Power-supply range
Positive-supply current
(1)
(2)
(3)
(4)
(5)
(6)
(7)
4
V+
I+
VI = 0 or V+
25°C
0.05
Full
0.5
V
µA
The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum.
Parts are tested at 85°C and specified by design and correlation over the full temperature range.
Typical values are at TA = 25°C.
∆ron = ron(max) – ron(min)
Flatness is defined as the difference between the maximum and minimum value of ron as measured over the specified analog signal
ranges.
Leakage parameters are 100% tested at the maximum-rated hot operating temperature and specified by correlation at TA = 25°C.
OFF isolation = 20log10 (VCOM/VNO), VCOM = output, VNO = input to OFF switch
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
www.ti.com
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
TYPICAL PERFORMANCE
1.6
1.6
1.4
1.4
1.2
255C
1.2
V+ = 1.8 V
1.0
ron (W)
1.0
ron (Ω)
855C
0.8
0.6
V+ = 2.7 V
0.8
0.4
0.4
0.2
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
–405C
0.6
0.0
0.0
0.5
2.0
Figure 2. ron vs VCOM (V+ = 1.8 V)
1000.00
855C
NO/NC (OFF)
INC/ICOM (pA)
ron (W)
Figure 1. ron vs VCOM
255C
0.5
0.4
0.3
–405C
0.2
0.1
0.0
0.0
100.00
1.00
0.5
1.0
1.5
VCOM (V)
2.0
2.5
−40°C
3.0
25°C
TA (°C)
85°C
Figure 4. ION and IOFF vs Temperature
(V+ = 3.6 V)
8
35
30
7
V+ = 3 V
6
tON/tOFF (ns)
25
20
15
V+ = 1.8 V
10
5
tON
4
3
tOFF
2
5
0
0.0
COM (ON)
10.00
Figure 3. ron vs VCOM (V+ = 2.7 V)
QC (pC)
1.5
VCOM (V)
VCOM (V)
1.0
0.9
0.8
0.7
0.6
1.0
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
0
1.6
VCOM (V)
2.0
2.4
2.8
3.2
3.6
4.0
V+ (V)
Figure 5. QC vs VCOM
Figure 6. tON and tOFF vs Supply Voltage
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
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SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
TYPICAL PERFORMANCE (continued)
7
1000.000
6
855C
100.000
255C
10.000
4
I+ (nA)
tON/tOFF (ns)
5
TON = 1.8 V
TOFF = 1.8 V
TON = 3 V
TOFF = 3 V
3
2
1.000
–405C
0.100
1
0.010
0
−40°C
25°C
TA (°C)
0.001
0.0
85°C
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V+ (V)
Figure 7. tON and tOFF vs Temperature
Figure 8. I+ vs V+
0
0
−2
−10
−20
Attenuation (dB)
Gain (dB)
−4
−6
−8
−10
−30
−40
−50
−60
−70
−12
−80
−14
−90
0.1
1
10
Frequency (MHz)
100
1000
0.1
Figure 9. Gain vs Frequency (V+ = 3 V)
1
10
Frequency (MHz)
100
1000
Figure 10. OFF Isolation vs Frequency
(V+ = 3 V)
0.042
0.0040
0.0036
0.041
0.0032
0.0028
THD (%)
THD (%)
0.040
0.039
0.038
0.0024
0.0020
0.0016
0.0012
0.0008
0.037
0.0004
0.036
0
10
100
1K
Frequency (kHz)
10K
100K
Figure 11. Total Harmonic Distortion vs Frequency
(RL = 32 Ω)
6
0.0000
0
10
100
1K
Frequency (kHz)
10K
100K
Figure 12. Total Harmonic Distortion vs Frequency
(RL = 600 Ω)
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TYPICAL PERFORMANCE (continued)
0
−20
Attenuation (dB)
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
−40
−60
−80
−100
−120
0
0.1
1
10
Frequency (MHz)
100
1000
Figure 13. Crosstalk vs Frequency
(V+ = 3 V)
PIN DESCRIPTION
PIN NO.
NAME
DESCRIPTION
MSOP
SOT-23
1
8
NO1
2
7
COM1
3
6
IN2
4
5
GND
Digital ground
5
3
NO2
Normally open 2
6
4
COM2
7
1
IN1
Digital control to connect COM1 to NO1
8
2
V+
Power supply
Normally open 1
Common 1
Digital control to connect COM2 to NO2
Common 2
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
www.ti.com
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
Application Information
Proper power-supply sequencing is recommended for all CMOS devices. Do not exceed the absolute maximum
ratings, because stresses beyond the listed ratings can cause permanent damage to the device. Always
sequence V+ on first, followed by NO, NC, or COM.
Although it is not required, power-supply bypassing improves noise margin and prevents switching noise
propagation from the V+ supply to other components. A 0.1-µF capacitor, connected from V+ to GND, is
adequate for most applications.
Logic Inputs
The TS3A4741 logic inputs can be driven up to 3.6 V, regardless of the supply voltage. For example, with a
1.8-V supply, IN may be driven low to GND and high to 3.6 V. Driving IN rail to rail minimizes power
consumption.
Analog Signal Levels
Analog signals that range over the entire supply voltage (V+ to GND) can be passed with very little change in ron
(see Typical Operating Characteristics). The switches are bidirectional, so the NO, NC, and COM pins can be
used as either inputs or outputs.
Layout
High-speed switches require proper layout and design procedures for optimum performance. Reduce stray
inductance and capacitance by keeping traces short and wide. Ensure that bypass capacitors are as close to the
device as possible. Use large ground planes where possible.
8
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
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SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
PARAMETER MEASUREMENT INFORMATION
V+
V+
IN
NO
VIH + 0.5 V
VNO
IN
VNO
VCOM
a
50 W
GND
35 pF
50%
50%
0
VCOM
COM
tR < 5 ns
tF < 5 ns
90%
90%
0
tON
tOFF
Figure 14. Switching Times
V+
V+
RGEN
NO
VGEN
VI
IN
a
VI
VO
COM
GND
CL
1000 pF
V+
0
VO
DVO
Figure 15. Charge Injection (QC)
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
V+
V+
NO
1-MHz
Capacitance
Analyzer
As
Required
IN
COM
GND
Figure 16. NO and COM Capacitance
V+
0.1 mF
Network
Analyzer
V+
VI
50 W
50 W
Meas
Ref
NO
(1)
VO
V+
IN
COM
GND
50 W 50 W
OFF isolation = 20 log VO/VI
Measurements are standardized against
short at socket terminals. OFF isolation is
measured between COM and OFF terminals
on each switch. Bandwidth is measured between
COM and ON terminals on each switch. Signal (1)Add 50-W termination for
direction through switch is reversed; worst
OFF isolation
values are recorded.
Figure 17. OFF Isolation, Bandwidth, and Crosstalk
10
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TS3A4741
0.9-Ω LOW-VOLTAGE SINGLE-SUPPLY DUAL SPST ANALOG SWITCH
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SCDS228B – AUGUST 2006 – REVISED SEPTEMBER 2006
PARAMETER MEASUREMENT INFORMATION (continued)
VI = V+/2
fSOURCE = 20 Hz to 20 kHz
Channel ON: COM to NO
VSOURCE = V+ P-P
CL = 50 pF
RL = 600 W
V+/2
Audio Analyzer
NO
Signal
Source
600 W
COM
CL(A)
IN
600 W
-V+/2
A.
CL includes probe and jig capacitance.
Figure 18. Total Harmonic Distortion (THD)
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PACKAGE OPTION ADDENDUM
www.ti.com
5-Feb-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
TS3A4741DGKR
ACTIVE
MSOP
DGK
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TS3A4741DGKRG4
ACTIVE
MSOP
DGK
8
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
IMPORTANT NOTICE
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Amplifiers
amplifier.ti.com
Audio
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
www.ti.com/broadband
Interface
interface.ti.com
Digital Control
www.ti.com/digitalcontrol
Logic
logic.ti.com
Military
www.ti.com/military
Power Mgmt
power.ti.com
Optical Networking
www.ti.com/opticalnetwork
Microcontrollers
microcontroller.ti.com
Security
www.ti.com/security
Low Power Wireless
www.ti.com/lpw
Telephony
www.ti.com/telephony
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www.ti.com/video
Wireless
www.ti.com/wireless
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