PRELIMINARY FPD10000AF 10W PACKAGED POWER PHEMT • • PERFORMANCE (1.8 GHz) ♦ 40 dBm Output Power (P1dB) ♦ 11 dB Power Gain (G1dB) ♦ -44 dBc WCDMA ACPR at 30 dBm output power ♦ 180 to 300 mA typical quiescent current (IDQ) ♦ 55% Power-Added Efficiency ♦ Evaluation Boards Available ♦ Additional Design Data Available on Website ♦ Usable Gain to 3.8GHz SEE PACKAGE OUTLINE FOR MARKING CODE DESCRIPTION AND APPLICATIONS The FPD10000AF is a packaged depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT), optimized for power applications in L-Band. The high power flangemount package has been optimized for low electrical parasitics and optimal heatsinking. Typical applications include drivers or output stages in PCS/Cellular base station transmitter amplifiers, as well as other power applications in WLL/WLAN amplifiers. • ELECTRICAL SPECIFICATIONS AT 22°C Parameter Symbol Test Conditions Min Typ Max Units RF SPECIFICATIONS MEASURED AT f = 1.8 GHz USING CW SIGNAL Power at 1dB Gain Compression P1dB VDS = 12V; IDQ = 180 mA 40 dBm G1dB VDS = 12V; IDQ = 180 mA 10 dB VDS = 12V; IDQ = 300 mA 11 VDS = 12 V; IDQ = 180 mA 16.5 VDS = 12 V; IDQ = 300 mA 18.0 VDS = 12V; IDQ = 180 mA 55 % Class B Operation Power Gain at dB Gain Compression Maximum Stable Gain: S21/S12 MSG PIN = 0dBm, 50Ω system Power-Added Efficiency PAE at 1dB Gain Compression IRF (drive-up current) ~ 1.5A Adjacent Channel Power Ratio VDS = 12V; IDQ = 180 mA WCDMA BTS Forward (64 channels) dB ACPR Channel power = 30 dBm -44 dBc Saturated Drain-Source Current IDSS VDS = 3.0 V; VGS = 0 V 5.2 A Gate-Source Leakage Current IGSO VGS = -3 V 3 mA Pinch-Off Voltage |VP| VDS = 3.0 V; IDS = 19 mA 1.1 V Gate-Drain Breakdown Voltage |VBDGD| IGD = 19 mA 35 V Thermal Resistivity (channel-to-case) ΘCC See Note on following page 3.5 °C/W 10.15 dB Pk/Avg 0.001% Phone: +1 408 850-5790 Fax: +1 408 850-5766 http://www.filtronic.co.uk/semis 30 Revised: 12/07/04 Email: [email protected] PRELIMINARY FPD10000AF 10W PACKAGED POWER PHEMT • RECOMMENDED OPERATING BIAS CONDITIONS Drain-Source Voltage: From 10 to 12V Quiescent Current: From 180 (Class B) to 300 mA (Class AB) operation • ABSOLUTE MAXIMUM RATINGS1 Parameter Symbol Test Conditions Drain-Source Voltage VDS Gate-Source Voltage Max Units -3V < VGS < +0V 16 V VGS 0V < VDS < +15V -3 V Drain-Source Current IDS For VDS > 2V 50% IDSS mA Gate Current IG Forward / Reverse current +50/-8 mA PIN Under any acceptable bias state 1.75 W Channel Operating Temperature TCH Under any acceptable bias state 175 ºC Storage Temperature TSTG Non-Operating Storage 150 ºC Total Power Dissipation PTOT See De-Rating Note below 42 W Comp. Under any bias conditions 5 dB RF Input Power 2 Gain Compression 3 Min -40 Simultaneous Combination of Limits 2 or more Max. Limits 80 2 TAmbient = 22°C unless otherwise noted Max. RF Input Limit must be further limited if input VSWR > 2.5:1 3 Users should avoid exceeding 80% of 2 or more Limits simultaneously % 1 Notes: • Operating conditions that exceed the Absolute Maximum Ratings will result in permanent damage to the device. • Total Power Dissipation defined as: PTOT ≡ (PDC + PIN) – POUT, where: PDC: DC Bias Power PIN: RF Input Power POUT: RF Output Power • Total Power Dissipation to be de-rated as follows above 22°C: PTOT= 42 - (0.286W/°C) x TPACK where TPACK = source tab lead temperature above 22°C (coefficient of de-rating formula is the Thermal Conductivity) Example: For a 55°C Source flange temperature: PTOT = 42 - (0.286 x (55 – 22)) = 32.6W • Note on Thermal Resistivity: The nominal value of 3.5°C/W is measured with the package mounted on a large heatsink with thermal compound to ensure adequate contact. The package temperature is referred to the Source flange. • HANDLING PRECAUTIONS To avoid damage to the devices care should be exercised during handling. Proper Electrostatic Discharge (ESD) precautions should be observed at all stages of storage, handling, assembly, and testing. These devices should be treated as Class 1A per ESD-STM5.1-1998, Human Body Model. Further information on ESD control measures can be found in MIL-STD-1686 and MIL-HDBK-263. Phone: +1 408 850-5790 Fax: +1 408 850-5766 http://www.filtronic.co.uk/semis Revised: 12/07/04 Email: [email protected] PRELIMINARY FPD10000AF 10W PACKAGED POWER PHEMT • BIASING GUIDELINES ¾ Dual-bias (separate positive Drain and negative Gate supplies) circuits are recommended, requiring a regulated negative voltage supply for depletion-mode devices such as the FPD10000AF. The Gate bias supply should be capable of sinking / sourcing at least 10mA of current. The bias circuitry must be properly sequenced to ensure that the control Gate voltage (typically -0.6 to -1.0V) is applied to the device before the Drain voltage, otherwise large amounts of Drain-Source current will be drawn, potentially leading to instability and selfoscillation. ¾ The recommended 180 – 300 mA bias point is nominally a Class B/AB mode. A small amount of RF gain expansion prior to the onset of compression is normal for this operating point, and significant current drive-up should be expected. If a Class A operation is desired, users should check the de-rating limits given in the previous section to ensure reliable operation. • PACKAGE OUTLINE (dimensions in millimeters – mm) PACKAGE MARKING CODE Example: f1ZD P3F f = Filtronic 1ZD = Lot and Date Code P2F = Status, Part Code, Part Type Status: D=Development P = Production Part Code denotes model (e.g. FPD10000AF) Part Type: F = FET (pHEMT) All information and specifications subject to change without notice. Phone: +1 408 850-5790 Fax: +1 408 850-5766 http://www.filtronic.co.uk/semis Revised: 12/07/04 Email: [email protected]