TI CSD16340Q3

CSD16340Q3
www.ti.com
SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
N-Channel NexFET™ Power MOSFETs
Check for Samples: CSD16340Q3
FEATURES
1
•
•
•
•
•
•
•
•
•
2
PRODUCT SUMMARY
Optimized for 5V Gate Drive
Resistance Rated at VGS = 2.5V
Ultra Low Qg and Qgd
Low Thermal Resistance
Avalanche Rated
Pb Free Terminal Plating
RoHS Compliant
Halogen Free
SON 3.3mm x 3.3mm Plastic Package
VDS
Drain to Source Voltage
25
V
Qg
Gate Charge Total (4.5V)
6.5
nC
Qgd
Gate Charge Gate to Drain
RDS(on)
Vth
•
Point-of-Load Synchronous Buck Converter
for Applications in Networking, Telecom and
Computing Systems
Optimized for Control or Synchronous FET
Applications
DESCRIPTION
The NexFET™ power MOSFET has been designed
to minimize losses in power conversion and optimized
for 5V gate drive applications.
Top View
S
1
8
D
S
2
7
D
S
3
6
D
G
4
5
D
Drain to Source On Resistance
mΩ
VGS = 4.5V
4.3
mΩ
VGS = 8V
3.8
mΩ
Threshold Voltage
0.85
V
Package
Media
CSD16340Q3
SON 3.3 × 3.3
Plastic Package
13-inch
reel
Qty
Ship
2500
Tape and
Reel
ABSOLUTE MAXIMUM RATINGS
VALUE
UNIT
VDS
Drain to Source Voltage
25
V
VGS
Gate to Source Voltage
+10 / –8
V
Continuous Drain Current, TC = 25°C
60
A
Continuous Drain Current (1)
21
A
IDM
Pulsed Drain Current, TA = 25°C (2)
115
A
PD
Power Dissipation (1)
3
W
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
°C
EAS
Avalanche Energy, single pulse
ID = 40A, L = 0.1mH, RG = 25Ω
80
mJ
ID
(2)
P0095-01
Device
TA = 25°C unless otherwise stated
(1)
D
Typical RθJA = 39°C/W on 1in2 Cu (2 oz.) on 0.060" thick FR4
PCB.
Pulse width ≤300μs, duty cycle ≤2%
RDS(ON) vs VGS
Gate Charge
8
16
ID = 20A
VDS = 12.5V
7
14
ID = 20A
VG − Gate Voltage − V
RDS(on) − On-State Resistance − mW
nC
6.1
ORDERING INFORMATION
APPLICATIONS
•
1.2
VGS = 2.5V
12
10
8
TC = 125°C
6
4
TC = 25°C
2
6
5
4
3
2
1
0
0
0
1
2
3
4
5
6
7
8
VGS − Gate to Source Voltage − V
9
10
G006
0
2
4
6
8
Qg − Gate Charge − nC
10
12
G003
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NexFET is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2009–2010, Texas Instruments Incorporated
CSD16340Q3
SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
www.ti.com
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Static Characteristics
BVDSS
Drain to Source Voltage
VGS = 0V, IDS = 250μA
IDSS
Drain to Source Leakage Current
VGS = 0V, VDS = 20V
IGSS
Gate to Source Leakage Current
VDS = 0V, VGS = +10/-8V
VGS(th)
Gate to Source Threshold Voltage
VDS = VGS, IDS = 250μA
RDS(on)
gfs
Drain to Source On Resistance
Transconductance
25
0.6
V
1
μA
100
nA
0.85
1.1
V
VGS = 2.5V, IDS = 20A
6.1
7.8
mΩ
VGS = 4.5V, IDS = 20A
4.3
5.5
mΩ
VGS = 8V, IDS = 20A
3.8
4.5
mΩ
VDS = 15V, IDS = 20A
121
S
Dynamic Characteristics
CISS
Input Capacitance
COSS
Output Capacitance
1050
1350
pF
730
950
CRSS
pF
Reverse Transfer Capacitance
53
69
pF
Rg
Series Gate Resistance
1.5
3
Ω
Qg
Gate Charge Total (4.5V)
6.5
9.2
nC
Qgd
Gate Charge Gate to Drain
Qgs
Gate Charge Gate to Source
Qg(th)
Gate Charge at Vth
QOSS
Output Charge
td(on)
Turn On Delay Time
tr
Rise Time
td(off)
Turn Off Delay Time
tf
Fall Time
VGS = 0V, VDS = 12.5V, f = 1MHz
VDS = 12.5V, ID = 20A
VDS = 13V, VGS = 0V
VDS = 12.5V, VGS = 4.5V ID = 20A
RG = 2Ω
1.2
nC
2.1
nC
1
nC
15
nC
4.8
ns
16.1
ns
13.8
ns
5.2
ns
Diode Characteristics
VSD
Diode Forward Voltage
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
IS = 20A, VGS = 0V
0.8
VDD = 13V, IF = 20A, di/dt = 300A/μs
1
V
14.5
nC
20
ns
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
(1)
R θJC
Thermal Resistance Junction to Case
R θJA
Thermal Resistance Junction to Ambient (1)
(1)
(2)
2
(2)
MIN
TYP
MAX
UNIT
2.7
°C/W
58
°C/W
RθJC is determined with the device mounted on a 1 inch square 2 oz. Cu pad on a 1.5 × 1.5 in 0.06 inch thick FR4 board. RθJC is
specified by design while RθJA is determined by the user’s board design.
Device mounted on FR4 Material with 1 inch2 of 2 oz. Cu.
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CSD16340Q3
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SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
GATE
GATE
Source
Source
Max RθJA = 162°C/W
when mounted on
minimum pad area of 2
oz. Cu.
Max RθJA = 58°C/W
when mounted on 1
inch2 of 2 oz. Cu.
DRAIN
DRAIN
M0161-02
M0161-01
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
ZqJA – NormalizedThermal Impedance
10
1
0.5
0.3
0.1
0.1
Duty Cycle = t1/t2
0.05
0.01
P
0.02
0.01
t1
t2
o
Typical R qJA = 138 C/W (min Cu)
TJ = P x ZqJA x R qJA
Single Pulse
0.001
0.001
0.01
0.1
1
10
100
1k
tP – Pulse Duration–s
G012
Figure 1. Transient Thermal Impedance
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CSD16340Q3
SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
50
50
45
45
40
VGS = 8V
35
ID − Drain Current − A
ID − Drain Current − A
(TA = 25°C unless otherwise stated)
VGS = 4.5V
30
VGS = 3.5V
25
VGS = 3V
20
VGS = 2.5V
15
35
30
25
TC = 25°C
20
TC = 125°C
15
10
10
5
5
0
0.0
VDS = 5V
40
TC = −55°C
0
0.1
0.3
0.2
0.4
0.5
VDS − Drain to Source Voltage − V
0.7
0.6
1.1
1.3
1.5
1.7
2.1
1.9
VGS − Gate to Source Voltage − V
G001
Figure 2. Saturation Characteristics
G002
Figure 3. Transfer Characteristics
8
2.5
f = 1MHz
VGS = 0V
ID = 20A
VDS = 12.5V
7
6
C − Capacitance − nF
VG − Gate Voltage − V
0.9
5
4
3
2
2.0
CISS = CGD + CGS
1.5
COSS = CGD + CGS
1.0
CRSS = CGD
0.5
1
0
0.0
0
2
4
6
8
10
Qg − Gate Charge − nC
12
0
5
20
25
G004
Figure 5. Capacitance
16
RDS(on) − On-State Resistance − mW
1.2
VGS(th) − Threshold Voltage − V
15
VDS − Drain to Source Voltage − V
G003
Figure 4. Gate Charge
ID = 250mA
1.0
0.8
0.6
0.4
0.2
0.0
−75
14
ID = 20A
12
10
8
TC = 125°C
6
4
TC = 25°C
2
0
−25
25
75
125
TC − Case Temperature − °C
175
0
1
2
3
4
5
6
7
8
VGS − Gate to Source Voltage − V
G005
Figure 6. Threshold Voltage vs. Temperature
4
10
9
10
G006
Figure 7. On Resistance vs. Gate Voltage
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CSD16340Q3
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SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
100
ID = 20A
VGS = 4.5V
1.4
ISD − Source to Drain Current − A
Normalized On-State Resistance
1.6
1.2
1.0
0.8
0.6
0.4
0.2
0.0
−75
10
1
TC = 125°C
0.1
TC = 25°C
0.01
0.001
0.0001
−25
25
75
125
175
TC − Case Temperature − °C
0.0
0.6
0.8
1.0
G008
Figure 9. Typical Diode Forward Voltage
1k
I(AV) − Peak Avalanche Current − A
1k
ID − Drain Current − A
0.4
VSD − Source to Drain Voltage − V
G007
Figure 8. Normalized On Resistance vs. Temperature
100
100ms
10
1ms
1
10ms
Area Limited
by RDS(on)
100ms
0.1
0.01
0.01
0.2
Single Pulse
Typical RqJA = 138°C/W (min Cu)
0.1
DC
1
10
TC = 25°C
TC = 125°C
10
1
0.01
100
VD − Drain Voltage − V
100
0.1
1
10
t(AV) − Time in Avalanche − ms
G009
Figure 10. Maximum Safe Operating Area
100
G010
Figure 11. Single Pulse Unclamped Inductive Switching
80
ID − Drain Current − A
70
60
50
40
30
20
10
0
−50
−25
0
25
50
75
100
125
150
175
TC − Case Temperature − °C
G011
Figure 12. Maximum Drain Current vs. Temperature
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Product Folder Link(s): CSD16340Q3
5
CSD16340Q3
SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
www.ti.com
MECHANICAL DATA
Q3 Package Dimensions
D2
D
H
L
1
2
7
3
6
4
5
5
4
3
b
E2
E
6
e
E
7
2
8
8
1
q
L1
Top View
A1
Bottom View
A
Side View
c
D
Front View
M0142-01
DIM
MILLIMETERS
NOM
MAX
MIN
NOM
MAX
A
0.950
1.000
1.100
0.037
0.039
0.043
A1
0.000
0.000
0.050
0.000
0.000
0.002
b
0.280
0.340
0.400
0.011
0.013
0.016
c
0.150
0.200
0.250
0.006
0.008
0.010
D
3.200
3.300
3.400
0.126
0.130
0.134
D1
–
–
–
–
–
–
D2
1.650
1.750
1.800
0.065
0.069
0.071
E
3.200
3.300
3.400
0.126
0.130
0.134
E1
–
–
–
–
–
–
E2
2.350
2.450
2.550
0.093
0.096
0.100
e
6
INCHES
MIN
0.650 TYP
0.026
H
0.35
0.450
0.550
0.014
0.018
0.022
L
0.35
0.450
0.550
0.014
0.018
0.022
L1
–
–
–
–
–
–
θ
–
–
–
–
–
–
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Product Folder Link(s): CSD16340Q3
CSD16340Q3
www.ti.com
SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
2.31
1
8
8
1
0.65 Typ.
2.45
5
4
5
3.50
0.56
0.41
4
0.50 Typ.
Recommended PCB Pattern
0.63
M0143-01
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through
PCB Layout Techniques.
1.75 ±0.10
Q3 Tape and Reel Information
4.00 ±0.10 (See Note 1)
2.00 ±0.05
Ø 1.50
+0.10
–0.00
3.60
1.30
3.60
5.50 ±0.05
12.00
+0.30
–0.10
8.00 ±0.10
M0144-01
Notes:
1. 10 sprocket hole pitch cumulative tolerance ±0.2
2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm
3. Material:black static dissipative polystyrene
4. All dimensions are in mm (unless otherwise specified)
5. Thickness: 0.30 ±0.05mm
6. MSL1 260°C (IR and Convection) PbF Reflow Compatible
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CSD16340Q3
SLPS247A – DECEMBER 2009 – REVISED JANUARY 2010
www.ti.com
Package Marking Information
Location
8
1st Line
CSD
= Fixed Characters
NNNNN
= Product Code
2nd Line (Date Code)
YY
= Last 2 digits of the Year
WW
= 2-digit Work Week
C
= Country of Origin
5
5
8
4
1
CSDNNNNN
YYWWC
LLLLL
> Philippines = P
> Taiwan = T
> China = C
1
3rd Line
LLLLL
= Last 5 digits of the Wafer Lot #
4
Pin 1
Identifier
M0145-01
Spacer
REVISION HISTORY
Changes from Original (December 2009) to Revision A
•
8
Page
Changed Qg in the PRODUCT SUMMARY table from: 6.8 To 6.5 nC ................................................................................. 1
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