P4C187/P4C187L ULTRA HIGH SPEED 64K x 1 STATIC CMOS RAMS FEATURES Full CMOS, 6T Cell Data Retention with 2.0V Supply (P4C187L Military) High Speed (Equal Access and Cycle Times) – 10/12/15/20/25 ns (Commercial) – 12/15/20/25/35 ns (Industrial) – 15/20/25/35/45 ns (Military) Separate Data I/O Low Power Operation – 743 mW Active -10 – 660/770 mW Active for -12/15 – 550/660 mW Active for -20/25 /35 – 193/220 mW Standby (TTL Input) – 83/110 mW Standby (CMOS Input) P4C187 – 5.5 mW Standby (CMOS Input) P4C187L (Military) Fully TTL Compatible Inputs Three-State Output TTL Compatible Output Standard Pinout (JEDEC Approved) – 22-Pin 300 mil DIP – 24-Pin 300 mil SOJ – 22-Pin 290x490 mil LCC Single 5V±10% Power Supply DESCRIPTION consumption to a low 743mW active, 193/83mW standby for TTL/CMOS inputs and only 5.5 mW standby for the P4C187L. The P4C187/L are 65, 536-bit ultra high speed static RAMs organized as 64K x 1. The CMOS memories require no clocks or refreshing and have equal access and cycle times. The RAMs operate from a single 5V ± 10% tolerance power supply. Data integrity is maintained for supply voltages down to 2.0V, typically drawing 10µA. The P4C187/L are available in 22-pin 300 mil DIP, 24-pin 300 mil SOJ, and 22-pin LCC packages providing excellent board level densities. Access times as fast as 10 nanoseconds are available, greatly enhancing system speeds. CMOS reduces power FUNCTIONAL BLOCK DIAGRAM A1 A0 A DIN INPUT DATA CONTROL DOUT COLUMN I/O A V CC 21 A 15 A2 3 20 A 14 A3 4 19 A 13 A4 5 18 A 12 A5 6 17 A 11 A6 7 16 A 10 A7 8 15 DOUT 9 WE GND COLUMN SELECT CE 22 2 (8) 21 22 3 A4 A5 5 18 A 12 6 17 A 11 7 16 A 10 A9 A6 A7 8 15 A9 14 A8 DOUT 9 14 A8 10 13 DIN 11 12 CE DIP (P3, D3) TOP VIEW A 2 A2 A3 4 1 20 19 11 12 10 A 14 A 13 13 DIN A 1 A1 CE (8) A0 WE GND 65,356-BIT MEMORY ARRAY ROW SELECT V CC A 15 PIN CONFIGURATIONS LCC (L3) TOP VIEW For SOJ pin configuration, please see Selection Guide. WE Means Quality, Service and Speed 1Q97 55 P4C187/187L MAXIMUM RATINGS(1) Symbol Parameter Value Unit VCC Power Supply Pin with Respect to GND –0.5 to +7 V VTERM Terminal Voltage with Respect to GND (up to 7.0V) –0.5 to VCC +0.5 V TA Operating Temperature –55 to +125 °C Symbol Ambient Temperature GND VCC 0V 0V 0V 5.0V ± 10% 5.0V ± 10% 5.0V ± 10% Military –55°C to +125°C –40°C to +85°C Industrial 0°C to +70°C Commercial Value Unit TBIAS Temperature Under Bias –55 to +125 °C TSTG Storage Temperature –65 to +150 °C PT Power Dissipation 1.0 W IOUT DC Output Current 50 mA CAPACITANCES(4) RECOMMENDED OPERATING TEMPERATURE AND SUPPLY VOLTAGE Grade(2) Parameter VCC = 5.0V, TA = 25°C, f = 1.0MHz Symbol Parameter Conditions Typ. Unit CIN Input Capacitance VIN = 0V 5 pF COUT Output Capacitance VOUT = 0V 7 pF DC ELECTRICAL CHARACTERISTICS Over recommended operating temperature and supply voltage(2) Symbol Parameter VIH Input High Voltage VIL Input Low Voltage VHC CMOS Input High Voltage VLC CMOS Input Low Voltage VCD Input Clamp Diode Voltage VCC = Min., IIN = 18 mA VOL Output Low Voltage (TTL Load) Output High Voltage (TTL Load) Input Leakage Current VOH ILI –0.5(3) –0.5(3) IOL = +8 mA, VCC = Min. IOH = –4 mA, VCC = Min. ISB1 –0.5(3) 0.8 V V 0.2 V –1.2 –1.2 V 0.4 0.4 V 0.2 2.4 –0.5(3) V 2.4 –10 –5 +10 +5 –5 n/a +5 n/a µA –10 –5 +10 +5 –5 n/a +5 n/a µA Standby Power Supply CE ≥ VIH Mil. Current (TTL Input Levels) VCC = Max ., Ind./Com’l. f = Max., Outputs Open ___ ___ 40 ___ ___ 40 n/a mA CE ≥ VHC Mil. VCC = Max., Ind./Com’l. f = 0, Outputs Open VIN ≤ VLC or VIN ≥ VHC ___ ___ 20 ___ ___ 1.0 n/a mA VCC = Max. Mil. Output Leakage Current Com’l. VCC = Max., CE = VIH, VOUT = GND to VCC ISB 0.8 P4C187L Unit Min Max 2.2 VCC +0.5 V VCC –0.2 VCC +0.5 VCC –0.2 VCC +0.5 VIN = GND to VCC ILO P4C187 Min Max 2.2 VCC +0.5 Test Conditions Standby Power Supply Current (CMOS Input Levels) Mil. Com’l. 35 15 n/a = Not Applicable Notes: 1. Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to MAXIMUM rating conditions for extended periods may affect reliability. 2. Extended temperature operation guaranteed with 400 linear feet per minute of air flow. 3. Transient inputs with VIL and IIL not more negative than –3.0V and –100mA, respectively, are permissible for pulse widths up to 20 ns. 4. This parameter is sampled and not 100% tested. 56 P4C187/187L POWER DISSIPATION CHARACTERISTICS VS. SPEED Symbol Parameter Dynamic Operating Current* ICC Temperature Range Commercial –10 180 –12 170 –15 160 –20 155 –25 150 –35 N/A –45 N/A Industrial N/A 180 170 160 155 150 N/A mA Military N/A N/A 170 160 155 150 145 mA Unit mA *VCC = 5.5V. Tested with outputs open. f = Max. Switching inputs are 0V and 3V. CE = VIL. DATA RETENTION CHARACTERISTICS (P4C187L Military Temperature Only) Symbol Parameter Test Conditons VDR VCC for Data Retention ICCDR Data Retention Current CE ≥ VCC –0.2V, tCDR Chip Deselect to Data Retention Time VIN ≥ VCC –0.2V tR† Operation Recovery Time Min Typ.* VCC = 2.0V 3.0V Max VCC = 2.0V 3.0V V 2.0 10 or VIN ≤ 0.2V 15 600 tRC§ ns This parameter is guaranteed but not tested. DATA RETENTION WAVEFORM DATA RETENTION MODE 4.5V VDR ≥ 2V t CDR 4.5V tR VDR CE VIH VIH 57 µA ns §tRC = Read Cycle Time VCC 900 0 *TA = +25˙C † Unit P4C187/187L AC CHARACTERISTICS—READ CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Symbol –12 –10 Parameter –15 –20 –35 –25 –45 Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit tRC Read Cycle Time tAA Address Access Time 10 12 15 20 25 35 45 ns tAC Chip Enable Access Time 10 12 15 20 25 35 45 ns tOH Output Hold from Address Change 2 2 2 2 2 2 2 ns tLZ Chip Enable to Output in Low Z 2 2 2 2 2 2 2 ns tHZ Chip Disable to Output in High Z tPU Chip Enable to Power Up Time tPD Chip Disable to Power Down Time 12 10 15 5 20 6 0 0 8 10 0 10 12 35 25 0 15 12 0 45 17 0 20 25 ns 20 0 35 ns ns 45 ns TIMING WAVEFORM OF READ CYCLE NO. 1(5) (8) t RC ADDRESS t AA t OH PREVIOUS DATA VALID DATA OUT DATA VALID TIMING WAVEFORM OF READ CYCLE NO. 2(6) tRC CE (7) t HZ t AC (7) t LZ DATA VALID DATA OUT t PU VCC SUPPLY CURRENT HIGH IMPEDANCE t PD I CC I SB Notes: 5. CE is LOW and WE is HIGH for READ cycle. 6. WE is HIGH, and address must be valid prior to or coincident with CE transition LOW. 7. Transition is measured ±200mV from steady state voltage prior to change with specified loading in Figure 1. This parameter is sampled and not 100% tested. 8. Read Cycle Time is measured from the last valid address to the first transitioning address. 58 P4C187/187L AC CHARACTERISTICS - WRITE CYCLE (VCC = 5V ± 10%, All Temperature Ranges)(2) Symbol –10 Parameter –12 –15 –20 –35 –25 –45 Min Max Min Max Min Max Min Max Min Max Min Max Min Max Unit tWC Write Cycle Time 10 12 15 20 25 35 45 ns tCW Chip Enable Time to End of Write 8 10 2 15 20 25 30 ns tAW Address Valid to End of Write 8 10 12 15 20 25 30 ns tAS Address Set-up Time Write Pulse Width 0 0 0 0 0 0 0 ns 8 10 12 15 20 25 30 ns tAH Address Hold Time from End of Write 0 0 0 0 0 0 0 ns tDW Data Valid to End of Write 6 7 10 13 15 20 25 ns tDH Data Hold Time 0 0 0 0 0 0 0 ns tWZ Write Enable to Output in High Z tOW Output Active from End of Write tWP 6 0 7 8 0 12 0 0 15 17 0 0 20 0 ns ns WE CONTROLLED)(9) TIMING WAVEFORM OF WRITE CYCLE NO. 1 (WE t WC (11) ADDRESS t CW CE t AW t WR t AH t WP WE t AS t DW DATA IN DATA VALID t OW(10, 12) (12) t WZ DATA OUT t DH DATA UNDEFINED HIGH IMPEDANCE Notes: 9. CE and WE must be LOW for WRITE cycle. 10. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high impedance state. 11. Write Cycle Time is measured from the last valid address to the first transition address. 12. Transition is measured ±200mV from steady state voltage prior to change with specified loading in Figure 1. This parameter is sampled and not 100% tested. 59 P4C187/187L CE CONTROLLED)(9) TIMING WAVEFORM OF WRITE CYCLE NO. 2 (CE t WC (11) ADDRESS t AS t CW CE t AH t WR t AW t WP WE t DW DATA IN t DH DATA VALID DATA OUT HIGH IMPEDANCE AC TEST CONDITIONS TRUTH TABLE Input Pulse Levels Mode GND to 3.0V CE WE Output Power Standby Input Rise and Fall Times 3ns Standby H X High Z Input Timing Reference Level 1.5V Read L H DOUT Active Output Timing Reference Level 1.5V Write L L High Z Active Output Load See Figures 1 and 2 +5V R TH = 166.5 Ω 480Ω D OUT DOUT 255Ω VTH = 1.73 V 30pF* (5pF* for t HZ , t LZ , 30pF* (5pF* for t HZ , t LZ , t WZ and t OW ) t WZ and t OW ) Figure 2. Thevenin Equivalent Figure 1. Output Load * including scope and test fixture. Note: Due to the ultra-high speed of the P4C187/L, care must be taken when testing this device; an inadequate setup can cause a normal functioning part to be rejected as faulty. Long high-inductance leads that cause supply bounce must be avoided by bringing the VCC and ground planes directly up to the contactor fingers. A 0.01 µF high frequency capacitor is also required between VCC and ground. To avoid signal reflections, proper termination must be used; for example, a 50Ω test environment should be terminated into a 50Ω load with 1.73V (Thevenin Voltage) at the comparator input, and a 116Ω resistor must be used in series with DOUT to match 166Ω (Thevenin Resistance). 60 P4C187/187L TEMPERATURE RANGE SUFFIX PACKAGE SUFFIX Package Suffix P J L D Description Plastic DIP, 300 mil wide standard Plastic SOJ, 300 mil wide standard Leadless Chip Carrier (ceramic) CERDIP, 300 mil wide standard Temperature Range Suffix C I M MB Description Commercial Temp. Range, 0°C to +70°C. Industrial Temp. Range, –40°C to +85°C. Military Temperature Range,–55°C to +125°C. Mil. Temp. with MIL-STD-883D Class B compliance ORDERING INFORMATION Performance Semiconductor part numbering scheme is as follows: p P4C l ss 187 t — Temperature Range Package Code Speed (Access/Cycle Time) Low Power Designator: Blank = none, L = Low Power Device Number Static RAM Prefix l ss p t = Ultra-low standby power designator L, if needed. = Speed (access/cycle time in ns), e.g., 25, 35 = Package code, i.e., P, J, D, L. = Temperature range, i.e., C, M, MB. The P4C187 is also available per SMD 5962-86015 and 5962-89696 61 P4C187/187L SELECTION GUIDE The P4C187 is available in the following temperature, speed and package options. The P4C187L is only available over the military temperature range. Temperature Range Commercial Industrial Military Temp. Military Processed* Speed (ns) Package Plastic DIP Plastic SOJ Plastic DIP Plastic SOJ CERDIP LCC CERDIP LCC 10 12 15 20 25 35 45 -10PC -10JC N/A N/A N/A N/A -12PC -12JC -12PI -12JI N/A N/A -15PC -15JC -15PI -15JI -15DM -15LM -20PC -20JC -20PI -20JI -20DM -20LM -25PC -25JC -25PI -25JI -25DM -25LM N/A N/A -35PI -35JI -35DM -35LM N/A N/A N/A N/A -45DM -45LM N/A N/A N/A N/A -15DMB -20DMB -25DMB -15LMB -20LMB -25LMB * Military temperature range with MIL-STD-883, Class B processing. N/A = Not Available SOJ PIN CONFIGURATION A 0 A 1 1 24 2 23 A 2 A 3 3 22 4 21 A 4 A 5 5 20 6 19 NC 7 18 A 6 A 7 8 17 9 16 D OUT 10 15 WE GND 11 14 12 13 SOJ (J4) Top View 62 V CC A 15 A 14 A 13 A 12 NC A 11 A 10 A 9 A 8 D IN CE -35DMB -45DMB -35LMB -45LMB