LS627 PHOTO FET LIGHT SENSITIVE JFET FEATURES DIRECT REPLACEMENT FOR CRYSTALONICS FF627 FLAT GLASS TOP FOR EXTERNAL OPTICS TO-72 TOP VIEW ULTRA HIGH SENSITIVITY 1 ABSOLUTE MAXIMUM RATINGS @ 25 °C (unless otherwise stated) Maximum Temperatures Storage Temperature -65 to +200 °C Operating Junction Temperature -55 to +165 °C S C D G Maximum Power Dissipation Continuous Power Dissipation, TA=25°C 400mW Maximum Currents Drain to Source 50mA Maximum Voltages Drain to Gate 15V Drain to Source 15V Gate to Source -10V ELECTRICAL CHARACTERISTICS @ 25 °C (unless otherwise stated) SYMBOL VGS(off) SG CHARACTERISTIC MIN Gate to Source cutoff Voltage (VPO) 1.0 5.0 V Gate Sensitivity2, 7 6.4 24 µA/mW/cm2 VDS = 10V, VGS = 0V, λ = 0.9µm 2 VDS = 10V, VGS = 0V, RG = 1MΩ 3, 7 SD Drain Sensitivity λlg Gate Current (Light)4, 7 λld Drain Current (Light) 4, 7 Drain Saturation Current Gate Leakage Current (Dark) 8.0 gfs Forward Transconductance (gm) RDS(on) Drain to Source On Resistance 30 8000 100 Gate to Source Capacitance7 35 7 Gate to Drain Capacitance 20 tr Rise Time5, 7 30 tf Fall Time6, 7 50 Linear Integrated Systems • UNITS CONDITIONS VDS = 10V, ID = 0.1µA mA/mW/cm 37.5 800 IDSS CGD MAX 500 10 IGSS CGS TYP nA/FC VDS = 10V, VGS = 0V µA/FC VDS = 10V, VGS = 0V, RG = 1MΩ mA VDS = 10V, VGS = 0V pA VGS = -10V, VDS = 0V µS VDS = 10V, VGS = 0V, f = 1kHz Ω VDS = 0.1V, VGS = 0V pF ns VGS = -10V, f = 140kHz VGD = -10V, f = 140kHz VDS = 10V, RL = RG =100Ω 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Document 201159 8/30/12 Rev#A2 ECN# LS627 0.170 Dimensions in inches NOTES 1. Absolute maximum ratings are limiting values above which serviceability may be impaired. 2. Gate Current per unit Radient Power Density at Lens Surface 3. Drain Current per unit Radient Power Density (λ = 0.9µm). 4. Tungsten Lamp 2800°K Color Temperature. 5. GaAs Diode Source. 6. Directly Proportional to RG. 7. Not production tested. Guaranteed by design. Information furnished by Linear Integrated Systems is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems. Linear Integrated Systems (LIS) is a 25-year-old, third-generation precision semiconductor company providing high-quality discrete components. Expertise brought to LIS is based on processes and products developed at Amelco, Union Carbide, Intersil and Micro Power Systems by company President John H. Hall. Hall, a protégé of Silicon Valley legend Dr. Jean Hoerni, was the director of IC Development at Union Carbide, co-founder and vice president of R&D at Intersil, and founder/president of Micro Power Systems. Linear Integrated Systems • 4042 Clipper Court • Fremont, CA 94538 • Tel: 510 490-9160 • Fax: 510 353-0261 Document 201159 8/30/12 Rev#A2 ECN# LS627