DATA SHEET MOS FIELD EFFECT TRANSISTOR µ PA2701TP SWITCHING N-CHANNEL POWER MOS FET PACKAGE DRAWING (Unit: mm) DESCRIPTION 8 5 1, 2, 3 ; Source 4 ; Gate 5, 6, 7, 8, 9 ; Drain The µPA2701TP, which has a heat spreader, is N-Channel MOS Field Effect Transistor designed for DC/DC converter and 1 4 5.2 +0.17 –0.2 0.05 ±0.05 +0.10 –0.05 4 0.12 M 1.1 ±0.2 0.40 1 2.9 MAX. PACKAGE Power HSOP8 0.10 S 1.27 TYP. 2.0 ±0.2 µPA2701TP 4.4 ±0.15 0.15 S ORDERING INFORMATION PART NUMBER 6.0 ±0.3 0.8 ±0.2 +0.10 –0.05 FEATURES • Low on-state resistance RDS(on)1 = 7.5 mΩ MAX. (VGS = 10 V, ID = 7.0 A) RDS(on)2 = 11.6 mΩ MAX. (VGS = 4.5 V, ID = 7.0 A) • Low Ciss: Ciss = 1200 pF TYP. (VDS = 10 V, VGS = 0 V) • Small and surface mount package (Power HSOP8) 1.44 TYP. 1.49 ±0.21 power management applications of notebook computers. 9 4.1 MAX. 8 5 ABSOLUTE MAXIMUM RATINGS (TA = 25°C, Unless otherwise noted, All terminals are connected.) Drain to Source Voltage (VGS = 0 V) VDSS 30 V Gate to Source Voltage (VDS = 0 V) VGSS ±20 V Drain Current (DC) (TC = 25°C) ID(DC)1 ±35 A ID(DC)2 ±16 A ID(pulse) ±80 A PT1 28 W PT2 3 W Tch 150 °C Drain Current (DC) (TA = 25°C) Drain Current (pulse) Note1 Note2 Total Power Dissipation (TC = 25°C) Total Power Dissipation (TA = 25°C) Channel Temperature Storage Temperature Note1 Tstg –55 to +150 °C Single Avalanche Current Note3 IAS 18 A Single Avalanche Energy Note3 EAS 32.4 mJ EQUIVALENT CIRCUIT Drain Body Diode Gate Gate Protection Diode Source Notes 1. Mounted on a glass epoxy board (1 inch x 1 inch x 0.8 mm), PW = 10 sec 2. PW ≤ 10 µs, Duty Cycle ≤ 1% 3. Starting Tch = 25°C, VDD = 15 V, RG = 25 Ω, L = 100 µH, VGS = 20 → 0 V Remark The diode connected between the gate and source of the transistor serves as a protector against ESD. When this device actually used, an additional protection circuit is extemally required if a voltage exceeding the rated voltage may be applied to this device. The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. G15844EJ2V0DS00 (2nd edition) Date Published May 2002 NS CP(K) Printed in Japan The mark ★ shows major revised points. © 2002 µPA2701TP ELECTRICAL CHARACTERISTICS (TA = 25°C, Unless otherwise noted, All terminals are connected.) CHARACTERISTICS ★ SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT Zero Gate Voltage Drain Current IDSS VDS = 30 V, VGS = 0 V 10 µA Gate Leakage Current IGSS VGS = ±20 V, VDS = 0 V ±10 µA 2.5 V Gate Cut-off Voltage Forward Transfer Admittance Drain to Source On-state Resistance VGS(off) VDS = 10 V, ID = 1 mA 1.5 2.0 | yfs | VDS = 10 V, ID = 7.0 A 7 14 RDS(on)1 VGS = 10 V, ID = 7.0 A 6.2 7.5 mΩ RDS(on)2 VGS = 4.5 V, ID = 7.0 A 8.7 11.6 mΩ RDS(on)3 13.7 mΩ S VGS = 4.0 V, ID = 7.0 A 10.3 Input Capacitance Ciss VDS = 10 V 1200 pF Output Capacitance Coss VGS = 0 V 500 pF Reverse Transfer Capacitance Crss f = 1 MHz 160 pF Turn-on Delay Time td(on) VDD = 15 V, ID = 7.0 A 10 ns tr VGS = 10 V 13 ns td(off) RG = 10 Ω 44 ns 11 ns Rise Time Turn-off Delay Time Fall Time tf Total Gate Charge QG VDD = 15 V 12 nC Gate to Source Charge QGS VGS = 5 V 4 nC Gate to Drain Charge QGD ID = 14 A 6 nC Body Diode Forward Voltage VF(S-D) IF = 14 A, VGS = 0 V 0.8 Reverse Recovery Time trr IF = 14 A, VGS = 0 V 32 ns Reverse Recovery Charge Qrr di/dt = 100 A/ µs 27 nC TEST CIRCUIT 1 AVALANCHE CAPABILITY D.U.T. RG = 25 Ω PG. VGS = −20 → 0 V V TEST CIRCUIT 2 SWITCHING TIME D.U.T. L 50 Ω 1.2 VGS RL Wave Form RG PG. VDD VGS 0 VGS 10% 90% VDD VDS 90% BVDSS IAS VDS VDS ID Starting Tch τ τ = 1 µs Duty Cycle ≤ 1% TEST CIRCUIT 3 GATE CHARGE 2 10% 0 10% Wave Form VDD PG. 90% VDS VGS 0 D.U.T. IG = 2 mA RL 50 Ω VDD Data Sheet G15844EJ2V0DS td(on) tr ton td(off) tf toff µPA2701TP TYPICAL CHARACTERISTICS (TA = 25°C) DERATING FACTOR OF FORWARD BIAS SAFE OPERATING AREA TOTAL POWER DISSIPATION vs. CASE TEMPERATURE PT - Total Power Dissipation - W dT - Percentage of Rated Power - % 30 100 80 60 40 20 0 20 40 60 80 100 120 140 25 20 15 10 5 0 160 0 20 TC - Case Temperature - ˚C 40 60 80 100 120 140 160 TC - Case Temperature - ˚C FORWARD BIAS SAFE OPERATING AREA ID(pulse) = 80 A 100 PW d ite V) ID(DC) = 35 A im 10 )L on S = ( S G RD t V Power Dissipation Limited (a 10 10 = 1 m s m s 100 ms 1 TC = 25˚C Single Pulse 0.1 0.01 0.1 1 10 100 VDS - Drain to Source Voltage - V TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH 1000 Remark Rth(ch-A): Mounted on a glass epoxy board rth(t) - Transient Thermal Resistance - ˚C/W ID - Drain Current - A 1000 (1 inch x 1 inch x 0.8 mm), TA = 25˚C Rth(ch-C): TC = 25˚C Rth(ch-A) = 89.3˚C/W 100 10 Rth(ch-C) = 4.46˚C/W 1 0.1 0.0001 Single Pulse 0.001 0.01 0.1 1 10 100 1000 PW - Pulse Width - s Data Sheet G15844EJ2V0DS 3 µPA2701TP DRAIN CURRENT vs. DRAIN TO SOURCE VOLTAGE FORWARD TRANSFER CHARACTERISTICS 100 80 Pulsed 10 ID - Drain Current - A ID - Drain Current - A 70 TA = −25˚C 25˚C 75˚C 150˚C 1 0.1 60 VGS = 10 V 4.5 V 50 40 4.0 V 30 20 10 0.01 1 2 VDS = 10 V 4 5 3 Pulsed 0 0 | yfs | - Forward Transfer Admittance - S FORWARD TRANSFER ADMITTANCE vs. DRAIN CURRENT 100 VDS = 10 V Pulsed 10 TA = 150˚C 75˚C 25˚C −25˚C 1 0.1 0.01 0.1 1 10 100 4 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 VDS - Drain to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. GATE TO SOURCE VOLTAGE 20 Pulsed 18 16 14 12 10 8 ID = 7.0 A 6 4 2 0 0 2 4 6 8 10 12 14 16 18 20 VGS - Gate to Source Voltage - V DRAIN TO SOURCE ON-STATE RESISTANCE vs. DRAIN CURRENT GATE CUT-OFF VOLTAGE vs. CHANNEL TEMPERATURE 30 3 Pulsed VGS(off) - Gate Cut-off Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ ID - Drain Current - A RDS(on) - Drain to Source On-state Resistance - mΩ VGS - Gate to Source Voltage - V 20 VGS = 4.0 V 10 4.5 V 10 V 0 0.01 0.1 1 10 100 VDS = 10 V ID = 1 mA 2 1 0 −50 −25 ID - Drain Current - A 0 25 50 75 100 125 150 Tch - Channel Temperature - ˚C Data Sheet G15844EJ2V0DS µPA2701TP SOURCE TO DRAIN DIODE FORWARD VOLTAGE 20 100 ISD - Diode Forward Current - A Pulsed 15 VGS = 4 V 4.5 V 10 10 V 5 0 −50 −25 Pulsed VGS = 0 V 10 1 0.1 0.01 0 25 50 75 0 100 125 150 175 0.2 CAPACITANCE vs. DRAIN TO SOURCE VOLTAGE 1.0 0.8 1.2 SWITCHING CHARACTERISTICS td(on), tr, td(off), tf - Switching Time - ns Ciss, Coss, Crss - Capacitance - pF 0.6 100 10000 Ciss 1000 Coss Crss 100 VGS = 0 V f = 1 MHz 10 0.1 1 10 td(off) tf tr 10 td(on) VDD = 15 V VGS = 10 V RG = 10 Ω 1 0.1 100 1 VDS - Drain to Source Voltage - V di/dt = 100 A/ µ s VGS = 0 V 100 10 1 0.1 1 10 100 DYNAMIC INPUT/OUTPUT CHARACTERISTICS 100 VDS - Drain to Source Voltage - V 1000 10 ID - Drain Current - A REVERSE RECOVERY TIME vs. DRAIN CURRENT trr - Reverse Recovery Time - ns 0.4 VSD - Source to Drain Voltage - V Tch - Channel Temperature - ˚C 40 8 35 7 VDD = 24 V 15 V 6V 30 25 6 5 VGS 20 4 15 3 10 2 5 1 VDS VGS - Gate to Source Voltage - V RDS(on) - Drain to Source On-state Resistance - mΩ DRAIN TO SOURCE ON-STATE RESISTANCE vs. CHANNEL TEMPERATURE ID = 14 A 0 0 IF - Drain Current - A 2 4 6 8 10 12 14 16 18 0 20 QG - Gate Charge - nC Data Sheet G15844EJ2V0DS 5 µPA2701TP [MEMO] 6 Data Sheet G15844EJ2V0DS µPA2701TP [MEMO] Data Sheet G15844EJ2V0DS 7 µPA2701TP • The information in this document is current as of May, 2002. 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