BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE Copyright © 1997, Power Innovations Limited, UK ● Designed Specifically for High Frequency Electronic Ballasts ● Integrated Fast trr Anti-Parallel Diode, Enhancing Reliability ● Diode trr Typically 1 µs ● Tightly Controlled Transistor Storage Times ● Voltage Matched Integrated Transistor and Diode ● Characteristics Optimised for Cool Running ● Diode-Transistor Charge Coupling Minimised to Enhance Frequency Stability MAY 1994 - REVISED SEPTEMBER 1997 TO-220 PACKAGE (TOP VIEW) B 1 C 2 E 3 Pin 2 is in electrical contact with the mounting base. MDTRACA device symbol description C B The new BULDxx range of transistors have been designed specifically for use in High Frequency Electronic Ballasts (HFEB’s). This range of switching transistors has tightly controlled storage times and an integrated fast trr antiparallel diode. The revolutionary design ensures that the diode has both fast forward and reverse recovery times, achieving the same performance as a discrete anti-parallel diode plus transistor. The integrated diode has minimal charge coupling with the transistor, increasing frequency stability, especially in lower power circuits where the circulating currents are low. By design, this new device offers a voltage matched integrated transistor and anti-parallel diode. E absolute maximum ratings at 25°C case temperature (unless otherwise noted) RATING SYMBOL VALUE UNIT Collector-emitter voltage (V BE = 0) VCES 600 V Collector-base voltage (IE = 0) VCBO 600 V Collector-emitter voltage (IB = 0) VCEO 400 V Emitter-base voltage V EBO 9 V A Continuous collector current Peak collector current (see Note 1) Continuous base current IC 8 ICM 12 A IB 4 A Peak base current (see Note 1) IBM 6 A Continuous device dissipation at (or below) 25°C case temperature Ptot 85 W Maximum average continuous diode forward current at (or below) 25°C case temperature Operating junction temperature range Storage temperature range NOTE IE(av) 0.5 A Tj -65 to +150 °C Tstg -65 to +150 °C 1: This value applies for tp = 10 ms, duty cycle ≤ 2%. PRODUCT INFORMATION Information is current as of publication date. Products conform to specifications in accordance with the terms of Power Innovations standard warranty. Production processing does not necessarily include testing of all parameters. 1 BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 electrical characteristics at 25°C case temperature PARAMETER V CEO(sus) cut-off current Emitter cut-off IEBO current V BE(sat) VCE(sat) V EC sustaining voltage Collector-emitter ICES hFE Collector-emitter Base-emitter saturation voltage IC = 0.1 A TEST CONDITIONS MIN L = 25 mH 400 µA VEB = IC = 0 1 mA 0.9 1.1 V 0.2 0.5 0.4 1 IB = 9V 0.3 A IC = 1.5 A IB = 0.3 A IC = 1.5 A 0.6 A IC = forward voltage V 10 IB = Anti-parallel diode UNIT VBE = 0 saturation voltage transfer ratio MAX VCE = 600 V Collector-emitter Forward current TYP 3A VCE = 10 V IC = 0.01 A VCE = 1V IC = 1.5 A VCE = 5V IC = IE = 1A (see Notes 2 and 3) (see Notes 2 and 3) (see Notes 2 and 3) 3A 10 18 10 15 20 10 16 20 1.1 1.5 (see Notes 2 and 3) V V NOTES: 2. These parameters must be measured using pulse techniques, tp = 300 µs, duty cycle ≤ 2%. 3. These parameters must be measured using voltage-sensing contacts, separate from the current carrying contacts, and located within 3.2 mm from the device body. thermal characteristics MAX UNIT RθJA Junction to free air thermal resistance PARAMETER MIN TYP 62.5 °C/W RθJC Junction to case thermal resistance 1.47 °C/W MAX UNIT switching characteristics at 25°C case temperature PARAMETER trr NOTE TEST CONDITIONS Anti-parallel diode Measured by holding transistor reverse recovery time in an off condition, VEB = -3 V. MIN (see Note 4) TYP 1 µs 4: Tested in a typical High Frequency Electronic Ballast. inductive-load switching characteristics at 25°C case temperature PARAMETER tsv TEST CONDITIONS Storage time MIN IC = 1.5 A IB(on) = 0.3 A VCC = 40 V L = 1 mH IB(off) = 0.3 A V CLAMP = 300 V TYP MAX UNIT 4 5 µs TYP MAX UNIT 150 250 ns resistive-load switching characteristics at 25°C case temperature PARAMETER tfi Current fall time PRODUCT 2 TEST CONDITIONS IC = 1.5 A IB(on) = 0.3 A V CC = 300 V IB(off) = 0.3 A INFORMATION MIN BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 TYPICAL CHARACTERISTICS ANTI-PARALLEL DIODE INSTANTANEOUS FORWARD CURRENT vs INSTANTANEOUS FORWARD VOLTAGE FORWARD CURRENT TRANSFER RATIO vs COLLECTOR CURRENT LD125CHF 30 LD125CVF 10 TC = 25°C IE - Instantaneous Forward Current - A hFE - Forward Current Transfer Ratio TC = 25°C 10 VCE = 1 V VCE = 5 V VCE = 10 V 3·0 0.01 1·0 0·1 0·01 0.1 1·0 10 100 0 IC - Collector Current - A 0·5 1·0 1·5 2·0 2·5 VEC - Instantaneous Forward Voltage - V Figure 1. Figure 2. BASE-EMITTER SATURATION VOLTAGE vs CASE TEMPERATURE LD125CVB VBE(sat) - Base-Emitter Saturation Voltage - V 1.0 IC = 1.5 A IB = 0.3 A 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100 125 150 TC - Case Temperature - °C Figure 3. PRODUCT INFORMATION 3 BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 MAXIMUM SAFE OPERATING REGIONS MAXIMUM FORWARD-BIAS SAFE OPERATING AREA 100 MAXIMUM REVERSE-BIAS SAFE OPERATING AREA LD125CFB LD125CRB 14 BULD125KC TC = 25°C IB(on) = I C / 5 VBE(off) = -5 V TC = 25°C 10 IC - Collector Current - A IC - Collector Current - A 12 1·0 0·1 tp = 100 µs tp = 1 ms tp = 10 ms DC Operation 0·01 1·0 10 8 6 4 2 0 10 100 1000 0 100 VCE - Collector-Emitter Voltage - V 200 300 400 500 600 700 VCE - Collector-Emitter Voltage - V Figure 4. Figure 5. THERMAL INFORMATION ZθJA/Rθ JA - Normalised Transient Thermal Impedance THERMAL RESPONSE JUNCTION TO AMBIENT vs POWER PULSE DURATION 1·0 BULD125KC TA = 25°C 40% 20% 10% 0·1 t1 0·01 0% duty cycle = t1/t2 Read time at end of t1, t2 Z T J ( max ) – T A = P D ( peak ) • θ JA • R θ JA ( max) R θ JA 0·001 10-4 10 -3 10 -2 10-1 100 t1 - Power Pulse Duration - s Figure 6. PRODUCT 4 LD125CZA 60% INFORMATION 101 102 103 800 BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 THERMAL INFORMATION Zθ JC/Rθ JC - Normalised Transient Thermal Impedance THERMAL RESPONSE JUNCTION TO CASE vs POWER PULSE DURATION LD125CZC 1·0 BULD125KC TC = 25°C 60% 40% 20% 10% 0% 0·1 t1 duty cycle = t1/t2 Read time at end of t1, t2 Z T J ( max ) – T C = P D ( peak) • θ JC • R θ JC ( max ) R θ JC 0·01 10-4 10 -3 10-2 10-1 100 101 102 t1 - Power Pulse Duration - s Figure 7. MAXIMUM POWER DISSIPATION JUNCTION TO AMBIENT vs POWER PULSE DURATION LD125CPA Ptot - Maximum Power Dissipation - W 1000 BULD125KC TA = 25°C 0% 100 10% 10 20% 40% 60% 1·0 10-4 10-3 10-2 10-1 10 0 101 102 103 t1 - Power Pulse Duration - s Figure 8. PRODUCT INFORMATION 5 BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 THERMAL INFORMATION MAXIMUM POWER DISSIPATION JUNCTION TO CASE vs POWER PULSE DURATION Ptot - Maximum Power Dissipation - W 1000 0% BULD125KC TC = 25°C 10% 20% 40% 60% 100 10 10-4 10-3 10-2 10-1 t1 - Power Pulse Duration - s Figure 9. PRODUCT 6 LD125CPC INFORMATION 100 101 102 BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 MECHANICAL DATA TO-220 3-pin plastic flange-mount package This single-in-line package consists of a circuit mounted on a lead frame and encapsulated within a plastic compound. The compound will withstand soldering temperature with no deformation, and circuit performance characteristics will remain stable when operated in high humidity conditions. Leads require no additional cleaning or processing when used in soldered assembly. TO220 4,70 4,20 ø 10,4 10,0 3,96 3,71 1,32 1,23 2,95 2,54 see Note B 6,6 6,0 15,90 14,55 see Note C 6,1 3,5 1,70 1,07 0,97 0,61 1 2 14,1 12,7 3 2,74 2,34 5,28 4,88 VERSION 1 0,64 0,41 2,90 2,40 VERSION 2 ALL LINEAR DIMENSIONS IN MILLIMETERS NOTES: A. The centre pin is in electrical contact with the mounting tab. B. Mounting tab corner profile according to package version. C. Typical fixing hole centre stand off height according to package version. Version 1, 18.0 mm. Version 2, 17.6 mm. PRODUCT MDXXBE INFORMATION 7 BULD125KC NPN SILICON TRANSISTOR WITH INTEGRATED DIODE MAY 1994 - REVISED SEPTEMBER 1997 IMPORTANT NOTICE Power Innovations Limited (PI) reserves the right to make changes to its products or to discontinue any semiconductor product or service without notice, and advises its customers to verify, before placing orders, that the information being relied on is current. PI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with PI's standard warranty. Testing and other quality control techniques are utilized to the extent PI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except as mandated by government requirements. PI accepts no liability for applications assistance, customer product design, software performance, or infringement of patents or services described herein. Nor is any license, either express or implied, granted under any patent right, copyright, design right, or other intellectual property right of PI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. PI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, INTENDED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT APPLICATIONS, DEVICES OR SYSTEMS. Copyright © 1997, Power Innovations Limited PRODUCT 8 INFORMATION