TI SN74TVC3306

SN74TVC3306
DUAL VOLTAGE CLAMP
SCDS112C – MARCH 2001 – REVISED MARCH 2002
D
D
D
D
D
D
DCT OR DCU PACKAGE
(TOP VIEW)
Designed to Be Used in Voltage-Limiting
Applications
3.5-Ω On-State Connection Between Ports
A and B
Flow-Through Pinout for Ease of Printed
Circuit Board Trace Routing
Direct Interface With GTL+ Levels
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
GND
A1
A2
A3
1
8
2
7
3
6
4
5
GATE
B1
B2
B3
description
The SN74TVC3306 provides three parallel NMOS pass transistors with a common unbuffered gate. The low
on-state resistance of the switch allows connections to be made with minimal propagation delay.
The device can be used as a dual switch, with the gates cascaded together to a reference transistor. The
low-voltage side of each pass transistor is limited to a voltage set by the reference transistor. This is done to
protect components with inputs that are sensitive to high-state voltage-level overshoots.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
PACKAGE†
TA
–40°C
40°C to 85°C
TOP-SIDE
MARKING
SSOP – DCT
Tape and reel
SN74TVC3306DCTR
FA6
VSSOP – DCU
Tape and reel
SN74TVC3306DCUR
FA6
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
logic diagram (positive logic)
GATE
8
1
GND
B1
7
B2
6
B3
5
2
3
4
A1
A2
A3
NOTE A: The SN74TVC3306 has bidirectional capability across many voltage levels. The voltage levels documented in this data sheet are
examples.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SN74TVC3306
DUAL VOLTAGE CLAMP
SCDS112C – MARCH 2001 – REVISED MARCH 2002
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input/output voltage range, VI/O (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Continuous channel current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): DCT package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 220°C/W
DCU package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 227°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and input/output negative-voltage ratings may be exceeded if the input and input/output clamp-current ratings are
observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
MAX
VI/O
VGATE
Input/output voltage
0
5
V
GATE voltage
0
5
V
IPASS
TA
Pass transistor current
64
mA
85
°C
Operating free-air temperature
–40
UNIT
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
VIK
IIH
II = –18 mA,
VI = 5 V,
Ci(GATE)
VI = 3 V or 0
Cio(off)
VO = 3 V or 0,
VGATE = 0
Cio(on)
VO = 3 V or 0,
VGATE = 3 V
VGATE = 4.5 V
VI = 0
MAX
UNIT
–1.2
V
5
µA
11
IO = 64 mA
ron§
VI = 2
2.4
4V
TYP‡
VGATE = 0
VGATE = 0
4
6
pF
10.5
12.5
pF
3.5
5.5
VGATE = 3 V
4.7
7
VGATE = 2.3 V
6.3
9.5
VGATE = 1.5 V
25.5
32
4.8
7.5
14.7
23
VGATE = 4.5 V
IO = 15 mA
pF
VGATE = 3 V
Ω
VI = 1.7 V
VGATE = 2.3 V
11.3
16.5
‡ All typical values are at TA = 25°C.
§ Measured by the voltage drop between the A and B terminals at the indicated current through the switch. On-state resistance is determined by
the lowest voltage of the two (A or B) terminals.
2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74TVC3306
DUAL VOLTAGE CLAMP
SCDS112C – MARCH 2001 – REVISED MARCH 2002
ac performance (translating down)
switching characteristics over recommended operating free-air temperature range, VGATE = 3.3 V,
VIH = 3.3 V, VIL = 0, and VM = 1.15 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
CL = 50 pF
CL = 30 pF
CL = 15 pF
MIN
MAX
MIN
MAX
MIN
MAX
0
0.8
0
0.6
0
0.3
0
1.2
0
1
0
0.5
UNIT
ns
switching characteristics over recommended operating free-air temperature range, VGATE = 2.5 V,
VIH = 2.5 V, VIL = 0, and VM = 0.75 V (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
CL = 50 pF
CL = 30 pF
CL = 15 pF
MIN
MAX
MIN
MAX
MIN
MAX
0
1
0
0.7
0
0.4
0
1.3
0
1
0
0.6
UNIT
ns
ac performance (translating up)
switching characteristics over recommended operating free-air temperature range, VGATE = 3.3 V,
VIH = 2.3 V, VIL = 0, VT = 3.3 V, VM = 1.15 V, and RL = 300 Ω (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
CL = 50 pF
CL = 30 pF
CL = 15 pF
MIN
MAX
MIN
MAX
MIN
MAX
0
0.9
0
0.6
0
0.4
0
1.4
0
1.1
0
0.7
UNIT
ns
switching characteristics over recommended operating free-air temperature range, VGATE = 2.5 V,
VIH = 1.5 V, VIL = 0, VT = 2.5 V, VM = 0.75 V, and RL = 300 Ω (unless otherwise noted) (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
POST OFFICE BOX 655303
CL = 50 pF
CL = 30 pF
CL = 15 pF
MIN
MAX
MIN
MAX
MIN
MAX
0
1
0
0.6
0
0.4
0
1.3
0
1.3
0
0.8
• DALLAS, TEXAS 75265
UNIT
ns
3
SN74TVC3306
DUAL VOLTAGE CLAMP
SCDS112C – MARCH 2001 – REVISED MARCH 2002
PARAMETER MEASUREMENT INFORMATION
VT
RL
USAGE
SWITCH
Translating up
Translating down
S1
S2
S1
Open
From Output
Under Test
VIH
S2
Input
VM
VM
VIL
CL
(see Note A)
VOH
Output
VM
LOAD CIRCUIT
VM
VOL
NOTES: A. CL includes probe and jig capacitance.
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2 ns, tf ≤ 2 ns.
C. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit for Outputs
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SN74TVC3306
DUAL VOLTAGE CLAMP
SCDS112C – MARCH 2001 – REVISED MARCH 2002
APPLICATION INFORMATION
VDDREF = 3.3 V
Motherboard
Interface
150 Ω
150 Ω
B1 (VBIAS)†
7
B2
6
B3
5
2
A1
3
A2
4
A3
200 kΩ
GATE
8
VDPU = 2.5 V
TVC3306
1
VREF† = 1.5 V
Open-Drain
CPU Interface
† VREF and VBIAS can be applied to any one of the pass transistors. GATE must be connected externally to VBIAS.
Figure 2. Typical Application Circuit
For the clamping configuration, the common GATE input must be connected to one side (An or Bn) of any one of the
pass transistors, making that the VBIAS connection of the reference transistor and the opposite side (Bn or An) the
VREF connection. When VBIAS is connected through a 200-kΩ resistor to a 3-V to 5.5-V VCC supply and VREF is set
to 0 V to VCC – 0.6 V, the output of each switch has a maximum clamp voltage equal to VREF. A filter capacitor on
VBIAS is recommended.
application operating conditions (see Figure 2)
MIN
VBIAS
VGATE
BIAS voltage
VREF
VDPU
Reference voltage
IPASS
IREF
Pass-transistor current
VREF + 0.6
VREF + 0.6
GATE voltage
Drain pullup voltage
• DALLAS, TEXAS 75265
5
V
UNIT
2.1
5
V
1.5
4.4
V
2.36
2.5
2.64
V
–40
POST OFFICE BOX 655303
MAX
2.1
0
Reference-transistor current
TA
Operating free-air temperature
‡ All typical values are at TA = 25°C.
TYP‡
14
mA
5
µA
85
°C
5
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Copyright  2002, Texas Instruments Incorporated