RF2870 0 CDMA LOW NOISE AMPLIFIER/MIXER 900MHz DOWNCONVERTER Typical Applications • CDMA Cellular Systems • General Purpose Downconverter • JCDMA Cellular Systems • Commercial and Consumer Systems • AMPS Cellular Systems • Portable Battery-Powered Equipment Product Description 0.10 C A -A- The RF2870 is a receiver front-end for CDMA cellular applications. It is designed to amplify and downconvert RF signals, while providing 28.5dB of stepped gain control range. Features include digital control of LNA gain, mixer gain, and power down mode. Another feature of the chip is adjustable IIP3 of the mixer using an off-chip current setting resistor. Noise figure, IP3, and other specs are designed to be compatible with the IS-98B interim standard for CDMA cellular communications. The IC is manufactured on an advanced Silicon Germanium BiCMOS process and is assembled in a 3mmx3mm, 16pin, QFN package. 3.00 0.05 C 2 PLCS 0.90 0.85 1.50 TYP 0.70 0.65 0.05 0.00 2 PLCS 0.10 C B 3.00 12° MAX 2 PLCS 0.10 C B -B- 1.37 TYP 2 PLCS SEATING PLANE -CDimensions in mm. 2.75 SQ 0.10 C A 0.10 M C A B 0.60 0.24 TYP 0.30 0.18 2 PIN 1 ID R.20 NOTES: 1. Shaded lead is pin 1. 2 Dimension applies to plated terminal: to be measured between 0.20 mm and 0.25 mm from terminal end. 1.65 SQ. 1.35 0.50 0.30 0.50 Optimum Technology Matching® Applied Si BJT GaAs HBT GaAs MESFET Si Bi-CMOS SiGe HBT Si CMOS InGaP/HBT GaN HEMT 9SiGe Bi-CMOS Package Style: QFN, 16-Pin, 3x3 Features • 3mmx3mm LNA/Mixer Solution MIX IN ISET1 ISET2 MIX GAIN • Adjustable Mixer Current/IIP3 16 15 14 13 • Meets IMD Tests with Three Gain States/Two Logic Control Lines IF OUT+ 1 12 LNA OUT IF OUT- 2 11 LNA EMITTER • Integrated TX LO Buffer Amplifier • All Pins ESD Protected GND 3 10 LNA IN 5 6 7 8 LO OUT TX BUFF ENABLE ENABLE 9 LNA GAIN VCC LO IN 4 Functional Block Diagram Rev A8 030507 Ordering Information RF2870 RF2870 PCBA CDMA Low Noise Amplifier/Mixer 900MHz Downconverter Fully Assembled Evaluation Board RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 8-1 RF2870 Absolute Maximum Ratings Parameter Supply Voltage Input LO and RF Levels Operating Ambient Temperature Storage Temperature Parameter Rating Unit -0.5 to +5.0 +6 -40 to +85 -40 to +150 VDC dBm °C °C Specification Min. Typ. Max. Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). Unit T = 25°C, VCC =2.75V Overall RF Frequency Range IF Frequency Range Condition 800 to 900 0.1 400 MHz MHz 3.15 VS +0.6 0.4 V V V Power Supply Supply Voltage, VS Logic High Logic Low 2.65 1.8 2.75 Cellular Band JCDMA Band LNA (On) Gain Noise Figure Input IP3 Isolation Freq=869MHz to 894MHz Freq=832MHz to 870MHz LNA 50Ω match 13.0 +9.0 14.5 1.1 +11.5 23 16.0 1.3 dB dB dBm dB -3.0 3.0 +25.0 3.5 -2.0 4.0 dB dB dBm dB 13.0 2.0 6.5 14.0 +3.0 +14.5 14.5 3.5 7.5 16.0 dB dB dB dB dBm dBm dB dB LNA (Off) Gain Noise Figure Input IP3 Isolation -4.0 +20.0 Mixer - CDMA/JCDMA/FM Gain 11.5 0.5 Noise Figure Input IP3 LO to RF Isolation 8-2 +1.0 +12.5 36 Mixer Preamp ON Mixer Preamp OFF Mixer Preamp ON (TX Buffer OFF) Mixer Preamp OFF Mixer Preamp ON Mixer Preamp OFF Mixer Preamp ON Mixer Preamp OFF Rev A8 030507 RF2870 Parameter Specification Min. Typ. Max. Unit Condition Cellular Band JCDMA Band, cont’d Other LO-IF Isolation RF-IF Isolation LNA Out to Mixer In Isolation LO-LNA In Isolation, Any State 30 40 40 35 dB dB dB dB Control Lines Input Capacitance 1 pF LNA GAIN, ENABLE, MIX GAIN, TX BUFF ENABLE 0 710 1078 809 979 dBm MHz MHz MHz MHz IF=184MHz IF=184MHz IF=85MHz IF=85MHz 0 760 980 dBm MHz MHz IF=110MHz IF=110MHz -2.0 710 1078 809 979 dBm MHz MHz MHz MHz mA Single-ended 50Ω load IF=184MHz IF=184MHz IF=85MHz IF=85MHz dBm MHz MHz mA Single-ended 50Ω load IF=110MHz IF=110MHz Local Oscillator Input Cellular - CDMA or FM Input Power Input Frequency Cellular - JCDMA Input Power Input Frequency -10 685 1053 784 954 -4 -10 722 942 -4 -9.0 685 1053 784 954 -5.5 TX (Local Oscillator) Buffer Cellular - CDMA or FM Output Power Output Frequency Current Consumption Cellular - JCDMA Output Power Output Frequency Current Consumption Rev A8 030507 2 -9 722 942 -5.5 760 980 2 8-3 RF2870 Evaluation Board Current Measurement (Typical Values for VCC =2.75V) ENABLE LNA GAIN MIX GAIN TX BUFF ENABLE IDC (mA) 0 1 X 0 X 0 X 0 <0.01 26.5 1 0 1 0 20.6 1 1 1 0 20.9 1 1 0 0 15.0 Gain Control State Power Down LNA On, Mixer Preamp On, TX Buffer Off LNA On, Mixer Preamp Off, TX Buffer Off LNA Bypassed, Mixer Preamp On, TX Buffer Off LNA Bypassed, Mixer Preamp Off, TX Buffer Off NOTES: All IDC current numbers include bias circuitry current of 1.5mA to 2.0mA (dependent on mode). TX Buffer On: Add 2.4mA to total current. Cascaded Performance (Typical Values for VCC =2.75V) NOTE: All total current numbers include bias circuitry current of 1.5mA to 2.0mA (dependent on mode). CELL CDMA Parameter LNA ON LNA OFF Mixer Preamp On Cascaded: Gain (dB) Noise Figure (dB) Input IP3 (dBm) 25.0 1.9 -9.0 7.5 12.0 +8.4 LO to IF Isolation (dB) 30 30 IF1 to RF Isolation (dB) 40 40 IF2 to RF Isolation (dB) 40 40 LO to LNA IN Isolation (dB) 45 45 Total Current (mA) 26.5 20.9 NOTE: Assumes 2.5dB image filter insertion loss. The TX Buffer Enable is off. LNA ON LNA OFF Mixer Preamp Off 14.0 4.5 +2.0 -3.5 19.5 +18.8 30 40 40 45 20.6 30 40 40 45 15.0 Gain Control State Table Gain State High Gain Mid Gain Low Gain Ultra-Low Gain 8-4 LNA Gain Logic Input 0 0 1 1 Mix Gain Logic Input 0 1 1 0 Corresponding Device State LNA Mixer Amplifier Preamp On On On Off Off On Off Off Comments IMD Test 1 and 2 IMD Test 3 and 4 IMD Test 5 and 6 Rev A8 030507 RF2870 Pin 1 Function IF OUT+ 2 3 4 IF OUTGND LO IN Description CDMA IF output. Open collector. CDMA IF output. Open collector. Interface Schematic CDMA+ CDMA- See pin 1. LO single-end input. Matched to 50Ω. LO IN 70 Ω 5 6 7 8 VCC LO OUT TX BUFF ENABLE External bypass capacitor may be required. ENABLE Logic input. Low level powers down the IC. LO output. Internal DC block. Drives 50Ω. Logic input. High enables TX LO output buffer amplifiers. TX BUF ENABLE 9 LNA GAIN Logic input. See Gain Control State table. LNA GAIN 10 LNA IN Cellular LNA input. VCC CELL LNA OUT CELL LNA IN CELL LNA EMITTER 11 12 LNA EMITTER LNA OUT 13 MIX GAIN Cellular LNA emitter. A small inductor connects this pin to ground. Cellular LNA gain can be adjusted by the inductance. See pin 10. Cellular LNA output. Simple external L-C components required for matching and VCC supply. Logic input. See Gain Control State table. See pin 10. MIX GAIN 14 ISET2 15 16 ISET1 MIX IN An external resistor R2 connected to this pin sets the current of the mixer. Decreasing resistance increases current. Sets internal voltage reference. External resistor required. Cellular mixer RF single-end input. Matched to 50Ω. CELL MIX IN Pkg Base GND Rev A8 030507 Ground connection. The backside of the package should be soldered to a top side ground pad which is connected to the ground plane with multiple vias. 8-5 RF2870 ISET Pins ISET1 sets the internal reference voltage for the bias control circuits to all functional blocks. An external resistor of 4.3kΩ to ground is recommended. We do not recommend adjusting this resistor value. This resistor is pulled out to allow for a higher precision off chip value and not as a significant tuning adjustment. ISET2 sets the DC current through the mixer and mixer preamplifier. Higher resistance to ground results in lower current. Lower current will improve mixer NF but will degrade IIP3. Mixer and the mixer preamp gain is not significantly changed with current. 8-6 Rev A8 030507 RF2870 Application Schematic Differential IF SAW Filter Topology MIX GAIN Note 3 0.1 µF 3.9 nH 3 GND 4.3 kΩ 6.8 kΩ VCC 10 4 CDMA IF- 9 5 L1 R1 C1 GND 4 1 3.0 pF Note 1 Note 8 IF Saw CDMA IF+ GND 2 Note 2 C2 FL4 RF Saw 5 Note 6 GND IN 6 OUT 1.2 pF 16 15 14 Notes 7, 9 13 10 nH L2 C3 C2 1 12 2 11 3 10 VCC 100 pF 1.2 nH L1 Notes 4, 9 Note 3 CELL LNA IN 33 nF LO IN 4 33 nH 9 5 6 7 Notes 5, 9 8 LNA GAIN 33 nF VCC ENABLE Note 8 2.2 nH 2870310, Rev. 1 TX BUF EN LO OUT NOTES: Differential IF tuning components are dependent on IF frequency board layout and board parasitics. Please consult RFMD applications engineering for tuning assistance. If any functional blocks are not being used, the unused pins can be left with no connection. IF output matching component values are dependent on board layout, IF SAW filter and the IF frequency selected. Please contact RFMD application engineering for assistance with IF output matching. 1. 2. 3. 4. 5. 6. 7. 8. 9. This resistor sets the mixer preamp and mixer currents. Lowering the resistance results in higher currents. Sets internal bias voltage. Recommend 4.3kΩ. DC-blocking capacitor. Determines trade-off between IIP3 and gain. Higher value inductor means lower gain and higher IIP3. Cell LNA input matching for optimum IIP3. Low impedance path to ground at low frequency for optimum IIP3. Mixer input matching. For output matching and a DC supply bias choke. Input or output matching. Coupling of coils on the input, output and emitter of the LNA should be minimized to reduce the risk of oscillation. We recommend separating the inductors and/or positioning them 90° relative to each other. Layout Note: To minimize losses and radiation, the RF signal traces should be as short as possible. The IF+ and IF- output traces should be symmetrical. All bypass capacitors and matching capacitors must have a ground via very close to the capacitor. Each capacitor should have its own ground via. All traces should be 50Ω transmission lines. Position inductors to reduce coupling. (See note 9.) Rev A8 030507 8-7 RF2870 Application Schematic Single-End IF Matching MIX GAIN Note 3 5 0.1 µF 1.2 pF 6 GND OUT 3.9 nH RF Saw GND 4 Note 6 GND IN GND 1 2 3 Note 2 C1 C3 10 4 9 5 100 pF CDMA IF Saw 6.8 kΩ 3.0 pF Note 1 VCC CDMA IF+ CDMA IF- 4.3 kΩ L2 L1 R C2 16 15 Note 8 14 VCC 13 Notes 7, 9 C1 1 12 2 11 3 10 100 pF 10 nH Notes 4, 9 1.2 nH CELL LNA IN 33 nF LO IN VCC 4 9 5 6 2.2 nH Note 8 7 Note 3 33 nH Notes 5, 9 8 LNA GAIN ENABLE TX BUF EN LO OUT See notes on previous page. 8-8 Rev A8 030507 RF2870 IF Output Interface Network Single-End IF Matching C1 C3 CDMA IF+ CDMA IF- 10 4 9 5 IF+ VCC L2 L1 R C2 IF- CDMA IF Saw 100 pF C1 L1, C1, C2, and R form a current combiner which performs a differential to single-ended conversion at the IF frequency and sets the output impedance. In most cases, the resonance frequency is independent of R and can be set according to the following equation: 1 f IF = ----------------------------------------------------------L1 2π ------ ( C 1 + 2C 2 + C EQ ) 2 Where CEQ is the equivalent stray capacitance and capacitance looking into pins 9 and 10. An average value to use for CEQ is 2.5pF. R can then be used to set the output impedance according to the following equation: 1- – 1 1 - – ----R = -------------------4 ⋅ R OUT R P where ROUT is the desired output impedance and RP is the parasitic equivalent parallel resistance of L1. C2 should first be set to 0 and C1 should be chosen as high as possible (not greater than 39pF), while maintaining an RP of L1 that allows for the desired ROUT. If the self-resonant frequencies of the selected C1 produce unsatisfactory linearity performance, their values may be reduced and compensated for by including C2 capacitor with a value chosen to maintain the desired FIF frequency. L2 and C3 serve dual purposes. L2 serves as an output bias choke, and C3 serves as a series DC block. In addition, L2 and C3 may be chosen to form an impedance matching network if the input impedance of the IF filter is not equal to ROUT. Otherwise, L2 is chosen to be large (suggested 120nH) and C3 is chosen to be large (suggested 22nF) if a DC path to ground is present in the IF filter, or omitted if the filter is DC-blocked. Rev A8 030507 8-9 RF2870 Differential IF Matching C2 CDMA IF Saw IF+ VCC CDMA IF+ CDMA IF- 10 4 9 5 L1 R C1 IF- L2 100 pF C2 L1 L1 and C1 are chosen to resonate at the desired IF frequency. C1 can be omitted and the value of L1 increased and utilized solely as a choke to provide VCC to the open-collector outputs, but it is strongly recommended that at least some small-valued C1 (a few pF) be retained for better mixer linearity performance. R is normally selected to match the input impedance of the IF filter. However, mixer performance can be modified by selecting an R value that is different from the IF filter input impedance, and inserting a conjugate matching network between the Resistive Output Network and the IF filter. C2 serve dual purposes. C2 serves as a series DC block when a DC path to ground is present in the IF filter. In addition, C2 may be chosen to improve the combine performance of the mixer and IF filter. L2 should choose to resonate with the internal capacitance of the SAW filter. Usually, SAW filter has some capacitance. Otherwise, L2 could be eliminated. A practical approach to obtain the differential matching is to tune the mixer to the correct load point for gain, IIP3, and NF using the single-end current combiner method. Second, use the component values found in the single-end approach as starting point for the differential matching. The two-shunt capacitors in the single-end could be converted in a parallel capacitor and the parallel inductor in the single-end need to be converted in two-choke inductor. Third, set the DC block capacitors (C2) in the differential-end matching to a high value (i.e., 100pF) and retune the resonate circuit (C1 & L1) and the resistor (R) for optimal performance. After optimal performance is achieved and if performance is not satisfactory, decrease the series capacitors until optimal performance is achieved. 8-10 Rev A8 030507 RF2870 Evaluation Board Schematic IF Frequency=183.6MHz P3 P2 1 P1-1 C54 33 nF P1-2 C46 33 nF P1-3 C53 33 nF P1-4 C55 33 nF J7 CELL MIX IN 1 VCC1 2 GND MIX GAIN 3 GND LNA GAIN CON3 ENABLE P3-1 2 TX BUF EN 3 4 C20 1 µF + CON4 50 Ω µstrip MIX GAIN C9 0.1 µF C2 33 nF FL2 IF Saw DNI C12 DNI C10 DNI J4 LO IN FL4 RF Saw 5 3 GND OUT 6 GND GND GND IN 50 Ω µstrip C56 DNI L9 3.9 nH 4 1 2 J2 CDMA IF C13 1.2 pF C6 33 nF 10 L2 DNI L26 DNI C8 DNI 4 9 5 R5 4.3 kΩ C17 8.2 pF L6 220 nH VCC C11 DNI C22 100 pF L8 68 nH R2 9.1 kΩ C35 DNI C3 16 pF L7 DNI 16 C5 16 pF 15 C58 DNI 14 13 C69 3.0 pF L21 10 nH 1 12 2 11 3 10 50 Ω µstrip VCC J8 CELL LNA OUT C25 100 pF L5 1.5 nH 50 Ω µstrip C31 DNI 50 Ω µstrip R4 6.8 kΩ 4 C4 33 nF 9 5 6 7 J9 CELL LNA IN L1 33 nH 8 VCC C7 33 nF LNA GAIN ENABLE J5 LO OUT L17 2.2 nH 50 Ω µstrip TX BUF EN Evaluation Board Schematic IF Frequency=85.38MHz (Stock Evaluation Boards are at this IF) P2 1 P1-1 P3 1 VCC1 2 GND MIX GAIN 3 GND LNA GAIN CON3 ENABLE P1-2 2 TX BUF EN P1-3 3 P1-4 4 P3-1 C20 1 µF + CON4 J6 CELL MIX IN 50 Ω µstrip MIX GAIN C9 0.1 µF 1 GND C2 33 nF C10 DNI 50 Ω µstrip C6 33 nF FL2 IF SAW C12 DNI J2 LO IN C56 DNI C13 1.2 pF 50 Ω µstrip GND L3 3.9 nH L2 DNI C11 DNI 9 5 10 4 C8 DNI C3 43 pF C17 18 pF L26 DNI VCC C22 100 pF L8 220 nH L7 DNI L11 150 nH R2 DNI R5 4.3 kΩ C35 DNI C5 43 pF C31 DNI 16 R4 6.8 kΩ 15 C58 DNI 14 13 C69 3.0 pF L21 10 nH 1 12 2 11 3 10 4 FL6 Filter SAWTEK_2x2_5 3 J1 CDMA IF C53 33 nF 50 Ω µstrip VCC L3 DNI L4 1.2 nH VCC 6 7 8 C55 33 nF L1 33 nH 50 Ω µstrip L6 DNI 50 Ω µstrip J4 CELL LNA IN LNA GAIN ENABLE C7 10 pF J3 LO OUT L5 DNI C4 33 nF 9 5 J5 CELL LNA OUT C25 33 nF L17 2.2 nH C54 33 nF 2870400, Rev. - TX BUF EN C46 33 nF Rev A8 030507 8-11 RF2870 Evaluation Board Layout Board Size 2”x2” Board Thickness 0.061”, Board Material FR-4, Multi-Layer 8-12 Assembly Top Mid Back Rev A8 030507 RF2870 PCB Design Requirements PCB Surface Finish The PCB surface finish used for RFMD’s qualification process is Electroless Nickel, immersion Gold. Typical thickness is 3µinch to 8µinch Gold over 180µinch Nickel. PCB Land Pattern Recommendation PCB land patterns are based on IPC-SM-782 standards when possible. The pad pattern shown has been developed and tested for optimized assembly at RFMD; however, it may require some modifications to address company specific assembly processes. The PCB land pattern has been developed to accommodate lead and package tolerances. PCB Metal Land Pattern A = 0.28 x 0.69 (mm) Typ. 1.50 (mm) Typ. B = 0.69 x 0.28 (mm) Typ. C = 1.60 (mm) Sq. 0.50 (mm) Typ. Pin 16 A A A 0.75 (mm) Typ. A Pin 1 Pin 12 B B 0.50 (mm) Typ. B B C B B B B 1.50 (mm) Typ. 0.60 (mm) Typ. A A A A Pin 8 0.60 (mm) Typ. 0.75 (mm) Typ. Figure 1. PCB Metal Land Pattern (Top View) Rev A8 030507 8-13 RF2870 PCB Solder Mask Pattern Liquid Photo-Imageable (LPI) solder mask is recommended. The solder mask footprint will match what is shown for the PCB metal land pattern with a 2mil to 3mil expansion to accommodate solder mask registration clearance around all pads. The center-grounding pad shall also have a solder mask clearance. Expansion of the pads to create solder mask clearance can be provided in the master data or requested from the PCB fabrication supplier. A = 0.38 x 0.79 (mm) Typ. 1.50 (mm) Typ. B = 0.79 x 0.38 (mm) Typ. C = 1.70 (mm) Sq. 0.50 (mm) Typ. Pin 16 A A A 0.75 (mm) Typ. A Pin 1 Pin 12 B B 0.50 (mm) Typ. B B C B B B B 1.50 (mm) Typ. 0.60 (mm) Typ. A A A A Pin 8 0.60 (mm) Typ. 0.75 (mm) Typ. Figure 2. PCB Solder Mask Pattern (Top View) 8-14 Rev A8 030507