RFMD RF2418PCBA

RF2418
8
LOW CURRENT LNA/MIXER
Typical Applications
• UHF Digital and Analog Receivers
• Commercial and Consumer Systems
• Digital Communication Systems
• 433MHz and 915MHz ISM Band Receivers
• Spread-Spectrum Communication Systems • General Purpose Frequency Conversion
Product Description
0.156
0.148
GaAs HBT
Si Bi-CMOS
SiGe HBT
ü
0.010
0.004
0.347
0.339
0.050
0.252
0.236
0.059
0.057
8
8° MAX
0° MIN
0.0500
0.0164
Optimum Technology Matching® Applied
Si BJT
.018
.014
FRONT-ENDS
The RF2418 is a monolithic integrated UHF receiver
front-end. The IC contains all of the required components
to implement the RF functions of the receiver except for
the passive filtering and LO generation. It contains an
LNA (low-noise amplifier), a second RF amplifier, a dualgate GaAs FET mixer, and an IF output buffer amplifier
which will drive a 50Ω load. In addition, the IF buffer
amplifier may be disabled and a high impedance output is
provided for easy matching to IF filters with high impedances. The output of the LNA is made available as an
output to permit the insertion of a bandpass filter between
the LNA and the RF/Mixer section. The LNA section may
be disabled by removing the VDD1 connection to the IC.
0.010
0.007
Package Style: SOIC-14
GaAs MESFET
Si CMOS
Features
• Single 3V to 6.5V Power Supply
• High Dynamic Range
LNA
14 LNA OUT
LNA IN 1
• Low Current Drain
GND 2
13 GND
VDD1 3
12 GND
RF AMP
• High LO Isolation
• LNA Power Down Mode for Large Signals
11 RF IN
VDD2 4
10pF
10 GND
IF BYP 5
IF2 OUT 6
BUFFER
IF1 OUT 7
9 DEC
MIXER
8 LO IN
Functional Block Diagram
Rev A6 010717
Ordering Information
RF2418
RF2418 PCBA
Low Current LNA/Mixer
Fully Assembled Evaluation Board
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
8-35
RF2418
Absolute Maximum Ratings
Parameter
Supply Voltage
Input LO and RF Levels
Ambient Operating Temperature
Storage Temperature
Parameter
Rating
Unit
-0.5 to 7
+6
-40 to +85
-40 to +150
VDC
dBm
°C
°C
Specification
Min.
Typ.
Max.
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
Unit
Condition
T = 25°C, VCC =5V, RF=850MHz,
LO=921MHz
Overall
RF Frequency Range
Cascade Power Gain
Cascade IP3
Cascade Noise Figure
400 to 1100
23
-13
2.4
MHz
dB
dBm
dB
High impedance output
Referenced to the input
Single sideband, includes image filter with
1.0dB insertion loss
8
Noise Figure
Input VSWR
Input IP3
Gain
Reverse Isolation
Output VSWR
FRONT-ENDS
First Section (LNA)
Noise Figure
Input VSWR
Input IP3
Conversion Power Gain
Output Impedance
+3.0
13
1.8
1.5:1
+4.0
14
40
1.5:1
2.0
dB
With external series matching inductor
dBm
dB
dB
Second Section (RF Amp,
Mixer, IF1)
High impedance output
7
9.5
1.5:1
+1
9
4000||10pF
dB
dBm
dB
Ω
Second Section (RF Amp,
Mixer, IF2)
Noise Figure
Input VSWR
Input IP3
Conversion Gain
Output Impedance
-0.5
5
10
1.5:1
0
6
30
dB
Single Sideband
With external series matching inductor
Open Collector
Buffered output, 50Ω load
Single Sideband
With external series matching inductor
dBm
dB
Ω
LO Input
LO Frequency
LO Level
LO to RF Rejection
LO to IF Rejection
LO Input VSWR
300 to 1200
-6 to +6
15
40
1.3:1
MHz
dBm
dB
dB
With pin 5 connected to ground.
In order to achieve a low VSWR match at
this input, an 82Ω resistor to ground is
placed in parallel with this port.
Power Supply
Voltage
Current Consumption
3.0
12
6
8-36
6.5
14
20
9
26
20
V
mA
mA
mA
VCC =5.0V, LNA On, Mixer On, Buffer Off
VCC =5.0V, LNA On, Mixer On, Buffer On
VCC =5.0V, LNA Off, Mixer On, Buffer Off
Rev A6 010717
RF2418
Function
LNA IN
2
GND
3
VDD1
4
VDD2
5
IF BYP
6
7
8
9
IF2 OUT
IF1 OUT
LO IN
RF BYP
Rev A6 010717
Description
A series 10nH matching inductor is necessary to achieve specified gain
and noise figure at 900MHz. This pin is NOT internally DC-blocked. An
external blocking capacitor must be provided if the pin is connected to a
device with DC present. A DC path to ground (i.e. an inductor or resistor to ground) is, however, acceptable at this pin. If a blocking capacitor
is required, a value of 22pF is recommended.
Interface Schematic
LNA IN
Ground connection. Keep traces physically short and connect immediately to ground plane for best performance.
Supply Voltage for the LNA only. A 22pF external bypass capacitor is
required and an additional 0.01µF is required if no other low frequency
bypass capacitors are near by. The trace length between the pin and
the bypass capacitors should be minimized. The ground side of the
bypass capacitors should connect immediately to ground plane.
For large input signals, VDD1 may be disconnected, resulting in the
LNA’s gain changing from +11dB to -26dB and current drain decreasing by 4mA. If the LNA is never required for use, then this pin can be
left unconnected or grounded, and Pin 11 is used as the first input.
Power supply for the IF buffer amplifier. If the high impedance mixer
output is being used, then this pin is not connected.
If this pin is connected to ground, an internal 10pF capacitor is connected in parallel with the mixer output. This capacitor functions as an
LO trap, which reduces the amount of LO to IF bleed-through and prevents high LO voltages at the mixer output from degrading the mixer’s
dynamic range. At higher IF frequencies, this capacitance, along with
parasitic layout capacitance, should be parallel resonated out by the
choice of the bias inductor value at pin 7. If the internal capacitor is not
connected to ground, the buffer amplifier could become unstable. A
~10pF capacitor should be added at the output to maintain the buffer’s
stability, but the gain will not be significantly affected.
50Ω buffered (open source) output port, one of two output options. Pin
7 must have a bias resistor to VDD and pin 6 must have a bias resistor
to ground (see Buffered Output Application Schematic) in order to turn
the buffer amplifier on. Current drain will increase by approximately
8mA at 5V, and by approximately 5mA at 3V. It is recommended that
these bias resistors be less than 1kΩ.
High impedance (open drain) output port, one of two output options.
This pin must be connected to VDD through a resistor or inductor in
order to bias the mixer, even when using IF2 Output. In addition, a
0.01µF bypass capacitor is required at the other end of the bias resistor
or inductor. The ground side of the bypass capacitor should connect
immediately to ground plane. This output is intended to drive high
impedance IF filters. The recommended matching network is shunt L,
series C (see the application schematic, high impedance output). This
topology will provide matching, bias, and DC-blocking.
Mixer LO input. A high-pass matching network, such as a single shunt
inductor (as shown in the application schematics), is the recommended
topology because it also rejects IF noise at the mixer input. This filtering
is required to achieve the specified noise figures. This pin is NOT internally DC-blocked. An external blocking capacitor must be provided if
the pin is connected to a device with DC present. A DC path to ground
(i.e. an inductor or resistor to ground) is, however, acceptable at this
pin. If a blocking capacitor is required, a value of 22pF is recommended.
Connection for the external bypass capacitor for the mixer RF input
preamp. 1000pF is recommended. The trace length between the pin
and the capacitor should be minimized. The ground side of the bypass
capacitor should connect immediately to ground plane.
8
FRONT-ENDS
Pin
1
IF2 OUT
IF1 OUT
LO IN
8-37
RF2418
Pin
10
11
12
13
14
Function
GND
RF IN
Description
Interface Schematic
Same as pin 2.
Mixer RF Input port. For a 50Ω match at 900MHz use a 15nH series
inductor. This pin is NOT internally DC-blocked. An external blocking
capacitor must be provided if the pin is connected to a device with DC
present. A DC path to ground (i.e. an inductor or resistor to ground) is,
however, acceptable at this pin. If a blocking capacitor is required, a
value of 22pF is recommended.To minimize the mixer’s noise figure, it
is recommended to have a RF bandpass filter before this input. This will
prevent the noise at the image frequency from being converted to the
IF.
Same as pin 2.
GND
GND
LNA OUT
RF IN
Same as pin 2.
50Ω output. Internally DC-blocked.
LNA OUT
Application Schematic
High Impedance Output Configuration
850MHz
8
FRONT-ENDS
10 nH
LNA
RF IN
VDD
1
14
2
13
3
100 nF
47 pF
RF AMP
4
Image Filter 50 Ω
12
15 nH
11
10pF
5
10
1 nF
6
IF Filter, Hi Z
C1
IF OUT
BUFFER
7
VDD
L1
9
MIXER
4 pF
LO IN
8
10 nH
100 nF
L1 and C1 are picked to match the mixer's output impedance (4 kΩ II 10 pF) to the IF
filter's impedance, at the IF frequency. C1 also serves as a DC block, in case the IF filter
is not an open circuit at DC.
8-38
Rev A6 010717
RF2418
Application Schematic
Buffered Output Configuration
850MHz
10 nH
RF IN
VDD
LNA
1
14
2
13
3
100 nF
47 pF
RF AMP
Image Filter, 50 Ω
12
15nH
11
4
10pF
5
10
6
9
C1
1 nF
IF OUT
IF Filter, 50Ω
R1
7
BUFFER
MIXER
4 pF
LO IN
8
10 nH
VDD
R2
L1
8
L1 should parallel resonate, at the IF frequency, with the internal
10pF capacitor plus any extra parasitic layout capacitance.
100 nF
R1 and R2 are bias resistors that set the bias current for the buffer
amplifier. The value recommended is 510 W, each. Higher values
will decrease the current consumption but also decrease the output
level at which voltage clipping begins to occur. At lower IF
frequencies, where the internal 10 pF capacitor does not roll off the
conversion gain, L1 may be eliminated.
FRONT-ENDS
100 nF
C1 is a blocking capacitor, in case the IF filter's input is not an open
circuit at DC.
Rev A6 010717
8-39
RF2418
Evaluation Board Schematic
RF=850MHz, IF=71MHz
(Download Bill of Materials from www.rfmd.com.)
50 Ω µstrip
J1
LNA IN
L3
10 nH
R4
5.11 kΩ
14
2
13
3
RF AMP
P1-3
Jumper
E2 E1
see note
12
50 Ω µstrip
10pF
10
5
6
C1
0.1 µF
L2
18 nH
50 Ω µstrip
11
4
C3
47 pF
R3
610 Ω
J2
IF OUT
50 Ω µstrip
LNA
1
9
BUFFER
MIXER
J4
RF IN
C2
1 nF
C5
3 pF to 5 pF
50 Ω µstrip
8
7
J5
LNA OUT
J3
LO IN
L4
10 nH
TP1
C4
0.1 µF
8
R1
300 Ω
L1
1 µH
see note
2418400C
P1
FRONT-ENDS
NC
VDD
8-40
Notes:
For high impedance output
1) Populate L1 and TP1
2) Remove jumper E1 to E2
P1-3
1
2
GND
3
VDD
Rev A6 010717
RF2418
Evaluation Board Layout
Board Size 1.52” x 1.52”
Board Thickness 0.031”, Board Material FR-4
FRONT-ENDS
8
Rev A6 010717
8-41
RF2418
High Impedance Casc. Gain versus Voltage,
RF=850MHz
26.0
9.5
24.0
9.0
22.0
Gain (dB)
Gain (dB)
High Impedance Mixer Gain versus Voltage, RF=850MHz
10.0
8.5
8.0
20.0
18.0
T =-40
T =-40
7.5
T =26
16.0
T = 26
T = 85
T = 85
7.0
14.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
3.0
3.5
4.0
Voltage (V)
6.0
6.5
-10.0
T =-40
T =-40
-10.5
T = 26
3.5
T =26
T = 85
-11.0
3.0
T = 85
-11.5
IIP3 (dBm)
IIP3 (dBm)
5.5
High Impedance Casc. Input IP3 versus Voltage,
RF=850MHz
4.0
2.5
2.0
-12.0
-12.5
-13.0
-13.5
1.5
-14.0
1.0
-14.5
0.5
-15.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
3.0
3.5
4.0
Voltage (V)
4.5
5.0
5.5
6.0
6.5
6.0
6.5
Voltage (V)
Buffered LNA Gain versus Voltage,
RF=850MHz
Buffered Mixer Gain versus Voltage,
RF=850MHz
17.0
15.0
16.0
14.0
15.0
13.0
14.0
12.0
13.0
11.0
T =-40
Gain (dB)
T = 26
Gain (dB)
FRONT-ENDS
5.0
Voltage (V)
High Impedance Mixer Input IP3 versus Voltage,
RF=850MHz
8
4.5
12.0
11.0
T = 85
10.0
9.0
10.0
8.0
T =-40
9.0
7.0
T = 26
8.0
6.0
T =85
7.0
5.0
3.0
3.5
4.0
4.5
5.0
Voltage (V)
8-42
5.5
6.0
6.5
3.0
3.5
4.0
4.5
5.0
5.5
Voltage (V)
Rev A6 010717
RF2418
Buffered Casc. Gain versus Voltage,
RF=850MHz
Buffered LNA Input versus Voltage,
RF=850MHz
30.0
6.0
T =-40
T =-40
4.0
T =26
25.0
T = 26
T =85
T = 85
0.0
20.0
IIP3 (dBm)
Gain (dB)
2.0
15.0
-2.0
-4.0
-6.0
10.0
-8.0
5.0
-10.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
3.0
3.5
4.0
Voltage (V)
4.5
5.0
5.5
6.0
6.5
Voltage (V)
Buffered Mixer Input IP3 versus Voltage,
RF=850MHz
Buffered Casc. Input IP3 versus Voltage,
RF=850MHz
-10.0
2.0
T =-40
1.5
T =-40
T = 26
1.0
T =26
-11.0
T = 85
8
T = 85
0.5
-0.5
-1.0
FRONT-ENDS
0.0
IIP3 (dBm)
IIP3 (dBm)
-12.0
-13.0
-14.0
-1.5
-2.0
-15.0
-2.5
-3.0
-16.0
3.0
3.5
4.0
4.5
5.0
5.5
6.0
3.0
6.5
3.5
4.0
Voltage (V)
4.5
5.0
5.5
6.0
6.5
Voltage (V)
Buffered LNA Noise Figure versus Voltage,
RF=850MHz Part to Part Variation
Buffered Mixer Noise Figure versus Voltage,
RF=850MHz Part to Part Variation
2.0
11.0
Part 1
Part 1
Part 2
Part 2
Part 3
Part 3
10.5
Part 4
Part 4
1.8
Part 5
Gain (dB)
Gain (dB)
Part 5
10.0
1.6
9.5
1.4
9.0
3.0
3.5
4.0
4.5
5.0
Voltage (V)
Rev A6 010717
5.5
6.0
6.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
Voltage (V)
8-43
RF2418
FRONT-ENDS
8
8-44
Rev A6 010717