STL34NF06 N-CHANNEL 60V - 0.024Ω - 34A PowerFLAT™ LOW GATE CHARGE STripFET™II MOSFET PRELIMINARY DATA TYPE VDSS RDS(on) ID STL34NF06 60 V < 0.028Ω 34 A TYPICAL RDS(on) = 0.024Ω IMPROVED DIE-TO-FOOTPRINT RATIO VERY LOW PROFILE PACKAGE DESCRIPTION This Power MOSFET is the second generation of STMicroelectronics unique “STripFET™” technology. The resulting transistor shows extremely low onresistance and minimal gate charge. The new PowerFLAT™ package allow a significant reduction in board space without compramising performance. PowerFLAT™(5x5) (Chip Scale Package) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS DC-DC CONVERTERS BATTERY MANAGEMENT IN NOMADIC EQUIPMENT ABSOLUTE MAXIMUM RATINGS Symbol VDS VDGR VGS ID IDM () PTOT EAS (1) Tstg Tj Parameter Value Unit Drain-source Voltage (VGS = 0) 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V Gate- source Voltage ± 20 V Drain Current (continuous) at TC = 25°C (*) Drain Current (continuous) at TC = 100°C 34 20 A A Drain Current (pulsed) 136 A Total Dissipation at TC = 25°C 70 W Derating Factor 0.56 W/°C Single Pulse Avalanche Energy 250 mJ –55 to 150 °C Storage Temperature Max. Operating Junction Temperature (•)Pulse width limited by safe operating area (1) Starting Tj = 25°C, ID = 17A, VDD = 42V (*) Current Limited by Wire Bonding is 20A November 2002 1/6 STL34NF06 THERMAL DATA Rthj-case Rthj-pcb (#) Thermal Resistance Junction-case Max 1.8 °C/W Thermal Resistance Junction-ambient Max 31.2 °C/W (*) When mounted on 1inch² FR4 Board, 2oz of Cu, t ≤ 10 sec. ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol V(BR)DSS IDSS IGSS Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 Zero Gate Voltage Drain Current (VGS = 0) VDS = Max Rating Gate-body Leakage Current (VDS = 0) VGS = ± 20V Min. Typ. Max. 60 Unit V 1 VDS = Max Rating, TC = 125 °C µA 10 µA ±100 nA Max. Unit ON (1) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250µA RDS(on) Static Drain-source On Resistance VGS = 10V, ID = 17A Min. Typ. 2 V 0.024 0.028 Ω Typ. Max. Unit DYNAMIC Symbol gfs (1) Parameter Forward Transconductance Test Conditions VDS = 30 V , ID = 17 A VDS = 25V, f = 1 MHz, VGS = 0 TBD S 920 pF Ciss Input Capacitance Coss Output Capacitance 225 pF Crss Reverse Transfer Capacitance 80 pF 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2/6 Min. STL34NF06 ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON Symbol td(on) tr Parameter Turn-on Delay Time Rise Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge Test Conditions Min. VDD = 30V, ID = 17 A RG = 4.7Ω VGS = 10V (see test circuit, Figure 3) VDD = 48V, ID = 34 A, VGS = 10V Typ. Max. Unit 11 ns 50 ns 32 43 nC 6.5 nC 14.4 nC SWITCHING OFF Symbol td(off) tf Parameter Turn-Off-Delay Time Fall Time Test Conditions Min. VDD = 30V, ID = 17A, RG = 4.7Ω, VGS = 10V (see test circuit, Figure 3) Typ. Max. Unit 27 ns 11 ns SOURCE DRAIN DIODE Symbol ISD (3) Parameter Test Conditions Min. Typ. Source-drain Current ISDM (2) Source-drain Current (pulsed) VSD (1) Forward On Voltage ISD = 34 A, VGS = 0 trr Reverse Recovery Time Qrr Reverse Recovery Charge ISD = 34 A, di/dt = 100A/µs, VDD = 10V, Tj = 150°C (see test circuit, Figure 5) IRRM Reverse Recovery Current Max. Unit 34 A 136 A 1.2 V 63 ns 151 nC 4.8 A Note: 1. Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. 2. Pulse width limited by safe operating area. 3. Current Limited by Wire Bonding is 20A 3/6 STL34NF06 Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuit For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 4/6 STL34NF06 PowerFLAT™(5x5) MECHANICAL DATA mm. DIM. MIN. inch TYP MAX. A 0.90 A1 MIN. TYP. MAX. 1.00 0.035 0.039 0.02 0.05 0.001 0.002 b 0.43 0.51 0.58 0.017 0.020 0.023 c 0.33 0.41 0.48 0.013 0.016 0.019 D 5.00 0.197 E 5.00 0.197 E2 e 3.10 3.18 1.27 3.25 0.122 0.125 0.128 0.050 5/6 STL34NF06 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © The ST logo is a registered trademark of STMicroelectronics © 2002 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - United States. © http://www.st.com 6/6