TI CSD17313Q2

CSD17313Q2
www.ti.com
SLPS260A – MARCH 2010 – REVISED MARCH 2010
30V N-Channel NexFET™ Power MOSFET
PRODUCT SUMMARY
FEATURES
1
•
•
•
•
•
•
•
Optimized for 5V Gate Drive
Ultra Low Qg and Qgd
Low Thermal Resistance
Pb Free
RoHS Compliant
Halogen Free
SON 2-mm × 2-mm Plastic Package
VDS
Drain to Source Voltage
30
V
Qg
Gate Charge Total (4.5V)
2.1
nC
Qgd
Gate Charge Gate to Drain
RDS(on)
VGS(th)
DC-DC Converters
Battery and Load Management Applications
The NexFET power MOSFET has been designed to
minimize losses in power conversion applications and
optimized for 5V gate drive applications. The 2-mm ×
2-mm SON offers excellent thermal performance for
the size of the package.
Top View
1
6
D
5
D
D
D
2
mΩ
VGS = 4.5V
26
mΩ
VGS = 8V
24
mΩ
Threshold Voltage
1.3
Device
Package
Media
CSD17313Q2
SON 2-mm × 2-mm
Plastic Package
13-Inch
Reel
DESCRIPTION
D
nC
31
V
Text Added For Spacing
ORDERING INFORMATION
APPLICATIONS
•
•
Drain to Source On Resistance
0.4
VGS = 3V
Qty
Ship
3000
Tape and
Reel
Text Added For Spacing
ABSOLUTE MAXIMUM RATINGS
TA = 25°C unless otherwise stated
VALUE
UNIT
VDS
Drain to Source Voltage
30
V
VGS
Gate to Source Voltage
+10 / –8
V
Continuous Drain Current, TC = 25°C
5
A
Continuous Drain Current(1)
5
A
IDM
Pulsed Drain Current, TA = 25°C(2)
20
A
PD
Power Dissipation
2.3
W
TJ,
TSTG
Operating Junction and Storage
Temperature Range
–55 to 150
°C
EAS
Avalanche Energy, Single Pulse,
ID = 19A, L = 0.1mH, RG = 25Ω
18
mJ
ID
(1) Package Limited
(2) Pulse duration ≤300ms, duty cycle ≤2%
G
3
4
S
S
P0108-01
Text For Spacing
RDS(on) vs VGS
Text For Spacing
GATE CHARGE
8
ID = 4A
70
VGS - Gate-to-Source Voltage - V
RDS(on) - On-State Resistance - mΩ
80
60
T C = 125°C
50
40
30
20
T C = 25°C
10
ID = 4A
VDS = 15V
7
6
5
4
3
2
1
0
0
0
1
2
3
4
5
6
7
8
VGS - Gate-to-Source Voltage - V
9
10
G006
0
0.5
1
1.5
2
2.5
Qg - Gate Charge - nC
3
3.5
4
G003
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
SLPS260A – MARCH 2010 – REVISED MARCH 2010
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
ELECTRICAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP MAX
UNIT
Static Characteristics
BVDSS
Drain to Source Voltage
VGS = 0V, ID = 250mA
IDSS
Drain to Source Leakage
VGS = 0V, VDS = 24V
IGSS
Gate to Source Leakage
VDS = 0V, VGS = +10 / -8V
VGS(th)
Gate to Source Threshold Voltage
VDS = VGS, ID = 250mA
RDS(on)
Drain to Source On Resistance
gfs
Transconductance
30
0.9
V
1
mA
100
nA
1.3
1.8
V
VGS = 3V, ID = 4A
31
42
mΩ
VGS = 4.5V, ID = 4A
26
32
mΩ
VGS = 8V, ID = 4A
24
30
mΩ
VDS = 15V, ID = 4A
16
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
260
340
pF
140
180
Crss
pF
Reverse Transfer Capacitance
13
17
pF
RG
Series Gate Resistance
1.3
2.6
Ω
Qg
Gate Charge Total (4.5V)
2.1
2.7
nC
Qgd
Gate Charge – Gate to Drain
0.4
nC
Qgs
Gate Charge Gate to Source
0.7
nC
Qg(th)
Gate Charge at Vth
0.3
nC
Qoss
Output Charge
3.8
nC
td(on)
Turn On Delay Time
2.8
ns
tr
Rise Time
3.9
ns
td(off)
Turn Off Delay Time
4.2
ns
tf
Fall Time
1.3
ns
VGS = 0V, VDS = 15V,
f = 1MHz
VDS = 15V,
ID = 4A
VDS = 13.5V, VGS = 0V
VDS = 15V, VGS = 4.5V,
ID = 4A, RG = 2Ω
Diode Characteristics
VSD
Diode Forward Voltage
Qrr
Reverse Recovery Charge
trr
Reverse Recovery Time
ISD = 4A, VGS = 0V
0.85
VDD= 13.5V, IF = 4A,
di/dt = 300A/ms
1
V
6.4
nC
12.9
ns
THERMAL CHARACTERISTICS
(TA = 25°C unless otherwise stated)
PARAMETER
RqJC
Thermal Resistance Junction to Case (1)
RqJA
Thermal Resistance Junction to Ambient (1) (2)
(1)
(2)
2
2
MIN
TYP MAX
UNIT
7.4
°C/W
67
°C/W
2
RqJC is determined with the device mounted on a 1-inch (6.45-cm ), 2-oz. (0.071-mm thick) Cu pad on a 1.5-inch × 1.5-inch (3.81-cm ×
3.81-cm), 0.06-inch (1.52-mm) thick FR4 PCB. RqJC is specified by design, whereas RqJA is determined by the user’s board design.
Device mounted on FR4 material with 1-inch2 (6.45-cm2), 2-oz. (0.071-mm thick) Cu.
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Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
www.ti.com
SLPS260A – MARCH 2010 – REVISED MARCH 2010
Max RqJA = 67°C/W
when mounted on
1 inch2 (6.45 cm2) of
2-oz. (0.071-mm thick)
Cu.
G1 D1
S1
Max RqJA = 228°C/W
when mounted on a
minimum pad area of
2-oz. (0.071-mm thick)
Cu.
G1 S1 D1
M0179-01
M0180-01
Text Added For Spacing
Text Added For Spacing
Text Added For Spacing
Text Added For Spacing
TYPICAL MOSFET CHARACTERISTICS
(TA = 25°C unless otherwise stated)
ZqJA - Normalized Thermal Impedance
10
1
0.5
0.3
0.1
Duty Cycle = t1/t2
0.1
0.05
P
0.02
0.01
t1
0.01
t2
Typical RqJA = 182°C/W (min Cu)
TJ = P ´ ZqJA ´ RqJA
Single Pulse
0.001
0.0001
0.001
0.01
0.1
1
tp - Pulse Duration - s
10
100
1k
G012
Figure 1. Transient Thermal Impedance
Copyright © 2010, Texas Instruments Incorporated
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CSD17313Q2
SLPS260A – MARCH 2010 – REVISED MARCH 2010
www.ti.com
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
10
9
9
8
IDS - Drain-to-Source Current - A
IDS - Drain-to-Source Current - A
TEXT ADDED FOR SPACING
10
VGS = 8V
7
VGS = 4.5V
6
VGS = 3.5V
5
4
VGS = 3V
3
VGS = 2.5V
2
0
0.2
0.4
0.6
0.8
VDS - Drain-to-Source Voltage - V
T C = 125°C
6
5
T C = 25°C
4
3
T C = -55°C
2
1
1
1.2
1.4
G001
1.6 1.8
2
2.2 2.4 2.6
VGS - Gate-to-Source Voltage - V
Figure 2. Saturation Characteristics
Figure 3. Transfer Characteristics
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
8
2.8
3
G002
0.7
ID = 4A
VDS = 15V
7
f = 1MHz
VGS = 0V
0.6
6
C - Capacitance - nF
VGS - Gate-to-Source Voltage - V
7
0
0
5
4
3
2
0.5
Coss = Cds + Cgd
0.4
Ciss = Cgd + Cgs
0.3
0.2
Crss = Cgd
0.1
1
0
0
0
0.5
1
1.5
2
2.5
Qg - Gate Charge - nC
3
3.5
4
0
5
10
15
20
VDS - Drain-to-Source Voltage - V
G003
Figure 4. Gate Charge
Figure 5. Capacitance
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
25
30
G004
80
1.6
RDS(on) - On-State Resistance - mΩ
ID = 250µA
1.4
VGS(th) - Threshold Voltage - V
8
1
1
1.2
1
0.8
0.6
0.4
0.2
0
-75
ID = 4A
70
60
T C = 125°C
50
40
30
20
T C = 25°C
10
0
-25
25
75
T C - Case Temperature - °C
125
Figure 6. Threshold Voltage vs. Temperature
4
VDS = 5V
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175
G005
0
1
2
3
4
5
6
7
8
VGS - Gate-to-Source Voltage - V
9
10
G006
Figure 7. On-State Resistance vs. Gate-to-Source Voltage
Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
www.ti.com
SLPS260A – MARCH 2010 – REVISED MARCH 2010
TYPICAL MOSFET CHARACTERISTICS (continued)
(TA = 25°C unless otherwise stated)
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
1.4
10
ID = 4A
VGS = 8V
ISD - Source-to-Drain Current - A
Normalized On-State Resistance
1.6
1.2
1
0.8
0.6
0.4
0.2
-75
1
T C = 125°C
0.1
T C = 25°C
0.01
0.001
0.0001
-25
25
75
T C - Case Temperature - °C
125
175
0
0.2
G007
0.4
0.6
0.8
VSD - Source-to-Drain Voltage - V
Figure 8. Normalized On-State Resistance vs. Temperature
Figure 9. Typical Diode Forward Voltage
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
10
1ms
10ms
1
11110
100ms
Area Limited
by RDS(on)
1s
0.1
DC
Single Pulse
Typical R θJA = 182°C/W (min Cu)
0.01
0.01
G008
100
I(AV) - Peak Avalanche Current - A
IDS - Drain-to-Source Current - A
100
1
0.1
1
10
VDS - Drain-to-Source Voltage - V
100
T C = 25°C
10
T C = 125°C
1
0.01
0.1
1
t(AV) - Time in Avalanche - ms
G009
Figure 10. Maximum Safe Operating Area
10
G010
Figure 11. Single Pulse Unclamped Inductive Switching
TEXT ADDED FOR SPACING
TEXT ADDED FOR SPACING
IDS - Drain-to-Source Current - A
6
5
4
3
2
1
0
-50
-25
0
25
50
75
100 125
T C - Case Temperature - °C
150
175
G011
Figure 12. Maximum Drain Current vs. Temperature
Copyright © 2010, Texas Instruments Incorporated
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CSD17313Q2
SLPS260A – MARCH 2010 – REVISED MARCH 2010
www.ti.com
MECHANICAL DATA
Q2 Package Dimensions
D2
D
K3
K1
K
K2
4
4
5
6
8
K4
E
7
E1
E2
5
E3
6
Pin 1 Dot
2
3
3
L
1
Top View
2
1
Pin 1 ID
e
b
D1
Pinout
A
A1
C
Bottom View
Source
4, 7
Gate
3
Drain
1, 2, 5, 6, 8
Front View
M0175-02
DIM
MILLIMETERS
NOM
MAX
MIN
NOM
MAX
A
0.700
0.750
0.800
0.028
0.030
0.032
A1
0.000
0.050
0.000
b
0.250
0.350
0.010
0.300
0.002
0.012
C
0.203 TYP
0.008 TYP
D
2.000 TYP
0.080 TYP
D1
0.900
0.950
1.000
0.036
0.038
D2
0.300 TYP
0.012 TYP
E
2.000 TYP
0.080 TYP
E1
0.900
E2
1.000
1.100
0.036
0.040
0.280 TYP
0.0112 TYP
E3
0.470 TYP
0.0188 TYP
e
0.650 BSC
0.026 TYP
K
0.280 TYP
0.0112 TYP
K1
0.350 TYP
0.014 TYP
K2
0.200 TYP
0.008 TYP
K3
0.200 TYP
0.008 TYP
K4
0.470 TYP
0.0188 TYP
L
6
INCHES
MIN
0.200
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0.25
0.300
0.008
0.010
0.014
0.040
0.044
0.012
Copyright © 2010, Texas Instruments Incorporated
CSD17313Q2
www.ti.com
SLPS260A – MARCH 2010 – REVISED MARCH 2010
Recommended PCB Pattern
1.40
0.85
1.05
0.22
2.30
1.10
0.65 TYP
1
0.46
0.40 TYP
0.25
M0167-01
Note:
All dimensions are in mm, unless otherwise specified.
For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing
through PCB Layout Techniques.
Q2 Tape and Reel Information
4.00 ±0.10
Ø 1.50 ±0.10
4.00 ±0.10
Ø 1.00 ±0.25
1.00 ±0.05
2.30 ±0.05
10° Max
3.50 ±0.05
8.00
+0.30
–0.10
1.75 ±0.10
2.00 ±0.05
0.254 ±0.02
2.30 ±0.05
10° Max
M0168-01
Notes: 1. Measured from centerline of sprocket hole to centerline of pocket
2. Cumulative tolerance of 10 sprocket holes is ±0.20
3. Other material available
4. Typical SR of form tape Max 108 OHM/SQ
5. All dimensions are in mm, unless otherwise specified.
Copyright © 2010, Texas Instruments Incorporated
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CSD17313Q2
SLPS260A – MARCH 2010 – REVISED MARCH 2010
www.ti.com
Package Marking Information
Location
Top View
1st Line
NNNN
1731
6
= 4-Digit Product Code
CSD1731
Bottom View
4
4
6
3
3
1
2nd Line
Y
= Last digit of the Year
WW
= 2-digit Work Week
C
= Country of Origin
NNNN
YWWC
> Philippines = P
> Taiwan = T
> China = C
> Malaysia = M
1
Pin 1
Identifier
M0166-01
Spacer
REVISION HISTORY
Changes from Original (March 2010) to Revision A
•
8
Page
Changed Qrr - Reverse Recovery Charge From: 10.2 nC To: 6.4 nC .................................................................................. 2
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Copyright © 2010, Texas Instruments Incorporated
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