CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com P-Channel NexFET™ Power MOSFET Check for Samples: CSD25211W1015 FEATURES 1 • • • • • • • • • PRODUCT SUMMARY Ultra Low On Resistance Ultra Low Qg and Qgd Small Footprint 1.0mm x 1.5mm Low Profile 0.62mm Height Pb Free Gate-Source Voltage Clamp Gate ESD Protection - 3KV RoHS Compliant Halogen Free TA = 25°C unless otherwise stated UNIT Drain to Source Voltage -20 V Qg Gate Charge Total (-4.5V) 3.4 nC Qgd Gate Charge Gate to Drain RDS(on) Drain to Source On Resistance VGS(th) Voltage Threshold 0.2 nC VGS = -2.5V 36 mΩ VGS = -4.5V 27 mΩ -0.8 V ORDERING INFORMATION APPLICATIONS • • • TYPICAL VALUE VDS Battery Management Load Switch Battery Protection Device Package CSD25211W1015 1 × 1.5 Wafer Level Package Media 7-inch reel Qty Ship 3000 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated DESCRIPTION The device has been designed to deliver the lowest on resistance and gate charge in the smallest outline possible with excellent thermal characteristics in an ultra low profile. Top View VALUE UNIT VDS Drain to Source Voltage -20 V VGS Gate to Source Voltage -6 V ID Continuous Drain Current, TA = 25°C(1) -3.2 A IDM Pulsed Drain Current, TA = 25°C(2) -9.5 A Continuous Drain Current, TA = 25°C -0.5 A IG Pulsed Drain Current -7 A PD Power Dissipation(1) 1 W TSTG Storage Temperature Range TJ Operating Junction Temperature Range –55 to 150 °C (1) Typical RθJA = 119°C/W on 1 inch2 of 2 oz. Cu on 0.06" thick FR4 PCB. (2) Pulse width ≤10µs, duty cycle ≤2% RDS(ON) vs VGS Gate Charge 6 ID = 1.5A 90 VGS - Gate-to-Source Voltage (V) RDS(on) - On-State Resistance - mΩ 100 80 70 60 50 40 30 20 TC = 25°C TC = 125ºC 10 0 0 1 2 3 4 VGS - Gate-to- Source Voltage - V 5 6 G001 ID = 1.5A VDD = 10V 5 4 3 2 1 0 0 2 4 Qg - Gate Charge - nC (nC) G001 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, ID = -250μA -20 BVGSS Gate to Source Voltage VDS = 0V, IG = -250μA -6.1 IDSS Drain to Source Leakage Current VGS = 0V, VDS = -16V IGSS Gate to Source Leakage Current VDS = 0V, VGS = -6V VGS(th) Gate to Source Threshold Voltage VDS = VGS, ID = -250μA RDS(on) Drain to Source On Resistance gfs Transconductance V -7.2 V -1 μA -100 nA -0.8 -1.1 V VGS = -2.5V, ID = -1.5A 36 44 mΩ VGS = -4.5V, ID = -1.5A 27 33 mΩ VDS = -10V, ID =-1.5A 12 -0.5 S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance 475 570 pF 234 281 CRSS Reverse Transfer Capacitance pF 10.5 13.1 pF Qg Qgd Gate Charge Total (-4.5V) 3.4 4.1 nC Gate Charge Gate to Drain 0.2 Qgs Gate Charge Gate to Source nC 1.1 nC Qg(th) Gate Charge at Vth QOSS Output Charge 0.6 nC 3.8 td(on) Turn On Delay Time nC 13.6 tr Rise Time ns 8.8 ns td(off) Turn Off Delay Time tf Fall Time 36.9 ns 14.2 ns VGS = 0V, VDS = -10V, f = 1MHz VDS = -10V, ID = -1.5A VDS = -10V, VGS = 0V VDS = -10V, VGS = -4.5V, ID = -1.5A RG = 4Ω Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time IS = -1.5A, VGS = 0V -0.8 Vdd= -10V, IF = -1.5A, di/dt = 200A/μs -1 V 6.9 nC 11.6 ns THERMAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER R θJA 2 MAX UNIT Thermal Resistance Junction to Ambient (Minimum Cu area) 230 °C/W Thermal Resistance Junction to Ambient (1 in2 Cu area) 149 °C/W Submit Documentation Feedback MIN TYP Copyright © 2012, Texas Instruments Incorporated CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com P-Chan 1.0x1.5 CSP TTA MAX Rev1 P-Chan 1.0x1.5 CSP TTA MIN Rev1 Max RθJA = 230°C/W when mounted on minimum pad area of 2 oz. Cu. Max RθJA = 149°C/W when mounted on 1 inch2 of 2 oz. Cu. M0155-01 M0156-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) Figure 1. Transient Thermal Impedance Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 3 CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) IDS - Drain-to-Source Current - A IDS - Drain-to-Source Current - A 18 10 VGS =5.0V VGS =4.5V VGS =4.0V VGS =2.5V VGS =2.0V 0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 VDS = 5V 1 0.1 0.01 0.001 1 VDS - Drain-to-Source Voltage - V 20 10 TC = 125°C TC = 25°C TC = −55°C 0 C − Capacitance − nF VGS - Gate-to-Source Voltage (V) 4 2.5 G001 3 2 0.4 0.3 0.2 Ciss = Cgd + Cgs Coss = Cds + Cgd Crss = Cgd 0.1 1 0 2 4 0 5 10 15 20 VDS - Drain-to-Source Voltage - V G001 Figure 4. Gate Charge G001 Figure 5. Capacitance 1.5 100 RDS(on) - On-State Resistance - mΩ ID = 250µA VGS(th) - Threshold Voltage - V 2 0.5 ID = 1.5A VDD = 10V Qg - Gate Charge - nC (nC) 1.2 0.9 0.6 0.3 0 −75 −25 25 75 125 TC - Case Temperature - ºC Figure 6. Threshold Voltage vs. Temperature 4 1.5 Figure 3. Transfer Characteristics 6 0 1 VGS - Gate-to-Source Voltage - V Figure 2. Saturation Characteristics 5 0.5 G001 Submit Documentation Feedback 175 G001 ID = 1.5A 90 80 70 60 50 40 30 20 TC = 25°C TC = 125ºC 10 0 0 1 2 3 4 5 VGS - Gate-to- Source Voltage - V 6 G001 Figure 7. On Resistance vs. Gate Voltage Copyright © 2012, Texas Instruments Incorporated CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 10 ID = 1.5A VGS = 4.5V ISD − Source-to-Drain Current - A Normalized On-State Resistance 1.4 1.2 1 0.8 0.6 −75 −25 25 75 125 1 0.1 0.01 0.001 0.0001 175 TC - Case Temperature - ºC TC = 25°C TC = 125°C 0 0.4 0.6 0.8 VSD − Source-to-Drain Voltage - V Figure 8. Normalized On Resistance vs. Temperature 1 G001 Figure 9. Typical Diode Forward Voltage 15 10 50 I(AV) - Peak Avalanche Current - A IDS - Drain-to-Source Current - A 0.2 G001 Area Limited by Rds(on) 1 1ms 10ms 100ms 1s DC 0.1 Single Pulse Typical RthetaJA = 184ºC/W(min Cu) 0.02 0.01 0.1 1 10 10 5 0.01 25 VDS - Drain-to-Source Voltage - V TC = 125°C TC = 25°C 0.1 t(AV) - Time in Avalanche - ms G001 Figure 10. Maximum Safe Operating Area 1 G001 Figure 11. Single Pulse Unclamped Inductive Switching − IDS - Drain- to- Source Current - A 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 −50 −25 0 25 50 75 100 TC - Case Temperature - ºC 125 150 175 G001 Figure 12. Maximum Drain Current vs. Temperature Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 5 CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com MECHANICAL DATA CSD25211W1015 Package Dimensions Pin 1 Mark 1 Solder Ball Ø 0.31 ±0.075 2 1 A B 1.50 B 1.00 +0.00 –0.10 0.50 A 2 Pin 1 Mark C C 1.00 +0.00 –0.10 0.50 Side View Bottom View 0.04 0.62 Max 0.38 Top View 0.62 Max Seating Plate Front View M0157-01 NOTE: All dimensions are in mm (unless otherwise specified) Pinout 6 POSITION DESIGNATION C1, C2 Drain A1 Gate A2, B1, B2 Source Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated CSD25211W1015 SLPS296 – FEBRUARY 2012 www.ti.com Land Pattern Recommendation Ø 0.25 1 2 1.00 0.50 A B C 0.50 M0158-01 NOTE: All dimensions are in mm (unless otherwise specified) Tape and Reel Information 4.00 ±0.10 Ø 1.50 ±0.10 4.00 ±0.10 Ø 0.60 0.86 ±0.05 +0.05 –0.10 1.65 ±0.05 2° Max 3.50 ±0.05 8.00 +0.30 –0.10 1.75 ±0.10 2.00 ±0.05 0.254 ±0.02 1.19 ±0.05 2° Max M0159-01 NOTE: All dimensions are in mm (unless otherwise specified) Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 7 PACKAGE OPTION ADDENDUM www.ti.com 25-Feb-2012 PACKAGING INFORMATION Orderable Device CSD25211W1015 Status (1) ACTIVE Package Type Package Drawing DSBGA YZC Pins Package Qty 6 3000 Eco Plan TBD (2) Lead/ Ball Finish Call TI MSL Peak Temp (3) Samples (Requires Login) Call TI (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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