TI TPIC2701

TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
D
D
D
D
D
D
Seven 0.5-A Independent Output Channels
Integrated Clamp Diode With Each Output
Low rDS(on) . . . 0.5 Ω Typical
Output Voltage . . . 60 V
Pulsed Current . . . 3 A Per Channel
Avalanche Energy . . . 22 mJ
description
The TPIC2701 is a monolithic power DMOS
transistor array that consists of seven independent N-channel enhancement-mode DMOS
transistors connected in a common-source
configuration with open drains. The TPIC2701 is
pin-for-pin functionally compatible with the Texas
Instruments ULN2001A through ULN2004A.
The TPIC2701 is characterized for operation over
a temperature range of 0°C to 125°C.The
TPIC2701M is characterized for operation over
the full military temperature range of – 55°C to
125°C.
logic diagram
9
GATE1
16
1
2
15
3
14
GATE4
4
13
GATE5
5
12
GATE6
6
11
GATE7
7
10
GATE2
GATE3
CLAMP
DRAIN1
DRAIN2
DRAIN3
TPIC2701
N PACKAGE
(TOP VIEW)
GATE1
GATE2
GATE3
GATE4
GATE5
GATE6
GATE7
SOURCE
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
DRAIN1
DRAIN2
DRAIN3
DRAIN4
DRAIN5
DRAIN6
DRAIN7
CLAMP
TPIC2701M
J PACKAGE†
(TOP VIEW)
GATE1
GATE2
GATE3
NC
NC
GATE4
GATE5
NC
GATE6
GATE7
SOURCE
SOURCE
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
DRAIN1
DRAIN2
DRAIN3
NC
NC
DRAIN4
DRAIN5
NC
DRAIN6
DRAIN7
CLAMP
SOURCE
NC – No internal connection
† Refer to the mechanical data for the JW package.
DRAIN4
DRAIN5
DRAIN6
DRAIN7
8
SOURCE
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1996, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
absolute maximum ratings over operating case temperature range (unless otherwise noted)
Drain-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Gate-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Clamp-drain voltage, VCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Continuous source-drain diode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A
Pulsed drain current, each output, ID (see Note 1 and Figure 17) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A
Pulsed clamp current, ICL (see Note 1 and Figure 18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A
Continuous drain current, each output, all outputs on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.5 A
Single-pulse avalanche energy, EAS (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 mJ
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating virtual junction temperature range, TJ:TPIC2701 . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C
TPIC2701M . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 150°C
Operating case temperature range, TC: TPIC2701 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
TPIC2701M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N Package . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J Package . . . . . . . . . . . . . . . . . . . . . 300°C
NOTE 1: Pulse duration = 10 ms, duty cycle = 6%.
DISSIPATION RATING TABLE
PACKAGE
TA ≤ 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
J
2660 mW
21.3 mW/°C
1701 mW
1382 mW
530 mW
N
1400 mW
11.0 mW/°C
905 mW
740 mW
300 mW
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
V(BR)DS
VTGS
TEST CONDITIONS
ID = 1 µA,
ID = 1 mA,
Drain-source breakdown voltage
Gate-source threshold voltage
VGS = 0
VDS = VGS
TPIC2701
MIN
TYP
MAX
60
1.2
UNIT
V
1.75
2.4
V
0.25
0.4
V
0.05
1
0.5
10
VDS(on)
Drain-source on-state voltage
ID = 0.5 A,
VGS = 15 V,
See Notes 2 and 3
IDSS
Zero gate voltage drain current
Zero-gate-voltage
VDS = 48 V
V,
VGS = 0
IGSSF
Forward gate current, drain short circuited to
source
VGS = 20 V,
VDS = 0
10
100
nA
IGSSR
Reverse gate current, drain short circuited to
source
VGS = – 20 V, VDS = 0
10
100
nA
TC = 25°C
0.8
Forward drain-source
drain source on
on-state
state resistance
VGS = 15 V, ID = 0.5 A,
See Notes 2 and 3 and
Figures 5 and 6
0.5
rDS(
DS(on))
TC = 125°C
0.8
1.3
gfs
Forward transconductance
Ciss
Short-circuit input capacitance, common source
Coss
Short-circuit output capacitance, common source
Crss
Short-circuit reverse transfer capacitance,
common source
TC = 25°C
TC = 125°C
VDS = 15 V, ID = 0.5 A,
See Notes 2 and 3
0.5
0.8
µA
Ω
S
105
VDS = 25 V
V,
VGS = 0
0,
f = 300 kHz
65
pF
F
15
NOTES: 2. Technique should limit TJ – TC to 10°C maximum.
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts with a single output
transistor conducting.
2
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• DALLAS, TEXAS 75265
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
electrical characteristics over case temperature operating range (unless otherwise noted)
(see Note 4)
PARAMETER
TC†
TEST CONDITIONS
V(BR)DS
Drain to source breakdown voltage
Drain-to-source
ID = 1 µA,
ID = 1 mA,
VGS = 0
VGS = 0
Full range
VTGS
Gate-to-source input threshold voltage
ID = 1 mA,
VDS = VGS
Full range
VDS(
DS(on))
Drain to source on
Drain-to-source
on-state
state voltage
ID = 0.5
0 5 A,
A
VGS = 15 V
IDSS
Zero gate voltage drain current
Zero-gate-voltage
VDS = 48 V,
V
VGS = 0
IGSSF
Forward g
gate current,, drain short-circuited to
source
V
VGS = 20 V,
VDS = 0
IGSSR
Reverse gate
g
current,, drain short-circuited to
source
VGS = – 20 V
V, VDS = 0
rDS(on)
DS( )
Forward drain
drain-source
source on
on-state
state resistance
VGS = 15 V,
V
ID = 0.5
05A
gfs
Ciss
Forward transconductance
VDS = 15 V,
ID = 0.5 A
Coss
Short-circuit output capacitance, common source
VGS = 0,
Crss
Short-circuit reverse transfer capacitance,
common source
VDS = 25 V,
f = 300 kHz
25°C
TPIC2701M
MIN
TYP
MAX
60
1.2
25°C
V
1.75
2.4
0.25
0.45
Full range
0.65
25°C
0.05
Full range
1
10
25°C
10
Full range
25°C
10
Full range
25°C
0.5
Full range
V
µA
nA
10
µA
100
nA
10
µA
0.9
0.8
Short-circuit input capacitance, common source
V
100
1.3
25°C
UNIT
Ω
S
105
65
Full range
pF
F
15
† Full range is – 55°C to 125°C.
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal
effects must be taken into account separately.
source-drain diode characteristics, TC = 25°C
PARAMETER
VSD
Forward On voltage
trr(SD) Reverse-recovery time
QRR
Total source-drain diode charge
TEST CONDITIONS
IS = 0.5 A,
TPIC2701
MIN
VGS = 0
IS = 0.5 A, VGS = 0,
di/dt = 25 A/µs,
VDS = 48 V,
See Figure 1
TYP
MAX
0.9
1.4
UNIT
V
165
ns
250
nC
source-to-drain diode characteristics over operating case temperature range (unless otherwise
noted) (see Note 4)
PARAMETER
TPIC2701M
TEST CONDITIONS
VSD
trr
Forward On voltage
IS = 0.5 A,
VGS = 0
Reverse recovery time
QRR
Total source-to-drain diode charge
IS = 0.5 A,
di/dt = 25 A /µs,
VGS = 0,
TC = 25°C,
MIN
VDS = 48 V,
See Figure 1
TYP
MAX
0.9
1.4
UNIT
V
165
ns
250
nC
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal
effects must be taken into account separately.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
clamp diode characteristics, TC = 25°C
PARAMETER
TEST CONDITIONS
VF
VBR
Forward on-voltage
Breakdown voltage
IF = 0.5 A
IR = 1 µA
IR
trr(CD)
Reverse leakage current
VR = 48 V
Reverse-recovery time
QRR
Total source-drain diode charge
IF = 0.1 A,
VCD = 48 V,
TPIC2701
MIN
TYP
MAX
1
1.5
60
V
V
0.05
di/dt = 25 A/µs,
µ
See Figure 1
UNIT
1
µA
90
ns
100
nC
clamp diode characteristics over operating case temperature range (unless otherwise noted)
(see Note 4)
PARAMETER
VF
Forward voltage
V(BR)
Breakdown voltage
IR
Reverse leakage current
TPIC2701M
TEST CONDITIONS
IF = 0.5 A
IR = 1 µA,
MIN
TC = 25°C
trr(SD) Reverse recovery time, source-to-drain
QRR
Total source-to-drain diode charge
MAX
1
1.5
60
IR = 1 mA
TC = 25°C
VR = 48 V
TYP
0.05
di/dt = 25 A /µs,
µ
See Figure 1
TC = 25°C
V
V
1
10
IF = 0.1 A,
VCD = 48 V,
UNIT
µA
90
ns
100
nC
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal
effects must be taken into account separately.
resistive-load switching characteristics, TC = 25°C
PARAMETER
td(on)
td(off)
Turn-on delay time
tr
tf
Rise time
Qg
Total gate charge
Qgs
Gate-source charge
Qgd
Gate-drain charge
4
Turn-off delay time
TEST CONDITIONS
TPIC2701
MIN
TYP
MAX
UNIT
10
VDD = 25 V,,
tdis = 10 ns,
RL = 100 Ω,,
See Figure 2
ten = 10 ns,,
30
ns
15
Fall time
5
2.8
VDS = 48 V,
V
See Figure 3
POST OFFICE BOX 655303
ID = 0.25
0 25 A,
A
• DALLAS, TEXAS 75265
VGS = 10 V,
V
3.6
1.6
2
1.2
1.6
nC
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
resistive-load switching characteristics over operating case temperature range (unless otherwise
noted) (see Note 4)
PARAMETER
td(on)
td(off)
Turn-on delay time
tr
tf
Rise time
Qg
Total gate charge
Qgs
Gate-to-source charge
Qgd
Gate-to-drain charge
TEST CONDITIONS
TPIC2701M
MIN
TYP
MAX
UNIT
10
Turn-off delay time
RL = 100 Ω,,
See Figure 2
VDD = 25 V,,
tdis = 10 ns,
30
ten = 10 ns,,
ns
15
Fall time
5
2.8
VDS = 48 V,
V
See Figure 3
ID = 0
0.25
25 A
A,
VGS = 10 V,
V
nC
1.6
1.2
NOTE 4: Pulse testing techniques are used to maintain the virtual junction temperature as close to the case temperature as possible. Thermal
effects must be taken into account separately.
thermal resistance
PARAMETER
RθJA
TEST CONDITIONS
Junction-to-ambient thermal resistance
MIN
TYP
MAX
N package with all outputs at equal power
90
J package with all outputs at equal power
66
UNIT
°C/W
PARAMETER MEASUREMENT INFORMATION
0.5 A
IF/IS
0
di/dt = 25 A/µs
QRR = Shaded Area
25% of IRM
IRM
(see Note A)
trr
NOTE A: IRM = maximum recovery current
Figure 1. Reverse-Recovery-Current Waveforms of Source-Drain and Clamp Diodes
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• DALLAS, TEXAS 75265
5
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
PARAMETER MEASUREMENT INFORMATION
25 V
ten
VGS
VDS
Pulse Generator
tdis
90%
RL
15 V
90%
10%
0
VGS
DUT
Rgen
50 Ω
td(off)
td(on)
50 Ω
90%
VDS
10%
VOLTAGE WAVEFORM
TEST CIRCUIT
Figure 2. Resistive Switching
Current
Regulator
0.2 µF
Qg
Same Type
as DUT
50 kΩ
10 V
Qgd
0.3 µF
VGS
VDD = 48 V
0
Gate Voltage
DUT
IG = 100 µA
Time
IG CurrentSampling Resistor
ID CurrentSampling Resistor
TEST CIRCUIT
Figure 3. Gate Charge Test Circuit and Waveform
6
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VDS(on)
tr
tf
12-V
Battery
VDD
Qgs = Qg – Qgd
WAVEFORM
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
PARAMETER MEASUREMENT INFORMATION
25 V
tw
tav
4 mH
Pulse Generator
(see Note A)
ID
15 V
VDS
VGS
0
VGS
ID
DUT
Rgen
IAS
(see Note B)
0
50 Ω
50 Ω
V(BR)DSX = 60 V Min
VDS
0
VOLTAGE AND CURRENT WAVEFORMS
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω.
B. Input pulse duration (tw) is increased until peak current IAS = 2.5 A.
I
V
t av
AS
(BR)DSX
Energy test level is defined as E
22 mJ min.
AS
2
+
+
Figure 4. Single-Pulse Avalanche Energy Test Circuit and Waveforms
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• DALLAS, TEXAS 75265
7
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
TYPICAL CHARACTERISTICS
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
FREE-AIR TEMPERATURE
STATIC DRAIN-SOURCE ON-STATE RESISTANCE
vs
DRAIN CURRENT
0.9
1
ID = 0.5 A
TA = 25°C
0.9
0.7
rDS(on) – Static Drain-Source
On-State Resistance – Ω
– Static Drain-Source
r
DS(on)
On-State Resistance – Ω
0.8
VGS = 10 V
0.6
0.5
VGS = 15 V
0.4
0.3
0.2
0.1
0.8
VGS = 6 V
0.7
0.6
VGS = 15 V
0.5
0.4
VGS = 20 V
0.3
0.2
0.1
0
– 50
0
– 25
0
25
50
75
100
0
125
0.5
TA – Free-Air Temperature – °C
Figure 5
DRAIN-TO-SOURCE CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
15
5
TA = 25°C
ID = 0.5 A
VDS = 15 V
TA = 25°C
I D – Drain-to-Source Current – A
4.5
10
5
4
VGS = 5 V
3.5
3
VGS = 4.5 V
2.5
VGS = 4 V
2
1.5
VGS = 3.5 V
1
VGS = 3 V
0.5
0
VGS = 2.5 V
0
0.76
0.775
0.79
0.805
0.82
gfs – Forward Transconductance – S
0
2
Figure 7
8
2.5
Figure 6
DISTRIBUTION OF
FORWARD TRANSCONDUCTANCE
Percentage of Units – %
2
1
1.5
ID – Drain Current – A
4
6
8 10 12 14 16
VDS – Drain-to-Source Voltage – V
Figure 8
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• DALLAS, TEXAS 75265
18
20
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
TYPICAL CHARACTERISTICS
GATE-SOURCE VOLTAGE
vs
GATE CHARGE
GATE-SOURCE THRESHOLD VOLTAGE
vs
FREE-AIR TEMPERATURE
20
2
ID = 1 mA
1.5
ID = 0.25 A
TA = 25°C
18
ID = 10 mA
VGS – Gate-Source Voltage – V
VTGS – Gate-Source Threshold Voltage – V
2.5
1
0.5
16
14
12
VDS = 20 V
10
8
6
VDS = 30 V
4
VDS = 48 V
2
0
– 50
0
– 25
0
25
50
75
100
TA – Free-Air Temperature – °C
0
125
0.3
0.6
3
SOURCE-TO-DRAIN DIODE CURRENT
vs
SOURCE-TO-DRAIN DIODE VOLTAGE
1
3
0.7
I SD – Source-to-Drain Diode Current – A
I SD – Source-to-Drain Diode Current – A
2.4 2.7
Figure 10
SOURCE-TO-DRAIN DIODE CURRENT
vs
SOURCE-TO-DRAIN DIODE VOLTAGE
TA = 125°C
0.2
TA = 25°C
0.1
0.07
0.04
0.02
0.01
0.5
1.8 2.1
Q – Gate Charge – nC
Figure 9
0.4
0.9 1.2 1.5
TA = 25°C
2.5
2
1.5
1
0.5
0
0.55 0.6 0.65 0.7 0.75 0.8 0.85
VSD – Source-to-Drain Diode Voltage – V
0.9
0
0.2
0.4
0.6 0.8
1
1.2 1.4
1.6 1.8
2
VSD – Source-to-Drain Diode Voltage – V
Figure 11
Figure 12
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• DALLAS, TEXAS 75265
9
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
TYPICAL CHARACTERISTICS
CLAMP-DIODE CURRENT
vs
CLAMP-DIODE VOLTAGE
CLAMP-DIODE REVERSE RECOVERY TIME
vs
REVERSE di/dt
3
Clamp-Diode Current – A
2.5
2
1.5
1
0.5
0
0
0.2
0.4
140
t rr – Clamp-Diode Reverse Recovery Time – ns
TA = 25°C
0.6 0.8
1
1.2 1.4
1.6 1.8
IF = 0.1 A
VR = 48 V
TA = 25°C
130
120
110
100
90
80
70
60
50
40
30
10
2
20
Clamp-Diode Voltage – V
Figure 13
Figure 14
REVERSE di/dt
vs
FORWARD CURRENT
1000
600
TA = 25°C
400
200
VCD = 20 V
Reverse di/dt – A/ µ s
100
60
40
VCD = 40 V
20
10
6
4
2
1
0.01
0.1
1
IF – Forward Current – A
NOTE A: VCD = Vclamp – Vdrain
Figure 15
10
30
40
50
Reverse di/dt – A/µs
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
10
60 70 80 100
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
TYPICAL CHARACTERISTICS
40
16
RL = 2.5 Ω
IG = 10 µA
TA = 25°C
35
14
30
12
Gate-Source
Voltage
VDS = 25 V
25
10
20
VDS = 37.5 V
15
8
6
VDS = 25 V
VDS = 12.5 V
10
4
VGS – Gate-Source Voltage – V
V DS – Drain-Source Voltage – V
VDS = 37.5 V
2
5
Drain-Source Voltage
0
0
100
200
300
400
500
600
700
800
900
t – Time – µs
Figure 16. Resistive Switching Waveforms
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• DALLAS, TEXAS 75265
11
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
THERMAL INFORMATION
MAXIMUM DRAIN CURRENT
vs
DUTY CYCLE
MAXIMUM CLAMP-DIODE CURRENT
vs
DUTY CYCLE
3
3
2.8
I D – Maximum Drain Current – A
2.6
N=2
2.4
2.2
N=3
N=1
2
1.8
N=4
1.6
1.4
N=5
1.2
1
N=7
0.8
2.4
2.2
2
1.8
1.4
1.2
40
50
60
70
80
N=4
0.8
N=5
0.6
0.2
30
N=3
1
0.4
20
N=2
1.6
0.4
10
TA = 25°C
N = Number of Outputs
Conducting Simultaneously
See Note A
2.6
0.6
0
N=1
2.8
I CL – Maximum Clamp-Diode Current – A
TA = 25°C
N = Number of Outputs
Conducting Simultaneously
See Note A
90 100
N=7
0
10
20
30
Duty Cycle – %
40
50
60
70
80
90 100
Duty Cycle – %
Figure 17
Figure 18
tc
tw
NOTE A: For Figures 17 and 18, d = tw/tc = 10 ms / tc, where tw and tc are defined by the following:
PEAK AVALANCHE CURRENT
vs
TIME DURATION OF AVALANCHE
I D – Maximum Drain-Diode DCurrent – A
MAXIMUM DRAIN CURRENT
vs
DRAIN-SOURCE VOLTAGE
I AS – Peak Avalanche Current – A
5
4
TA = 25°C
3
2
TA = 125°C
10
6
4
1 ms
rDS(on) Limit
2
1
Thermal Limit
0.6
0.4
0.2
0.1
DC
0.06
0.04
0.02
1
0.001
0.01
1
0.1
tav – Time Duration of Avalanche – ms
TA = 25°C
0.01
0.1
Figure 19
12
1
10
VDS – Drain-To-Source Voltage – V
Figure 20
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
100
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
MECHANICAL INFORMATION
JW (R-GDIP-T24)
CERAMIC DUAL-IN-LINE PACKAGE
1.290 (32,80)
1.235 (31,30)
13
24
0.560 (14,20)
0.515 (13,10)
1
12
0.070 (1,78) MAX
0.100 (2,54)
0.060 (1,52)
0.070 (1,78)
0.020 (0,51)
0.225 (5,70)
0.150 (3,80)
0.610 (15,50)
0.590 (14,99)
Seating Plane
0.100 (2,54)
0.020 (0,51)
0.016 (0,41)
0.160 (4,06)
0.125 (3,17)
0°– 15°
0.012 (0,30)
0.008 (0,20)
4040111 / B 04/95
NOTES: A.
B.
C.
D.
E.
All linear dimensions are in inches (millimeters).
This drawing is subject to change without notice.
This package can be hermetically sealed with a ceramic lid using glass frit.
Index point is provided on cap for terminal identification only on press ceramic glass frit seal only
Falls within MIL-STD-1835 GDIP5-T24
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
13
TPIC2701
7-CHANNEL COMMON-SOURCE POWER DMOS ARRAY
SLIS019A – SEPTEMBER 1992 – REVISED SEPTEMBER 1996
MECHANICAL INFORMATION
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PIN SHOWN
PINS **
14
16
18
20
A MAX
0.775
(19,69)
0.775
(19,69)
0.920
(23.37)
0.975
(24,77)
A MIN
0.745
(18,92)
0.745
(18,92)
0.850
(21.59)
0.940
(23,88)
DIM
A
16
9
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.035 (0,89) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.015 (0,38)
0.010 (0,25) M
0°– 15°
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
14
POST OFFICE BOX 655303
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