TI TPIC3302

TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
•
•
•
•
Low rDS(on) . . . 0.4 Ω Typ
High-Voltage Outputs . . . 60 V
Pulsed Current . . . 5 A Per Channel
Fast Commutation Speed
D PACKAGE
(TOP VIEW)
SOURCE1
GATE2
SOURCE2
SOURCE3
description
1
8
2
7
3
6
4
5
GATE1
GND
DRAIN
GATE3
The TPIC3302 is a monolithic power DMOS array that consists of three electrically isolated N-channel
enhancement-mode DMOS transistors configured with a common drain and open sources. The TPIC3302 is
offered in a standard eight-pin small-outline surface-mount (D) package.
The TPIC3302 is characterized for operation over the case temperature range of – 40°C to 125°C.
schematic
DRAIN
6
Q1
GATE1
8
Q2
Z1
GATE2
1
SOURCE1
D1
Q3
2
Z2
GATE3
3
SOURCE2
5
Z3
4
SOURCE3
7
GND
absolute maximum ratings over operating case temperature range (unless otherwise noted)†
Drain-to-source voltage, VDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 V
Source-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Drain-to-GND voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 V
Gate-to-source voltage, VGS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 V
Continuous drain current, each output, all outputs on, TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Continuous source-to-drain diode current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Pulsed drain current, each output, TC = 25°C (see Note 1 and Figure 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 A
Single-pulse avalanche energy, TC = 25°C, EAS (see Figure 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 mJ
Continuous total power dissipation at (or below) TC = 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.95 W
Operating virtual junction temperature range, TJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 150°C
Operating case temperature range, TC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: Pulse duration = 10 ms, duty cycle = 2%
Copyright  1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
2–1
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
electrical characteristics, TC = 25°C (unless otherwise noted)
PARAMETER
V(BR)DSX
VGS(th)
TEST CONDITIONS
ID = 250 µA,
ID = 1 mA,
Drain-to-source breakdown voltage
Gate-to-source threshold voltage
VGS = 0
VDS = VGS
MIN
TYP
MAX
60
1.5
V
1.85
2.2
V(BR)
Reverse drain-to-GND breakdown voltage
(across D1)
Drain-to-GND current = 250 µA
VDS(on)
Drain-to-source on-state voltage
ID = 1 A,
See Notes 2 and 3
VF
Forward on-state voltage, GND-to-drain
ID = 1 A,
See Notes 2 and 3
VF(SD)
Forward on-state voltage, source-to-drain
IS = 1 A,
See Notes 2 and 3
VGS = 0,
IDSS
Zero gate voltage drain current
Zero-gate-voltage
VDS = 48 V,,
VGS = 0
TC = 25°C
TC = 125°C
IGSSF
IGSSR
Forward gate current, drain short circuited to source
Reverse gate current, drain short circuited to source
VGS = 16 V,
VSG = 16 V,
VDS = 0
VDS = 0
Ilk
lkg
Leakage current,
current drain-to-GND
drain to GND
VR = 48 V
TC = 25°C
TC = 125°C
0.05
1
0.5
10
0.4
0.475
Static drain-to-source
drain to source on-state
on state resistance
VGS = 10 V,
ID = 1 A,,
See Notes 2 and 3
and Figures 6 and 7
TC = 25°C
rDS(
DS(on))
TC = 125°C
0.63
0.7
VDS = 10 V,
See Notes 2 and 3
ID = 0.5 A,
VDS = 25 V,
f = 1 MHz
VGS = 0,
gfs
Forward transconductance
Ciss
Short-circuit input capacitance, common source
Coss
Short-circuit output capacitance, common source
Crss
Short-circuit reverse-transfer capacitance,
common source
100
VGS = 10 V,
UNIT
V
V
0.4
0.475
2
V
V
0.9
1.1
V
0.05
1
0.5
10
10
100
nA
10
100
nA
µA
µA
Ω
0.85
1.02
S
115
145
60
75
30
40
pF
F
NOTES: 2. Technique should limit TJ – TC to 10°C maximum, pulse duration ≤ 5 ms.
3. These parameters are measured with voltage-sensing contacts separate from the current-carrying contacts.
source-to-drain diode characteristics, TC = 25°C
PARAMETER
trr(SD)
QRR
Reverse-recovery time
Total diode charge
TEST CONDITIONS
IS = 0.5 A, VGS = 0,
di/dt = 100 A/µs,
MIN
VDS = 48 V,
See Figure 1
TYP
MAX
UNIT
35
ns
0.03
µC
GND-to-drain diode characteristics, TC = 25°C (see schematic, D1)
PARAMETER
trr
QRR
2–2
Reverse-recovery time
Total diode charge
TEST CONDITIONS
IF = 0.5 A,
di/dt = 100 A/µs,
POST OFFICE BOX 655303
VDS = 48 V,
See Figure 1
• DALLAS, TEXAS 75265
MIN
TYP
MAX
UNIT
90
ns
0.2
µC
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
resistive-load switching characteristics, TC = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
21
42
20
40
5
10
td(on)
td(off)
Turn-on delay time
tr
tf
Rise time
Fall time
13
26
Qg
Total gate charge
3.1
3.8
Qgs(th)
Threshold gate-to-source charge
0.4
0.5
Qgd
Gate-to-drain charge
1.3
1.6
LD
Internal drain inductance
5
LS
Internal source inductance
5
Rg
Internal gate resistance
Turn-off delay time
RL = 50 Ω,,
See Figure 2
VDD = 25 V,,
tdis = 10 ns,
VDS = 48 V,
V
See Figure 3
ten = 10 ns,,
ID = 0.5
0 5 A,
A
VGS = 10 V,
V
UNIT
ns
nC
nH
Ω
0.25
thermal resistance
PARAMETER
TEST CONDITIONS
RθJA
Junction-to-ambient thermal resistance
RθJP
Junction-to-pin thermal resistance
All outputs with equal power,
power
MIN
See Note 4
TYP
130
44
MAX
UNIT
°C/W
NOTE 4: Package mounted on an FR4 printed-circuit board with no heat sink
PARAMETER MEASUREMENT INFORMATION
1
TJ = 25°C
Reverse di/dt = 100 A/µs
I S – Source-to-Drain Diode Current – A
0.5
0
25% of IRM†
– 0.5
–1
– 1.5
IRM†
–2
– 2.5
trr(SD)
–3
0
25
50
75
100
125 150
Time – ns
175
200
225
250
† IRM = maximum recovery current
Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode
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• DALLAS, TEXAS 75265
2–3
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
PARAMETER MEASUREMENT INFORMATION
VDD = 25 V
tdis
ten
RL
Pulse Generator
10 V
VDS
VGS
td(on)
DUT
Rgen
0V
td(off)
VGS
50 Ω
50 Ω
tr
tf
CL = 30 pF
(see Note A)
VDD
VDS
VDS(on)
VOLTAGE WAVEFORMS
TEST CIRCUIT
NOTE A: CL includes probe and jig capacitance.
Figure 2. Resistive-Switching Test Circuit and Voltage Waveforms
Current
Regulator
12-V
Battery
0.2 µF
VDS
Qg
Same Type
as DUT
50 kΩ
10 V
0.3 µF
Qgs(th)
VDD
0
VGS
DUT
IG = 1 µA
Qgd
Gate Voltage
Time
IG CurrentSampling Resistor
ID CurrentSampling Resistor
Qgs = Qg – Qgd
VOLTAGE WAVEFORM
TEST CIRCUIT
Figure 3. Gate-Charge Test Circuit and Voltage Waveform
2–4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
PARAMETER MEASUREMENT INFORMATION
VDD = 25 V
420 µH
Pulse Generator
(see Note A)
15 V
VGS
VDS
ID
tav
tw
0V
IAS
(see Note B)
VGS
50 Ω
ID
DUT
0V
Rgen
50 Ω
V(BR)DSX = 60 V Min
VDS
0V
VOLTAGE AND CURRENT WAVEFORMS
TEST CIRCUIT
NOTES: A. The pulse generator has the following characteristics: tr ≤ 10 ns, tf ≤ 10 ns, ZO = 50 Ω.
B. Input pulse duration (tw) is increased until peak current IAS = 5 A.
Energy test level is defined as E
+
AS
I
AS
V
(BR)DSX
2
t av
+ 9 mJ.
Figure 4. Single-Pulse Avalanche-Energy Test Circuit and Waveforms
TYPICAL CHARACTERISTICS
STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE
vs
JUNCTION TEMPERATURE
1
2.5
ID = 1 A
2
ID = 1 mA
1.5
ID = 100 µA
1
0.5
0
– 40 – 20
20 40 60 80 100 120 140 160
TJ – Junction Temperature – °C
0
0.8
On-State Resistance – Ω
r DS(on) – Static Drain-to-Source
V GS (th) – Gate-to-Source Threshold Voltage – V
GATE-TO-SOURCE THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE
0.6
VGS = 10 V
0.4
VGS = 15 V
0.2
0
– 40 – 20
Figure 5
0
20 40 60 80 100 120 140 160
TJ – Junction Temperature – °C
Figure 6
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• DALLAS, TEXAS 75265
2–5
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
TYPICAL CHARACTERISTICS
STATIC DRAIN-TO-SOURCE ON-STATE RESISTANCE
vs
DRAIN CURRENT
DRAIN CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
1
5
15 V
10 V
nVGS = 0.2 V
TJ = 25°C
Unless Otherwise
Noted
I D – Drain Current – A
4
On-State Resistance – Ω
r DS(on) – Static Drain-to-Source
TJ = 25°C
VGS = 10 V
VGS = 15 V
VGS = 5 V
3
VGS = 4 V
2
1
VGS = 3 V
0.1
0.01
0
0.1
1
ID – Drain Current – A
10
0
1
2
3
4
5
6
7
8
VDS – Drain-to-Source Voltage – V
Figure 7
DRAIN CURRENT
vs
GATE-TO-SOURCE VOLTAGE
0.5
5
Total Number of Units = 639
TJ = 25°C
TJ = 25°C
4
I D – Drain Current – A
0.35
0.3
0.25
0.2
0.15
TJ = 150°C
2.5
2
1.5
1.06
1.05
0
1.04
0
1.03
0.5
1.02
0.05
0
1
7
8
9
2
3
4
5
6
VGS – Gate-to-Source Voltage – V
gfs – Forward Transconductance – S
Figure 9
Figure 10
POST OFFICE BOX 655303
TJ = 125°C
3
1
1.01
TJ = 75°C
3.5
0.1
1
Percentage of Units – %
TJ = – 40°C
4.5
0.4
2–6
10
Figure 8
DISTRIBUTION OF
FORWARD TRANSCONDUCTANCE
0.45
9
• DALLAS, TEXAS 75265
10
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
TYPICAL CHARACTERISTICS
SOURCE-TO-DRAIN DIODE CURRENT
vs
SOURCE-TO-DRAIN VOLTAGE
CAPACITANCE
vs
DRAIN-TO-SOURCE VOLTAGE
10
400
360
Capacitance – pF
320
280
I SD – Source-to-Drain Diode Current – A
f = 1 MHz
TJ = 25°C
Ciss(0) = 158 pF
Coss(0) = 400 pF
Crss(0) = 78 pF
240
200
160
Ciss
120
80
Coss
40
Crss
4
TJ = 150°C
0.1
8
12 16 20 24 28 32 36
VDS – Drain-to-Source Voltage – V
0.01
0.1
40
1
VSD – Source-to-Drain Voltage – V
150
10
50
VDD = 30 V
8
40
6
30
VDD = 48 V
4
2
10
VDD = 20 V
0
0
0.5
1
1.5
2
2.5
Qg – Gate Charge – nC
3
0
3.5
t rr – Reverse-Recovery Time – ns
12
VDD = 20 V
VGS – Gate-to-Source Voltage – V
VDS – Drain-to-Source Voltage – V
REVERSE-RECOVERY TIME
vs
REVERSE di/dt
14
ID = 0.5 A
TJ = 25°C
See Figure 3
20
10
Figure 12
DRAIN-TO-SOURCE VOLTAGE AND
GATE-TO-SOURCE VOLTAGE
vs
GATE CHARGE
60
TJ = 25°C
TJ = 75°C
Figure 11
70
TJ = – 40°C
TJ = 125°C
ÁÁ
ÁÁ
0
0
1
IS = 0.5 A
TJ = 25°C
See Figure 1
125
100
75
D1
50
Q1, Q2, and Q3
25
0
0
100
200
300
400
500
600
Reverse di/dt – A/µs
Figure 13
Figure 14
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• DALLAS, TEXAS 75265
2–7
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
THERMAL INFORMATION
MAXIMUM PEAK-AVALANCHE CURRENT
vs
TIME DURATION OF AVALANCHE
MAXIMUM DRAIN CURRENT
vs
DRAIN-TO-SOURCE VOLTAGE
10
10
I D – Maximum Drain Current – A
I AS – Maximum Peak-Avalanche Current – A
See Figure 4
TC = 25°C
1 µs†
10 ms†
1 ms†
1
500 µs†
ÁÁ
ÁÁ
0.1
0.1
DC Conditions
10
1
VDS – Drain-to-Source Voltage – V
100
TC = 25°C
TC = 125°C
1
0.01
0.1
Figure 16
† Less than 0.1 duty cycle
Figure 15
2–8
POST OFFICE BOX 655303
1
tav – Time Duration of Avalanche – ms
• DALLAS, TEXAS 75265
10
TPIC3302
3-CHANNEL COMMON-DRAIN POWER DMOS ARRAY
SLIS021B – APRIL 1994 – REVISED JULY 1995
THERMAL INFORMATION
D PACKAGE†
NORMALIZED JUNCTION - TO -AMBIENT THERMAL RESISTANCE
vs
PULSE DURATION
R θJA – Normalized Junction-to-Ambient Thermal Resistance – °C/W
10
1
DC Conditions
d = 0.5
d = 0.2
d = 0.1
0.1
d = 0.05
d = 0.02
d = 0.01
0.01
Single Pulse
0.001
tc
tw
ID
0
0.0001
0.0001
0.001
0.01
0.1
1
10
tw – Pulse Duration – s
† Device mounted on FR4 printed-circuit board with no heat sink
NOTES: ZθA(t) = r(t) RθJA
tw = pulse duration
tc = cycle time
d = duty cycle = tw/tc
Figure 17
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2–10
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