PT5060 Series 9-W +5V-Input Dual-Output Integrated Switching Regulator SLTS027B (Revised 12/19/2001) Features Description • Single Device: +5V Input • Complimentary Dual Output: ±12V, ±15V • Wide Input Voltage Range • 85% Efficiency • Adjustable Output Voltage • Laser-trimmed The PT5060 series of dual-output Integrated Switching Regulators (ISRs) provide a complimentary ±12V or ±15V from a single +5V input. Applications include systems that require power for analog interface circuitry, such as D/A and A/D converters, and Op Amps. The output voltage can be adjusted with an external resistor. These ISRs are made available in a 12-pin single in-line pin (SIP) package. Note that these modules are are not short-circuit protected. Pin-Out Information Standard Application V o adj 11 V in 3,4,5 PT5060 –Vo 2 2 GND 3 Vin PT Series Suffix (PT1234 x ) 4 Vin Case/Pin Configuration 5 Vin 8,9,10 +Vo 1 6 GND 7 GND 8 +Vo1 9 +Vo1 10 + COM COM C1 = Required 100µF electrolytic Specifications 1 –V o 2 C1 100 µF PT5061¨ = ±12 Volts PT5062¨ = ±15 Volts Function 1 2,6,7 Ordering Information Pin Order Suffix Package Code * N A C R G B (ECD) (ECA) (ECC) (ECE) (ECG) (ECK) +Vo1 Vertical Horizontal SMD Vertical, Side Tabs Horizontal, Side Tabs SMD, Side Tabs 11 Vo Adj * Previously known as package style 300. 12 Do Not Connect (Reference the applicable package code drawing for the dimensions and PC board layout) (Unless otherwise stated, Ta =25°C, Vin =+5V, I o =Io max, C1 =100µF) PT5060 SERIES Characteristics Symbol Conditions Output Current Io Over Vin range Current Limit Ilim Inrush Current On start up Input Voltage Range Iir ttr Vin Output Voltage Tolerance ∆Vo Over Vin and Io ranges Ta= 0°C to SOA limit (3) Line Regulation Regline Over Vin range Load Regulation Regload 0.1 ≤ Io ≤ Iomax Vo Ripple (pk-pk) Vn 20MHz bandwidth Transient Response ttr Vos 25% load change Vo over/undershoot Min Typ Max Units Vo1 = +12V Vo2 = –12V 0.05 0.05 (1) — — 0.50 0.25 A Vo1 = +15V Vo2 = –15V 0.05 0.05 (1) — — 0.40 0.20 A — %Iomax — — +Vo –1 A mSec V Over Io range +Vo1 –Vo2 +Vo1 –Vo2 — 150 (2) — — 4.75 5.5 2 — (3) — — ±1.5 ±5 ±3.0 ±10 %Vo — ±0.5 ±1.0 %Vo — ±0.5 ±1.0 %Vo — — ±1.5 ±2 ±3 ±3 %Vo — — 100 3 — 5 µSec %Vo Efficiency η Io=0.2A each output — 85 — % Switching Frequency ƒs Over Vin and Io ranges — 650 — kHz Operating Temperature Range Ta — 0 — +85 (4) °C Storage Temperature Ts –40 — +125 °C G’s Mechanical Shock Per Mil-STD-883D, Method 2002.3, 1 msec, Half Sine, mounted to a fixture — 500 — Mechanical Vibration Per Mil-STD-883D, Method 2007.2 20-2000 Hz, Soldered in a PC board — 15 — G’s — 6.5 — Weight Notes: (1) (2) (3) (4) Do not operate thes negative output rail of these ISRs below the minimum load. ISRs based on a boost topology are not short-circuit protected. The inrush current stated is above the normal input current for the associated output load. See Safe Operating Area curves or consult the factory for the appropriate derating. For technical support and more information, see inside back cover or visit www.ti.com grams Typical Characteristics PT5060 Series 9-W +5V-Input Dual-Output Integrated Switching Regulator PT5061 +/- 12VDC PT5062 +/- 15V (See Note A) Efficiency vs Output Current (See Note A) Efficiency vs Output Current 100 100 90 90 Vin 11.0V 70 8.0V 7.0V 60 5.0V -12V load=0.2Adc +12Vout 0-0.5Adc 50 Efficiency - % Efficiency - % Vin 80 4.75V 80 14.0V 12.0V 10.0V 7.0V 5.0V 4.75V 70 60 -15V load=0.2Adc +15Vout 0-0.4Adc 50 40 40 0 0.1 0.2 0.3 0.4 0.5 0 0.1 Ripple Voltage vs Output Current 0.3 0.4 Ripple Voltage vs Output Current 300 100 -12V load=0.2Adc +12Vout 0-0.5Adc -15V load= 0.2Adc +15Vout 0-0.4Adc 250 80 Vin 4. 75V 60 5.0V 7.0V 8.0V 40 11.0V Ripple-(mV) Ripple-(mV) 0.2 Iout-(Amps) Iout-(Amps) Vin 200 4.75V 5.0V 7.0V 10.0V 12.0V 14.0V 150 100 20 50 0 0 0 0. 1 0. 2 0. 3 0. 4 0. 5 0 0.1 Iout-(Amps) 0.2 0.3 0.4 Iout-(Amps) Power Dissipation vs Output Current Power Dissipation vs Output Current 2 2 -15V load=0.2Adc +15Vout 0-0.4Adc -12V load=0.2Adc +12Vout 0-0.5Adc 1.6 1.6 Vin Vin 1.2 5.0V 7.0V 8.0V 0.8 11.0V PD-(Watts) PD-(Watts) 4.75V 0.4 4.75V 5.0V 7.0V 10.0V 12.0V 14.0V 1.2 0.8 0.4 0 0 0 0.1 0.2 0.3 0.4 0.5 0 0.1 Iout-(Amps) 80 80 70 Airflow 60 100 LFM 60 LFM 0 LFM 50 40 30 20 0.1 0.2 0.3 0.4 Safe Operating Area Vin = 5.0V, lo2 = 0.2A (See Note B) 90 0.3 0.4 Maximum Positive Output Current (A) 0.5 Ambient Temperature (°C) Ambient Temperature (°C) Safe Operating Area, Vin =5.0V; lo2 = 0.25A (See Note B) 90 0.0 0.2 Iout-(Amps) 70 Airflow 60 100 LFM 60 LFM 50 0 LFM 40 30 20 0.0 0.1 0.2 0.3 0.4 Maximum Positive Output Current (A) Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the Converter. Note B: Thermal derating graphs are developed in free-air convection cooling, which corresponds to approximately 40–60LFM of airflow. For technical support and more information, see inside back cover or visit www.ti.com Application Notes PT5060 Series Adjusting the Output Voltage of the PT5060 Dual-Output Boost Converter Series The values of (R1) [adjust down], and R2 [adjust up], can also be calculated using the following formulas. The dual output voltage of the PT5060 series modules can be adjusted higher or lower than the factory pre-set voltage with the addition of a single external resistor. Table 1 gives the applicable adjustment range for each model in the series as Va (min) and Va (max). (R1) = 3.65 (Va – 2.5 ) - 0.1 (Vo – Va) kΩ Adjust Up: An increase in the output voltage is obtained by adding a resistor R2, between pin 11 (Vo adj) and pins 2, 6, or 7 (GND). R2 = 9.125 Va - Vo kΩ Adjust Down: Add a resistor (R1), between pin 11 (Vo adj) and pins 8, 9 or 10 (Vo1). Refer to Figure 1 and Table 2 for both the placement and value of the required resistor, either (R1) or R2 as appropriate. Notes: 1. Both the positive and negative voltage outputs from the ISR are adjusted simultaneously. 2. Use only a single 1% resistor in either the (R1) or R2 location. Place the resistor as close to the ISR as possible. 3. Never connect capacitors from Vo adj to either GND or Vo. Any capacitance added to the Vo adjust pin will affect the stability of the ISR. 4. An increase in the output voltage must be accompanied by a corresponding reduction in the specified maximum current at each output. For Vo1 and –Vo2, the revised maximum output current must be reduced to the equivalent of 6 watts and 3 watts respectively. i.e. 6 Io1 (max) = Adc Va and Io2 (max) = 3 Adc, Va where Va is the adjusted output voltage. 5. Adjustments to the output voltage will also limit the maximum input voltage that can be applied to the ISR. The maximum input voltage that may be applied is limited to (Vo – 1)Vdc or 14Vdc, whichever is less. Figure 1 –Vo 2 V in 3,4,5 V in PT5060 GND 2,6,7 V o(adj) 11 + V o1 1 –V o 2 8,9,10 +Vo 1 ( R 1) Adj Down C out 1 0 0 µF + R2 Adjust Up COM COM Where: - 0.1 Vo = Original output voltage Va = Adjusted output voltage Table 1 PT5060 ADJUSTMENT AND FORMULA PARAMETERS Series Pt # PT5061 Vo (nom) Va (min) ±12.0V PT5062 ± 7.5V ± 7.5V Va (max) ±14.0V ±20.0V ±15.0V Table 2 PT5060 ADJUSTMENT RESISTOR VALUES Series Pt # Current Vo(nom) Va(req’d) 7.0 7.5 8.0 8.5 9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 15.5 16.0 16.5 17.0 17.5 18.0 18.5 19.0 19.5 20.0 R1 = (Blue) For technical support and more information, see inside back cover or visit www.ti.com PT5061 0.5/0.25Adc ±12.0Vdc PT5062 0.4/0.2Adc ±15.0Vdc (4.0)kΩ (4.9)kΩ (6.2)kΩ (7.8)kΩ (10.1)kΩ (13.6)kΩ (19.4)kΩ (30.9)kΩ (65.6)kΩ (2.3)kΩ (2.8)kΩ (3.3)kΩ (3.9)kΩ (4.6)kΩ (5.4)kΩ (6.4)kΩ (7.7)kΩ (9.3)kΩ (11.5)kΩ (14.5)kΩ (19.1)kΩ (26.7)kΩ (41.9)kΩ (87.5)kΩ 18.2kΩ 9.0kΩ 6.0kΩ 4.5kΩ 18.2kΩ 9.0kΩ 6.0kΩ 4.5kΩ 3.6kΩ 2.9kΩ 2.5kΩ 2.2kΩ 1.9kΩ 1.7kΩ R2 = Black PACKAGE OPTION ADDENDUM www.ti.com 10-Jan-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Qty Drawing Eco Plan Lead/Ball Finish (2) MSL Peak Temp Samples (3) (Requires Login) PT5061A LIFEBUY SIP MODULE ECA 12 12 Pb-Free (RoHS) Call TI N / A for Pkg Type PT5061C LIFEBUY SIP MODULE ECC 12 12 Pb-Free (RoHS) Call TI Level-1-215C-UNLIM PT5061N LIFEBUY SIP MODULE ECD 12 12 Pb-Free (RoHS) Call TI N / A for Pkg Type PT5061R LIFEBUY SIP MODULE ECE 12 12 Pb-Free (RoHS) Call TI N / A for Pkg Type PT5062A LIFEBUY SIP MODULE ECA 12 12 Pb-Free (RoHS) Call TI N / A for Pkg Type PT5062C LIFEBUY SIP MODULE ECC 12 12 Pb-Free (RoHS) Call TI Level-1-215C-UNLIM PT5062G LIFEBUY SIP MODULE ECG 12 12 Pb-Free (RoHS) Call TI N / A for Pkg Type PT5062N LIFEBUY SIP MODULE ECD 12 12 Pb-Free (RoHS) Call TI N / A for Pkg Type (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 10-Jan-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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