CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com N-Channel NexFET™ Power MOSFETs Check for Samples: CSD16340Q3 FEATURES 1 • • • • • • • • • 2 PRODUCT SUMMARY Optimized for 5V Gate Drive Resistance Rated at VGS = 2.5V Ultra Low Qg and Qgd Low Thermal Resistance Avalanche Rated Pb Free Terminal Plating RoHS Compliant Halogen Free SON 3.3mm x 3.3mm Plastic Package VDS Drain to Source Voltage 25 V Qg Gate Charge Total (4.5V) 6.5 nC Qgd Gate Charge Gate to Drain RDS(on) • DESCRIPTION The NexFET™ power MOSFET has been designed to minimize losses in power conversion and optimized for 5V gate drive applications. Figure 1. Top View 8 D S 2 7 D S 3 6 D mΩ VGS = 4.5V 4.3 mΩ VGS = 8V 3.8 mΩ Threshold Voltage 0.85 Device Package Media CSD16340Q3 SON 3.3 × 3.3 Plastic Package 13-inch reel V Qty Ship 2500 Tape and Reel ABSOLUTE MAXIMUM RATINGS TA = 25°C unless otherwise stated VALUE UNIT VDS Drain to Source Voltage 25 V VGS Gate to Source Voltage +10 / –8 V Continuous Drain Current, TC = 25°C 60 A Continuous Drain Current(1) 21 A Pulsed Drain Current, TA = 25°C(2) 115 A ID 1 nC 6.1 ORDERING INFORMATION Point-of-Load Synchronous Buck Converter for Applications in Networking, Telecom and Computing Systems Optimized for Control or Synchronous FET Applications S Drain to Source On Resistance Vth APPLICATIONS • 1.2 VGS = 2.5V IDM (1) PD Power Dissipation 3 W TJ, TSTG Operating Junction and Storage Temperature Range –55 to 150 °C EAS Avalanche Energy, single pulse ID = 40A, L = 0.1mH, RG = 25Ω 80 mJ (1) Typical RθJA = 39°C/W on 1in2 Cu (2 oz.) on 0.060" thick FR4 PCB. (2) Pulse width ≤300μs, duty cycle ≤2% D G 5 4 D P0095-01 RDS(ON) vs VGS Gate Charge 8 ID = 20A VDS = 12.5V 7 14 ID = 20A VG − Gate Voltage − V RDS(on) − On-State Resistance − mW 16 12 10 8 TC = 125°C 6 4 TC = 25°C 2 6 5 4 3 2 1 0 0 0 1 2 3 4 5 6 7 8 VGS − Gate to Source Voltage − V 9 10 G006 0 2 4 6 8 10 12 Qg − Gate Charge − nC G003 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NexFET is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2011, Texas Instruments Incorporated CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise stated) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT Static Characteristics BVDSS Drain to Source Voltage VGS = 0V, IDS = 250μA IDSS Drain to Source Leakage Current VGS = 0V, VDS = 20V IGSS Gate to Source Leakage Current VDS = 0V, VGS = +10/-8V VGS(th) Gate to Source Threshold Voltage VDS = VGS, IDS = 250μA RDS(on) gfs Drain to Source On Resistance Transconductance 25 0.6 V 1 μA 100 nA 0.85 1.1 V VGS = 2.5V, IDS = 20A 6.1 7.8 mΩ VGS = 4.5V, IDS = 20A 4.3 5.5 mΩ VGS = 8V, IDS = 20A 3.8 4.5 mΩ VDS = 15V, IDS = 20A 121 S Dynamic Characteristics CISS Input Capacitance COSS Output Capacitance 1050 1350 pF 730 950 CRSS pF Reverse Transfer Capacitance 53 69 pF Rg Series Gate Resistance 1.5 3 Ω Qg Gate Charge Total (4.5V) 6.5 9.2 nC Qgd Gate Charge Gate to Drain Qgs Gate Charge Gate to Source Qg(th) Gate Charge at Vth QOSS Output Charge td(on) Turn On Delay Time tr Rise Time td(off) Turn Off Delay Time tf Fall Time VGS = 0V, VDS = 12.5V, f = 1MHz 1.2 nC 2.1 nC 1 nC 15 nC 4.8 ns 16.1 ns 13.8 ns 5.2 ns VDS = 12.5V, ID = 20A VDS = 13V, VGS = 0V VDS = 12.5V, VGS = 4.5V ID = 20A RG = 2Ω Diode Characteristics VSD Diode Forward Voltage Qrr Reverse Recovery Charge trr Reverse Recovery Time IS = 20A, VGS = 0V 0.8 VDD = 13V, IF = 20A, di/dt = 300A/μs 1 V 14.5 nC 20 ns THERMAL INFORMATION THERMAL METRIC (1) (2) CSD16340Q3 Q3 (8 PINS) θJA Junction-to-ambient thermal resistance 42.0 θJCtop Junction-to-case (top) thermal resistance 20.6 θJB Junction-to-board thermal resistance 8.8 ψJT Junction-to-top characterization parameter 0.3 ψJB Junction-to-board characterization parameter 8.7 θJCbot Junction-to-case (bottom) thermal resistance 0.1 (1) (2) 2 UNITS °C/W For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. For thermal estimates of this device based on PCB copper area, see the TI PCB Thermal Calculator. Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com GATE GATE Source Source Max RθJA = 162°C/W when mounted on minimum pad area of 2 oz. Cu. Max RθJA = 58°C/W when mounted on 1 inch2 of 2 oz. Cu. DRAIN DRAIN M0161-02 M0161-01 TYPICAL MOSFET CHARACTERISTICS (TA = 25°C unless otherwise stated) ZqJA – NormalizedThermal Impedance 10 1 0.5 0.3 0.1 0.1 Duty Cycle = t1/t2 0.05 0.01 P 0.02 0.01 t1 t2 o Typical R qJA = 138 C/W (min Cu) TJ = P x ZqJA x R qJA Single Pulse 0.001 0.001 0.01 0.1 1 10 100 1k tP – Pulse Duration–s G012 Figure 2. Transient Thermal Impedance Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 3 CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) 50 50 45 45 40 VGS = 2.5V 35 ID − Drain Current − A ID − Drain Current − A (TA = 25°C unless otherwise stated) VGS = 3V 30 VGS = 3.5V 25 VGS = 4.5V 20 VGS = 8V 15 35 30 25 TC = 25°C 20 TC = 125°C 15 10 10 5 5 0 0.0 VDS = 5V 40 TC = −55°C 0 0.1 0.3 0.2 0.4 0.5 0.7 0.6 VDS − Drain to Source Voltage − V 0.9 1.3 1.5 1.7 2.1 1.9 VGS − Gate to Source Voltage − V G001 Figure 3. Saturation Characteristics G002 Figure 4. Transfer Characteristics 8 2.5 f = 1MHz VGS = 0V ID = 20A VDS = 12.5V 7 6 C − Capacitance − nF VG − Gate Voltage − V 1.1 5 4 3 2 2.0 CISS = CGD + CGS 1.5 COSS = CGD + CGS 1.0 CRSS = CGD 0.5 1 0 0.0 0 2 4 6 8 10 12 Qg − Gate Charge − nC 0 5 25 G004 16 RDS(on) − On-State Resistance − mW VGS(th) − Threshold Voltage − V 20 Figure 6. Capacitance 1.2 ID = 250mA 1.0 0.8 0.6 0.4 0.2 14 ID = 20A 12 10 8 TC = 125°C 6 4 TC = 25°C 2 0 −25 25 75 125 175 TC − Case Temperature − °C 0 1 2 3 4 5 6 7 8 9 VGS − Gate to Source Voltage − V G005 Figure 7. Threshold Voltage vs. Temperature 4 15 VDS − Drain to Source Voltage − V G003 Figure 5. Gate Charge 0.0 −75 10 10 G006 Figure 8. On Resistance vs. Gate Voltage Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com TYPICAL MOSFET CHARACTERISTICS (continued) (TA = 25°C unless otherwise stated) 100 ID = 20A VGS = 4.5V 1.4 ISD − Source to Drain Current − A Normalized On-State Resistance 1.6 1.2 1.0 0.8 0.6 0.4 0.2 0.0 −75 10 1 TC = 125°C 0.1 TC = 25°C 0.01 0.001 0.0001 −25 25 75 125 175 TC − Case Temperature − °C 0.0 0.2 0.6 0.8 1.0 VSD − Source to Drain Voltage − V G007 Figure 9. Normalized On Resistance vs. Temperature G008 Figure 10. Typical Diode Forward Voltage 1000 1k 1ms 10ms 100ms 1s DC I(AV) − Peak Avalanche Current − A IDS - Drain-to-Source Current - A 0.4 100 10 Area Limited by Rds(on) 1 0.1 Single Pulse Typical RthetaJA = 138ºC/W(min Cu) 0.01 0.01 0.1 1 10 TC = 25°C TC = 125°C 10 1 0.01 100 VDS - Drain-to-Source Voltage - V 100 0.1 1 10 100 G001 t(AV) − Time in Avalanche − ms Figure 11. Maximum Safe Operating Area G010 Figure 12. Single Pulse Unclamped Inductive Switching 80 ID − Drain Current − A 70 60 50 40 30 20 10 0 −50 −25 0 25 50 75 100 125 TC − Case Temperature − °C 150 175 G011 Figure 13. Maximum Drain Current vs. Temperature Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 5 CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com MECHANICAL DATA Q3 Package Dimensions D2 D H L 1 2 7 3 6 4 5 5 4 3 b E2 E 6 e E 7 2 8 8 1 q L1 Top View A1 Bottom View A Side View c D Front View M0142-01 DIM MILLIMETERS MIN NOM MAX MIN NOM MAX A 0.950 1.000 1.100 0.037 0.039 0.043 A1 0.000 0.000 0.050 0.000 0.000 0.002 b 0.280 0.340 0.400 0.011 0.013 0.016 c 0.150 0.200 0.250 0.006 0.008 0.010 D 3.200 3.300 3.400 0.126 0.130 0.134 D1 – – – – – – D2 1.650 1.750 1.800 0.065 0.069 0.071 E 3.200 3.300 3.400 0.126 0.130 0.134 E1 – – – – – – E2 2.350 2.450 2.550 0.093 0.096 0.100 e 6 INCHES 0.650 TYP 0.026 H 0.35 0.450 0.550 0.014 0.018 0.022 L 0.35 0.450 0.550 0.014 0.018 0.022 L1 – – – – – – θ – – – – – – Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com 2.31 1 8 8 1 0.65 Typ. 2.45 5 4 5 3.50 0.56 0.41 4 0.50 Typ. Recommended PCB Pattern 0.63 M0143-01 For recommended circuit layout for PCB designs, see application note SLPA005 – Reducing Ringing Through PCB Layout Techniques. 1.75 ±0.10 Q3 Tape and Reel Information 4.00 ±0.10 (See Note 1) Ø 1.50 +0.10 –0.00 3.60 1.30 3.60 5.50 ±0.05 12.00 +0.30 –0.10 8.00 ±0.10 2.00 ±0.05 M0144-01 Notes: 1. 10 sprocket hole pitch cumulative tolerance ±0.2 2. Camber not to exceed 1mm IN 100mm, noncumulative over 250mm 3. Material:black static dissipative polystyrene 4. All dimensions are in mm (unless otherwise specified) 5. Thickness: 0.30 ±0.05mm 6. MSL1 260°C (IR and Convection) PbF Reflow Compatible Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 7 CSD16340Q3 SLPS247D – DECEMBER 2009 – REVISED NOVEMBER 2011 www.ti.com REVISION HISTORY Changes from Original (December 2009) to Revision A • Changed Qg in the PRODUCT SUMMARY table from: 6.8 To 6.5 nC ................................................................................. 1 Changes from Revision A (January 2010) to Revision B • Page Changed Figure 3, reversed the order of the VGS labels ...................................................................................................... 4 Changes from Revision B (September 2010) to Revision C • Page Page the Package Marking Information section ............................................................................................................................. 7 Changes from Revision C (September 2010) to Revision D Page • Replaced the THERMAL CHARACTERISTICS table with the new Thermal Information Table .......................................... 2 • Replaced Figure 11 - Maximum Safe Operating Area .......................................................................................................... 5 8 Submit Documentation Feedback Copyright © 2009–2011, Texas Instruments Incorporated Product Folder Link(s): CSD16340Q3 PACKAGE MATERIALS INFORMATION www.ti.com 6-Jun-2011 TAPE AND REEL INFORMATION *All dimensions are nominal Device CSD16340Q3 Package Package Pins Type Drawing SON DQG 8 SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 2500 330.0 12.8 Pack Materials-Page 1 3.6 B0 (mm) K0 (mm) P1 (mm) 3.6 1.2 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 6-Jun-2011 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) CSD16340Q3 SON DQG 8 2500 335.0 335.0 32.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. 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