SSG4932N 10 A, 30 V, RDS(ON) 13.5 m Dual N-Channel Mode Power MOSFET Elektronische Bauelemente RoHS Compliant Product A suffix of “-C” specifies halogen & lead-free DESCRIPTION These miniature surface mount MOSFETs utilize a high cell density trench process to provide low RDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management In portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. SOP-8 B L D M FEATURES A C N Low RDS(on) provides higher efficiency and extends battery life. Low thermal impedance copper leadframe SOP-8 saves board space. Fast switching speed. High performance trench technology. J H REF. A B C D E F G PACKAGE INFORMATION Package MPQ LeaderSize SOP-8 2.5K 13’ inch K G Millimeter Min. Max. 5.80 6.20 4.80 5.00 3.80 4.00 0° 8° 0.40 0.90 0.19 0.25 1.27 TYP. E F REF. H J K L M N Millimeter Min. Max. 0.35 0.49 0.375 REF. 45° 1.35 1.75 0.10 0.25 0.25 REF. S D G D S D G D MAXIMUM RATINGS (TA = 25°C unless otherwise specified) Parameter Drain-Source Voltage Gate-Source Voltage Continuous Drain Current 1 Pulsed Drain Current 2 Continuous Source Current (Diode Conduction) 1 Total Power Dissipation 1 Operating Junction & Storage Temperature Range Symbol Ratings Unit VDS 30 V VGS ±12 V ID @ TA = 25°C 10 A ID @ TA = 70°C 8.2 A IDM ±50 A IS 2.3 A PD @ TA = 25°C 2.1 W PD @ TA = 70°C 1.3 W TJ, TSTG -55 ~ 150 °C Thermal Resistance Ratings Thermal Resistance Junction-Case (Max.) 1 Thermal Resistance Junction-ambient (Max.) 1 t≦5 sec RθJC 40 °C / W t≦5 sec RθJA 60 °C / W Notes: 1. Surface Mounted on 1” x 1” FR4 Board. 2. Pulse width limited by maximum junction temperature. http://www.SeCoSGmbH.com/ 31-Dec-2010 Rev. B Any changes of specification will not be informed individually. Page 1 of 2 SSG4932N 10 A, 30 V, RDS(ON) 13.5 m Dual N-Channel Mode Power MOSFET Elektronische Bauelemente ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise specified) Parameter Symbol Min. Typ. Max. Unit Teat Conditions Static Drain-Source Breakdown Voltage V(BR)DSS 100 - - V VGS= 0V, ID= 250μA VGS(th) 1 - - V VDS= VGS, ID= 250μA Gate-Body Leakage Current IGSS - - ±100 nA VDS= 0V, VGS= 12V Zero Gate Voltage Drain Current IDSS - - 1 μA VDS= 80V, VGS= 0V - - 25 μA VDS= 80V, VGS= 0V, TJ= 55°C 20 - - A VDS= 5V, VGS= 10V - - 13.5 - - 20 gfs - 40 - S VDS= 15V, ID= 10A VSD - 0.7 - V IS= 2.3A, VGS= 0V Gate Threshold Voltage On-State Drain Current 1 ID(on) Drain-Source On-Resistance 1 Forward Transconductance Diode Forward Voltage 1 RDS(ON) Dynamic mΩ VGS= 4.5V, ID= 10A VGS= 2.5V, ID= 8A 2 Total Gate Charge Qg - 20 - Gate-Source Charge Qgs - 7.0 - Gate-Drain Charge Qgd - 7.0 - nC ID= 10A VDS= 15V VGS= 5V nS VDD= 25V ID= 1A VGEN= 10V RL= 25Ω Switching Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Td(on) - 20 - Tr - 9 - Td(off) - 70 - Tf - 20 - Notes: 1. Pulse test：PW ≦ 300μs duty cycle ≦ 2%. 2. Guaranteed by design, not subject to production testing. http://www.SeCoSGmbH.com/ 31-Dec-2010 Rev. B Any changes of specification will not be informed individually. Page 2 of 2