SCBS088A − NOVEMBER 1991 − REVISED NOVEMBER 1993 • • • • • • DW OR NT PACKAGE (TOP VIEW) State-of-the-Art BiCMOS Design Significantly Reduces ICCZ ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0) Latch Version of the ′BCT646 Independent Latches and Enables for A and B Buses Multiplexed Real-Time and Stored Data Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT) LEAB SAB DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 24 2 23 3 22 4 21 5 20 6 19 7 18 8 17 9 16 10 15 11 14 12 13 VCC LEBA SBA OE B1 B2 B3 B4 B5 B6 B7 B8 description The SN74BCT956 consists of bus transceiver circuits, D-type latches, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal latches. Data on the A or B bus is stored in the latches when the appropriate latch-enable (LEAB or LEBA) input is low. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the SN74BCT956. Output-enable (OE) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode (OE low), data present at the high-impedance port may be stored in either latch or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. When the appropriate latch-enable input is high, the latch is transparent, and real-time data is output regardless of the level at the select control. The direction control (DIR) determines which bus receives data when OE is low. In the isolation mode (OE high), A data may be stored in one register and/or B data may be stored in the other register. When an output function is disabled, the input function is still enabled and may be used to store and transmit data. Only one of the two buses, A or B, may be driven at a time. The SN74BCT956 is characterized for operation from 0°C to 70°C. Copyright 1993, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ • DALLAS, TEXAS 75265 • HOUSTON, TEXAS 77251−1443 POST OFFICE BOX 655303 POST OFFICE BOX 1443 1 21 OE L 3 DIR L 1 LEAB X 23 LEBA X 2 SAB X L L X H X BUS B BUS A BUS A BUS B SCBS088A − NOVEMBER 1991 − REVISED NOVEMBER 1993 22 SBA L (Thru) H (Latch) 21 OE L 3 DIR H 1 LEAB X 23 LEBA X 2 SAB L L H H X H 1 LEAB L X L 23 LEBA X L L 2 SAB X X X BUS B BUS A BUS B BUS A 3 DIR X X X 22 SBA X X X 21 OE L L STORAGE FROM A, B, OR A AND B 3 DIR L H 1 LEAB X L 23 LEBA L X 2 SAB X H TRANSFER STORED DATA TO A OR B Figure 1. Bus-Management Functions 2 X REAL-TIME TRANSFER BUS A TO BUS B REAL-TIME TRANSFER BUS B TO BUS A 21 OE X X H 22 SBA X (Thru) • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 22 SBA H X (Latch) SCBS088A − NOVEMBER 1991 − REVISED NOVEMBER 1993 FUNCTION TABLE INPUTS DATA I/O OPERATION OR FUNCTION OE DIR LEAB LEBA SAB SBA A1 THRU A8 B1 THRU B8 Unspecified† X X L X X X Input X X X L X X Unspecified† Input Store A, B unspecified† Store B, A unspecified† L H X X L X Input Output A transparent, real-time A data to B bus (thru) L H H X H X Input Output A transparent, real-time A data to B bus (latch) L H L X L X Input Output A data latched, real-time A data to B bus (thru) L H L X H X Input Output A data latched, latched A data to B bus (latch) L L X X X L Output Input B transparent, real-time B data to A bus (thru) L L X H X H Output Input B transparent, real-time B data to A bus (latch) L L X L X L Output Input B data latched, real-time B data to A bus (thru) L L X L X H Output Input B data latched, latched B data to A bus (latch) H X L L X X Input Input Isolation, A and B data latched H X H H X X Input Input Isolation, no storage † The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled; i.e., data at the bus pins is latched whenever the appropriate latch-enable input is low. logic symbol‡ OE DIR LEBA SBA LEAB SAB A1 21 3 23 22 1 2 4 G3 3 EN1 [BA] 3 EN2 [AB] C4 G5 C6 G7 ≥1 1 6D A2 A3 A4 A5 A6 A7 A8 20 B1 5 1 ≥1 7 1 4D 5 2 7 5 19 6 18 7 17 8 16 9 15 10 14 11 13 B2 B3 B4 B5 B6 B7 B8 ‡ This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • 3 SCBS088A − NOVEMBER 1991 − REVISED NOVEMBER 1993 logic diagram (positive logic) OE DIR 21 3 LEBA 23 SBA 22 LEAB SAB 1 2 One of Eight Channels 1D C1 A1 4 20 B1 1D C1 To Seven Other Channels absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −ā 0.5 V to 7 V Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −ā 0.5 V to 7 V Voltage range applied to any output in the disabled or power-off state, VO . . . . . . . . . . . . . . . . −ā 0.5 V to 5.5 V Voltage range applied to any output in the high state, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −ā 0.5 V to VCC Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −ā 30 mA Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Operating free-air temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −ā 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 4 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • SCBS088A − NOVEMBER 1991 − REVISED NOVEMBER 1993 recommended operating conditions (see Note 2) MIN NOM MAX 4.5 5 5.5 UNIT VCC VIH Supply voltage VIL IIK Low-level input voltage 0.8 V Input clamp current −18 mA IOH IOL High-level output current −15 mA 64 mA 70 °C High-level input voltage 2 V Low-level output current TA Operating free-air temperature NOTE 2: Unused or floating pins (input or I/O) must be held high or low. V 0 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VCC = 4.5 V, VOH VOL II IIH‡ IIL‡ IOS§ Cio II = −18 mA IOH = − 3 mA VCC = 4.5 V Any input MIN TYP† 2.4 3.3 2 3.1 IOH = −15 mA IOL = 64 mA VCC = 4.5 V, VCC = 5.5 V, 0.42 VI = 5.5 V Control input Any input Control input A to B B to A MAX UNIT −1.2 V V 0.55 1 A or B ports ICCL ICCH ICCZ Ci TEST CONDITIONS 70 VCC = 5.5 V, VI = 2.7 V VCC = 5.5 V, VCC = 5.5 V, VI = 0.5 V VO = 0 VCC = 5.5 V, VCC = 5.5 V, Outputs open 42 Outputs open VCC = 5.5 V, VCC = 5 V, Outputs open VCC = 5 V, VO = 2.5 V or 0.5 V 20 µA A −0.7 mA −225 mA 67 mA 5 8 mA 6.7 11 mA −100 VI = 2.5 V or 0.5 V V mA 5 pF 11 pF 11 † All typical values are at VCC = 5 V, TA = 25°C. ‡ For I/O ports, the parameters IIH and IIL include the off-state output current. § Not more than one output should be tested at a time, and the duration of the test should not exceed one second. timing requirements over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) VCC = 5 V, TA = 25°C MIN tw Pulse duration, LE high tsu Setup time, data before LE↓ th Hold time, data after LE↓ • 4 4 High 0 0 Low 3 3 High 0 0 Low 2.5 2.5 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • MIN MAX UNIT MAX ns ns ns 5 SCBS088A − NOVEMBER 1991 − REVISED NOVEMBER 1993 switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Note 3) FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B SAB or SBA high (latch) B or A tPLH tPHL A or B SAB or SBA low (thru) B or A tPLH tPHL LEBA or LEAB A or B tPLH tPHL SAB or SBA† A or B high B or A tPLH tPHL SAB or SBA† A or B low B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B tPZH tPZL DIR A or B tPHZ tPLZ DIR A or B PARAMETER VCC = 5 V, TA = 25°C MIN MAX 7.3 2.2 8.3 6.7 10 3.6 11.7 MIN TYP MAX 2.2 5.1 3.6 2 5.1 7.2 2 8.2 3.3 6.7 9.3 3.3 11.1 2.2 5.5 7.9 2.2 9.3 2.9 6 8.5 2.9 9.8 3.7 6.8 10.6 3.7 13.3 2.6 5.3 7.4 2.6 8.2 3.2 7.4 9.5 3.2 11.2 3.8 7.7 10.1 3.8 12.2 3.1 6.9 9.5 3.1 11.7 3.9 7.8 10.7 3.9 13.1 3.5 6.6 8.9 3.5 10.7 2.6 5.9 8.3 2.6 9.5 2.1 5 9.8 2.1 12 2.9 6 10.9 2.9 13.1 3.6 6.3 10.2 3.6 12.5 2.5 5.7 8.9 2.5 10.8 † These parameters are measured with the internal output state of the storage register opposite to that of the bus input. NOTE 3: Load circuits and voltage waveforms are shown in Section 1. 6 • POST OFFICE BOX 655303 DALLAS, TEXAS 75265 POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443 • UNIT ns ns ns ns ns ns ns ns ns IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. 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