DRV11873 www.ti.com SLWS237 – NOVEMBER 2012 12-V, 3-PHASE, SENSORLESS BLDC MOTOR DRIVER Check for Samples: DRV11873 FEATURES 1 • • • • • • • • • • Input Voltage Range 5 V to 16 V Six Integrated MOSFETs With 1.5-A Continuous Output Current Total Driver H+L RDSON 450 mΩ Sensorless Proprietary BMEF Control Scheme 150° Commutation Synchronous Rectification PWM Operation FG and RD Open Drain Output 5-V LDO for External Use PWMIN Input From 15 kHz to 100 kHz Over Current Protection With Adjustable Limit Through External Resistor • • • • Lock Detection Voltage Surge Protection UVLO Thermal Shutdown APPLICATIONS • • • Appliance Cooling Fan Desktop Cooling Fan Server Cooling Fan DESCRIPTION DRV11873 is a three phase, sensorless motor driver with integrated power MOSFETs with drive current capability up to 1.5-A continuous and 2-A peak. DRV11873 is specifically designed for low noise and low external component count fan motor drive applications. DRV11873 has built in over current protection with no external current sense resistor needed. The synchronous rectification mode of operation achieves increased efficiency for motor driver applications. DRV11873 outputs FG and RD to indicate motor status with open drain output. A 150° sensorless BEMF control scheme is implemented for a three phase motor. DRV11873 is available in the thermally efficient 16-pin TSSOP package. The operation temperature is specified from -40°C to 125°C. TYPICAL APPLICATION 1 16 FG 2 15 FR RD 3 14 CS VCP 4 13 COM CPP 5 12 V5 CPN 6 11 VCC 7 10 8 9 2.2uF 0.1uF 0.1uF PWMIN FS W U 10uF GND V M 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2012, Texas Instruments Incorporated DRV11873 SLWS237 – NOVEMBER 2012 www.ti.com ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 125°C (1) (2) TSSOP-16 (PWP) Tape and reel, 3000 PART NUMBER TOP-SIDE MARKING DRV11873PWP 11873 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/package. FUNCTIONAL BLOCK DIAGRAM FG GND PWM&Standby Lock detection Phase Current Sense COM U V W PCOM & FILT Ilimit COMP FS CS VREF VCC UVLO Bandgap & UVLO VCC PWM VREF V Predriver VCP GND U VCC Predriver Core Logic GND GND Thermal detection W Predriver GND FR VCC U V W RD AVS OSC VCC VCP VCP GND Charge Pump VCC GND V5 2 CPP CPN 5V LDO Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated DRV11873 www.ti.com SLWS237 – NOVEMBER 2012 PIN DESIGNATION PWP PACKAGE (TOP VIEW) FS PWMIN FG FR RD CS VCP COM CPP V5 CPN VCC W U GND V Table 1. PIN DESCRIPTIONS TERMINAL NAME NO. I/O (1) DESCRIPTION FS 1 I Motor parameter adjustment pin. Pull low for lower speed motor and pull high for high speed motor. FG 2 O Frequency generator output. The output have period equal to 6 electrical states (FG). RD 3 O In the lock condition, RD output high through a pull up resistor to VCC or 5 V. VCP 4 O Charge pump output CPP 5 O Charge pump conversion terminal CPN 6 O Charge pump conversion terminal W 7 O Phase W output GND 8 - Ground pin V 9 O Phase V output U 10 O Phase U output VCC 11 I Input voltage for motor and chip supply voltage V5 12 O 5-V regulator output COM 13 I Motor common terminal input CS 14 I Over current threshold set up pin. A resistor set up current limit is connected between this pin and ground. The voltage across the resistor will compare with the voltage converted from the bottom MOSFETs current. If MOSFETs current is high, the part will get into the over-current protection mode by turning off top PWM MOSFET and keeping the bottom MOSFET on. Ilimit(A) = 6600/RCS(Ω), Equation valid range: 500 mA < Ilimit < 2000 mA FR 15 I Set high for reverse rotation. Set low or floating for forward rotation. PWMIN 16 I PWM input pin. The PWM input signal will be converted to a fixed switching frequency on MOSFET driver. The PWM input signal resolution is less than 1%. (1) I = input, O = output, N/A = not available Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 3 DRV11873 SLWS237 – NOVEMBER 2012 www.ti.com ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) VALUE MIN Input voltage range Output voltage range Electrostatic discharge (ESD) VCC -0.3 20 CS -0.3 3.6 PWMIN, FS, FR -0.3 6 GND -0.3 0.3 COM -1 20 U, V, W -1 20 FG, RD -0.3 20 VCP -0.3 25 CPN -0.3 20 CPP -0.3 25 V5 -0.3 6 Human body model, HBM 4 Charge device model, CBM 1 Machine model, MM TJ UNIT MAX Operating junction temperature Tstg Storage temperature V V kV 200 V -40 125 °C -55 150 °C THERMAL INFORMATION DRV11873 THERMAL METRIC (1) PWP UNITS 16 PINS θJA Junction-to-ambient thermal resistance (2) 39.4 θJCtop Junction-to-case (top) thermal resistance (3) 30.3 (4) θJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter (5) ψJB Junction-to-board characterization parameter (6) θJCbot (1) (2) (3) (4) (5) (6) (7) 4 Junction-to-case (bottom) thermal resistance 25.6 0.5 (7) °C/W 10.2 3.6 For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as specified in JESD51-7, in an environment described in JESD51-2a. The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDECstandard test exists, but a close description can be found in the ANSI SEMI standard G30-88. The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB temperature, as described in JESD51-8. The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7). The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88. Spacer Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated DRV11873 www.ti.com SLWS237 – NOVEMBER 2012 RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) Supply voltage MIN MAX VCC Voltage range 5 16 U, V, W -0.7 17 COM -0.1 17 FG, RD -0.1 16 PGND, GND -0.1 0.1 VCP -0.1 22 CPP -0.1 22 CPN -0.1 16 V5 -0.1 5.5 PWMIN, FR, FS -0.1 5.5 -40 125 Operating junction temperature, TJ UNIT V V V ELECTRICAL CHARACTERISTICS Supply Current over recommended operating free-air temperature (unless otherwise noted) PARAMETER IVCC Supply current TEST CONDITIONS MIN TA = 25°C; PWM = VCC; VCC = 12 V TYP MAX 2.7 5 TYP MAX 4.3 4.6 UNIT mA UVLO over recommended operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN UNIT VVUVLO-th_r UVLO threshold voltage Rise threshold, TA = 25°C VUVLO-th_f UVLO threshold voltage Fall threshold, TA = 25°C 3.9 4.1 V VUVLO-thhys UVLO threshold voltage hysteresis TA = 25°C 100 200 300 mV MIN TYP MAX UNIT 0.45 0.6 V Integrated MOSFET over recommended operating free-air temperature (unless otherwise noted) PARAMETER RDSON Series resistance(H+L) TEST CONDITIONS TA = 25°C; VCC = 12 V; VCP = 19 V; IOUT = 1.5 A Ω PWM over recommended operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS MIN VPWM-IH High-level input voltage VCC ≥ 4.5 V VPWM-IL Low-level input voltage VCC ≥ 4.5 V fPWM PWM input frequency 15 IPWM-SOURCE PWM source current 35 MIN TYP MAX 2.7 UNIT V 0.8 V 100 kHz 50 65 µA TYP MAX UNIT FG over recommended operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS IFG-SINK FG pin sink current VFG = 0.3 V IFG-short FG pin short current limit VFG = 12 V Copyright © 2012, Texas Instruments Incorporated 5 mA 20 25 Submit Documentation Feedback mA 5 DRV11873 SLWS237 – NOVEMBER 2012 www.ti.com RD over recommended operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS IRD-SINK RD pin sink current VRD = 0.3 V IRD-short RD pin short current limit VRD = 12 V MIN TYP MAX 20 25 TYP MAX 5 UNIT mA mA FR and FS over recommended operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS VFR-IH High-level input voltage VCC ≥ 4.5 V VFR-IL Low-level input voltage VCC ≥ 4.5 V VFS-th FS set threshold voltage VCC ≥ 4.5 V MIN 2.3 UNIT V 2.3 0.8 V 0.8 V V5 over recommended operating free-air temperature (unless otherwise noted) PARAMETER TEST CONDITIONS V5 5V LDO voltage VCC = 12 V IV5 5V LDO load current VCC = 12 V MIN TYP MAX UNIT 4.75 5 5.25 V 20 mA Lock Protection over recommended operating free-air temperature (unless otherwise noted) PARAMETER TLOCK-ON Lock detect time TLOCK-OFF Lock release time MIN TYP MAX FS = 0 TEST CONDITIONS 0.875 1.25 1.625 FS = 1 0.437 0.625 0.812 FS = 0 4.375 6.25 8.125 FS = 1 2.187 3.125 4.06 UNIT s s Current Limit over recommended operating free-air temperature (unless otherwise noted) PARAMETER Current limit TEST CONDITIONS MIN TYP MAX CS pin to GND resistor = 3.3 kΩ 1.7 2 2.3 UNIT A Thermal Shutdown over recommended operating free-air temperature (unless otherwise noted) PARAMETER TSDN 6 Shut down temperature threshold Submit Documentation Feedback TEST CONDITIONS Shut down temperature Hysteresis MIN TYP 160 10 MAX UNIT °C Copyright © 2012, Texas Instruments Incorporated DRV11873 www.ti.com SLWS237 – NOVEMBER 2012 DETAILED DEVICE DESCRIPTION DRV11873 is a three phase, sensorless motor driver with integrated power MOSFETs with drive current capability up to 1.5-A continuous and 2-A peak. It is specifically designed for low noise and low external component count fan motor drive applications. DRV11873 has built in over current protection with no external current sense resistor needed. The synchronous rectification mode of operation achieves increased efficiency for motor driver applications. DRV11873 outputs FG and RD to indicate motor status with open drain output. A 150° sensorless BEMF control scheme was implemented for a three phase motor. DRV11873 can fit a wide range of fan motors with the FS pin selection function. Voltage surge protection scheme prevents the input VCC capacitor from over charge during motor braking mode. DRV11873 has multiple built in protection blocks including UVLO, over current protection, lock protection and thermal shut down protection. SPEED CONTROL DRV11873 can control motor speed through either the PWMIN or VCC pin. Motor speed will increase with higher PWMIN duty cycle or VCC input voltage. The curve of motor speed (RPM) vs PWMIN duty cycle or VCC input voltage is close to linear in most cases. However, motor characteristics will affect the linearity of this speed curve. DRV11873 can operate at low VCC input voltage down to 4.1 V. The PWMIN pin is pulled up to V5 internally and the frequency range can vary from 15 kHz to 100 kHz. The motor driver MOSFETs will operate at constant switching frequency 125 kHz when the FS pin is pulled high and 62.5 kHz when the FS pin is pulled low. With this high switching frequency, DRV11873 can eliminate audible noise and reduce the ripple of VCC input voltage and current. FREQUENCY GENERATOR FG output is a 50% duty square wave output in the normal operation condition. Its frequency represents the motor speed and phase information. FG pin is an open drian output. An external pull up resistor is needed to connect external system. During the start up FG output will stay at high impedance until the motor speed reaches certain level and BEMF is detected. If FG is not used, this pin can be left for floating. FG pin can be tie to either 5 V or VCC through a pull up resistor. Normally the pull up resistor value can be 100 kΩ or higher. During lock protection condition, FG output will keep high until the lockout protection is dismissed and restart completed. A current limit function has been built in for FG pin. It will prevent FG open drain MOSFET get damaged in case VCC or 5 V directly connected to FG pin by accident. To calculate RPM based on FG frequency, please refer to below equation. (FG ? 60) RPM = pole pairs (1) Where FG is in hertz (Hz). FS SETTING DRV11873 can fit a wide range of fan motors by setting the FS pin. For high speed fan motors with low motor winding resistance and low inductance, the FS pin should be pulled high. For low speed fan motors with high motor winding resistance and high inductance, the FS pin should be pulled low. Through FS pin selection, DRV11873 can be used for wide applications from low speed refrigerator cooling fans to high speed server cooling fans. FS status can only be set during device power up. LOCK PROTECTION AND RD OUTPUT If the motor is blocked or stopped by the external force, the lock protection will be triggered after detection time. During lock detection time, the circuit monitors FG signal. If the FG output is high during lock detection time, the lock protection will stop driving the motor. After lock release time, DRV11873 will resume driving the motor. If the lock condition is still there, DRV11873 will proceed with next lock protection cycle until the lock condition is removed. With this lock protection, the motor and device will not get over heated or be damaged. A different FS setting will determine a different lock detection and lock release time. The RD pin is an open drain output which can be tied to either V5 or VCC through a pull-up resistor. Normally the pull-up resistor value can be 100 kΩ or higher. During the lock protection condition, RD output will keep high until the lock protection is dismissed and restart completed. A current limit function has been built in for the RD pin which prevents the open drain MOSFET from damage in case VCC or V5 directly connects to the RD pin. Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 7 DRV11873 SLWS237 – NOVEMBER 2012 www.ti.com REVERSE SPIN CONTROL FR DRV11873 has an FR pin to set the motor for a forward spin or reverse spin. During DRV11873 power up, FR status will be set. During normal operation, the spin direction of the motor will not be changed when the FR status is changed. The FR status can be reset after the next PWM rising edge if PWMIN was pulled low for 300 µs (when the FS status is high) or 600 µs (when the FS status is low). 5-V LDO DRV11873 has a built-in 5-V LDO which can output a 20-mA load current. It can provide 5-V bias voltage for external use. A 2.2-µF ceramic capacitor is recommend to connect closely on the PCB layout between V-5 pin and ground. OVER CURRENT PROTECTION DRV11873 can adjust over current point through the external resistor connected to CS pin and ground. Without using external current sense resistor, DRV11873 senses the current through power MOSFET. Therefore there is no power loss during the current sensing. This current sense architecture improves the system efficiency. Short CS pin to ground will disable over current protection. During over current protection, DRV11873 will only limit the current to the motor and it will not shut down the operation. The over current threshold can be set by the value of current sensing resistor through Equation 2. 6600 I (A) = RCS (W) (2) UVLO DRV11873 has a built-in UVLO function block. The hysteresis of UVLO threshold is 200 mV. The device will be locked out when VCC reaches 4.1 V and woke up at 4.3 V. THERMAL SHUTDOWN DRV11873 has a built in thermal shunt down function, which will shut down the device when the junction temperature is over 160°C and will resume operating when the junction temperature drops back to 150°C. 8 Submit Documentation Feedback Copyright © 2012, Texas Instruments Incorporated DRV11873 www.ti.com SLWS237 – NOVEMBER 2012 APPLICATION INFORMATION DRV11873 only requires 5 external components. A 10-µF or higher ceramic capacitor connected to VCC and ground is needed for decoupling purpose. During layout, the strategy of ground copper pour is very important to enhance the thermal performance. For two or more layers, eight thermal vias are needed. Refer to Figure 1 for an example of PCB layout. For high speed motors (FS = 1), which need higher start up current, three Schottkey diodes are needed between phases U, V, W and ground. Each diode anode terminal needs to be connected to ground and cathode terminal needs to be connected to either U or V or W. Figure 1. PCB Layout Copyright © 2012, Texas Instruments Incorporated Submit Documentation Feedback 9 PACKAGE OPTION ADDENDUM www.ti.com 15-Feb-2013 PACKAGING INFORMATION Orderable Device Status (1) DRV11873PWPR ACTIVE Package Type Package Pins Package Qty Drawing HTSSOP PWP 16 2000 Eco Plan Lead/Ball Finish (2) Green (RoHS & no Sb/Br) MSL Peak Temp Op Temp (°C) Top-Side Markings (3) CU NIPDAU Level-2-260C-1 YEAR (4) -40 to 85 11873 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) Only one of markings shown within the brackets will appear on the physical device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. 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Addendum-Page 1 Samples PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2012 TAPE AND REEL INFORMATION *All dimensions are nominal Device DRV11873PWPR Package Package Pins Type Drawing SPQ HTSSOP 2000 PWP 16 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 330.0 12.4 Pack Materials-Page 1 6.9 B0 (mm) K0 (mm) P1 (mm) 5.6 1.6 8.0 W Pin1 (mm) Quadrant 12.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 20-Nov-2012 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) DRV11873PWPR HTSSOP PWP 16 2000 367.0 367.0 35.0 Pack Materials-Page 2 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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