SPF7302 Full Bridge DC Motor Driver Features and Benefits Description ▪ Supply voltage, VBB , 36 V maximum ▪ Maximum DC current 3 A continuous, 6 A pulsed (1 kHz, duty cycle < 1%, pulse width < 10 μs) ▪ RDS(on) = 300 mΩ maximum, at TJ = 125ºC ▪ Operation modes: forward, reverse, brake (high- or lowside freewheeling current circulation) ▪ Output disable pin (DI pin) ▪ Protections: ▫ Overvoltage protection (OVP), 36 V minimum ▫ Overcurrent protection (OCP), 3 A typical ▫ Overcurrent limitation (OCL), 6 A typical ▫ Externally adjustable delay timer to halt OCL ▫ Thermal shutdown protection (TSD), 151°C minimum ▫ Undervoltage lockout on VBB (UVLO), 4.2 V minimum ▫ Open load detection at startup ▪ Diagnosis output linked to OVP, OCP, TSD, UVLO, and open load detection, at startup and in operation The SPF7302 is a fully protected, single chip full-bridge driver IC for DC brush motor applications. The various protection circuits integrated are: overvoltage protection (OVP); overcurrent protection (OCP) with latch, which is adapted to the DMOSFETs in each full bridge; undervoltage lockout (UVLO); open load detection; and overcurrent limitation. The package is a thermally enhanced 16-pin HSOP power package with an exposed thermal pad on the bottom side of the package. Package: 16 pin HSOP with exposed thermal pad and tabs Not to scale Functional Block Diagram CP VBB VBB VBB VBB VBB PreRegulator Diag High-Side OCL VREF Diag High-Side Gate Driver with OVP OVP UVLO TSD IN1 IN2 DI Diag High-Side OCP High-Side Gate Driver with OVP HS1 HS2 IN1 IN2 DI OUT1 OUT2 LS1 DIAG Diagnostics DLY 28211 Diag Open Circuit Detection Diag LS2 Low-Side Gate Driver Diag Low-Side OCL LGND Diag Open Circuit Detection Low-Side Gate Driver Diag PGND Low-Side OCP PGND SPF7302 Full Bridge DC Motor Driver Selection Guide Part Number Package Packing Thermally enhanced surface mount (HSOP), 16-pin SPF7302 Minimum quantity 1400 pieces Absolute Maximum Ratings at TA = 25°C Characteristic Supply Voltage IN1, IN2, DI, and DLY Pin Input Voltage Output Current Symbol Rating Unit VBB Vx –0.3 to 36 –0.3 to 6 V V IO ±3 A IOpeak DIAG Pin Output Voltage VDIAG DIAG Pin Input Current IDIAG CP Pin Voltage VCP PD1 Power Dissipation PD2 Notes Continuous: 1 kHz, duty cycle <1%; pulse: < 10 μs DIAG pin sink current With infinite heatsink Mounted on glass epoxy PCB, 50 mm × 74 mm × 1.6 mm; 0.5 oz copper (18 μm thick) exposed copper area ±6 A –0.3 to 6 V –2 mA –0.3 to 36 V 39 4 W Junction Temperature TJ –40 to 150 ºC Operating Ambient Temperature Storage Temperature TA Tstg –40 to 105 40 to 150 ºC ºC Thermal Resistance, Junction to Case RθJC 3.2 °C/W Thermal Resistance, Junction to Ambient RθJA 31 °C/W Mounted on glass epoxy PCB, 50 mm × 74 mm × 1.6 mm; 0.5 oz copper (18 μm thick) exposed copper area Terminal List Table Pin-out Diagram LGND 1 16 LGND IN2 2 15 DIAG IN1 3 14 DLY DI 4 13 CP VBB 5 VBB 6 12 VBB 11 VBB OUT2 7 10 OUT1 PGND 8 9 PGND Number Name 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 LGND IN2 IN1 DI VBB VBB OUT2 PGND PGND OUT1 VBB VBB CP DLY DIAG LGND Description Logic GND Input pin 2 Input pin 1 Disable pin Supply input voltage Supply input voltage Output 2 Power GND Power GND Output 1 Supply input voltage Supply input voltage Charge pump capacitor pin Overcurrent limitation delay setting input pin Diagnostics output pin Logic GND All performance characteristics given are typical values for circuit or system baseline design only and are at the nominal operating voltage and an ambient temperature, TA, of 25°C, unless otherwise stated. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 SPF7302 Full Bridge DC Motor Driver ELECTRICAL CHARACTERISTICS1 valid at TJ = –30°C to 125°C, VBB = 14 V, VDI = 5 V, CCP = 47 nF, RDIAG = 5.1 kΩ, unless otherwise specified Characteristic Supply Voltage OUTx Pin Leakage Current DMOSFET On Resistance DMOSFET Body Diode Forward Voltage Quiescent Current Overcurrent Limit (OCL) Overcurrent Protection (OCP) IN1, IN2, DI, and DLY Pin Input Voltage IN1, IN2, DI, and DLY Pin Input Current DIAG Pin Output Voltage DIAG Pin Output Current IN1 and IN2 Pin Input Propagation Time Symbol Test Conditions Min. Typ. Max. Unit VBB 6 – 18 V IleakHS –1 – – mA IleakLS – – 1 mA RDS(ON_1H IOUT = 1 A – – 300 mΩ RDS(ON)_2H IOUT = 3 A – – 300 mΩ RDS(ON)_1L IOUT = 1 A – – 300 mΩ RDS(ON)_2L IOUT = 3 A – – 300 mΩ – 1.0 2.0 V VF_H1 IOUT1 = 1 A VF_H2 IOUT2 = 1 A – 1.0 2.0 V VF_L1 IOUT1 = –1 A – 1.0 2.0 V VF_L2 IOUT2 = –1 A – 1.0 2.0 V IBB – 7 – mA IOCL_H1 2.0 3.0 4.5 A 2.0 3.0 4.5 A 2.0 3.0 4.5 A IOCL_H2 IOCL_L1 TJ = –40°C to 150°C, IOCL < IOCP ; guaranteed by design IOCL_L2 2.0 3.0 4.5 A IOCP_H1 4.5 6.0 8.0 A 4.5 6.0 8.0 A IOCP_H2 IOCP_L1 TJ = –40°C to 150°C, IOCL < IOCP ; guaranteed by design 4.5 6.0 8.0 A IOCP_L2 4.5 6.0 8.0 A Vx_H 3.0 – 5.3 V Vx_L Ix_H VDLY = 5 V –0.3 – 1.5 V – 100 200 μA Ix_L VDLY = 0 V –1 – 1 μA VDIAG_H VCC = 5 V 4.0 – – V VDIAG_L Isink = 2 mA – – 0.4 V IDIAG_H VCC = 5 V, DIAG pin source current –250 – – μA IDIAG_L VCC = 5 V, DIAG pin sink current, VDIAG = 2 V – – 3 mA tINx_ON Delay from VINx = 2 V→VOUTx × 0.2 – 7 15 μs tINx_OFF Delay from VINx = 1.5 V→VOUTx × 0.8 – 7 15 μs Output Rise Time trx Delay from VOUTx = 20%→80% points, at IOUTx = 1 A – 0.5 2 μs Output Fall Time tfx Delay from VOUTx = 20%→80% points, at IOUTx = 1 A – 0.5 2 μs Continued on the next page… Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 3 SPF7302 Full Bridge DC Motor Driver ELECTRICAL CHARACTERISTICS1 (continued) valid at TJ = –30°C to 125°C, VBB = 14 V, VDI = 5 V, CCP = 47 nF, RDIAG = 5.1 kΩ, unless otherwise specified Characteristic Symbol Test Conditions Overcurrent limitation (OCL) activating voltage Min. Typ. Max. Unit DLY Pin Threshold Voltage VDLY(th) 1.4 1.6 1.8 V DLY Pin Sourcing Current2 IDLY 15 30 60 μA UVLO Releasing Voltage VUVLO_OFF – – 5.2 V UVLO Activating Voltage VUVLO_ON 4.2 – – V UVLO Hysteresis VUVLOhys – 0.2 – V OVP Protection Activating Voltage VOVP_ON 36 – 42 V OVP Protection Releasing Voltage VOVP_OFF 32 – 38 V OVP Hysteresis VOVPhys – 5 – V Thermal Shutdown Activating Temperature3 TTSD_ON Starts at 165°C typical; guaranteed by design 151 165 – ºC Thermal Shutdown Releasing Temperature3 TTSD_OFF Guaranteed by design 136 150 – ºC TTSDhys Guaranteed by design – 15 – ºC Thermal Shutdown Hysteresis3 1The parameters at TJ = –40ºC to 150ºC are specified by design. The actual production tests are done at 25ºC and 125ºC. 2The individual overcurrent limitation of each DMOSFET is masked during the delay period. Therefore, ensure proper thermal design for dissipating transient temperature increase caused by current during this period. 3TSD (thermal shutdown protection starts at 165ºC typical, and it is specified by design. Motor Control Truth Table1 Reference Number Status 1 Forward rotation2 2 Reverse rotation2 3 Low-side freewheeling 4 High-side freewheeling 5 Output disabled 6 Overcurrent limitation (OCL) active (HS1) 7 Overcurrent limitation (OCL) active (HS2) 8 Overcurrent limitation (OCL) active (LS1) 9 Overcurrent limitation (OCL) active (LS2) 10 Overcurrent protection with latch (OCP) active (HS1) 11 Overcurrent protection with latch (OCP) active (HS2) 12 Overcurrent protection with latch (OCP) active (LS1) 13 Overcurrent protection with latch (OCP) active (LS2) 14 Undervoltage lockout (UVLO) protection active 15 Overvoltage protection (OVP) active 16 Open load detected at startup 17 Open load detected in operation 18 Thermal shutdown protection (TSD) active 1X is "don't care," Z is high impedance. 2"Forward" and "reverse" only indicate opposite relative direction. DI Input IN1 IN2 H H H H L H H H H H H H H X X L H X H L L H X H X L X H X L X X X X X X L H L H X X H X L X H X L X X X X X Output OUT1 OUT2 DIAG H L L H Z H X L X Z Z Z Z Z X X X Z L H L H Z X H X L Z Z Z Z Z X X X Z Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com H H H H H H H H H L L L L L L L L L DMOSFET status HS1 LS1 HS2 LS2 ON OFF OFF ON OFF ON X OFF X OFF OFF OFF OFF OFF X OFF X OFF OFF ON ON OFF OFF OFF X ON X OFF OFF OFF OFF OFF X OFF X OFF OFF ON OFF ON OFF X ON X OFF OFF OFF OFF OFF OFF X OFF X OFF ON OFF ON OFF OFF X OFF X ON OFF OFF OFF OFF OFF X OFF X OFF 4 SPF7302 Full Bridge DC Motor Driver Switching Operation Timing Charts INx VINx_H VINx_L VOUTx×0.8 OUTx VOUTx×0.2 tINx_ON tINx_OFF Figure 1. Output Delay Time OUTx VOUTx×0.8 VOUTx×0.2 tfx trx Figure 2. Output Switching Time Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 5 SPF7302 Full Bridge DC Motor Driver Characteristic Performance 1.0 1.0 0.8 0.8 150°C 0.6 Low-side DMOSFET RDS(on) 25°C 0.4 OUTx to PGND (V) High-side DMOSFET RDS(on) VBB to OUTx (V) TA = 25°C unless otherwise specified 0.2 150°C 0.6 25°C 0.4 0.2 TA= –40°C TA= –40°C 0 0 0 1 2 3 0 1 2 1.0 1.0 0.8 0.8 0.6 Low-side DMOSFET RDS(on) 5.5 V 6V 0.4 0.6 5.5 V 6V 0.4 VCC= 14 V VCC= 14 V 0.2 0 3 IOUT (A) OUTx to PGND (V) High-side DMOSFET RDS(on) VBB to OUTx (V) IOUT (A) 0.2 0 1 2 0 3 0 1 IOUT (A) 2 3 IOUT (A) 12 50 150°C 40 25°C TA= –40°C IQ (mA) Quiescent Current versus Supply Voltage CP Pin Voltage versus Supply Voltage 4 VCP (V) 8 30 20 10 0 0 10 20 VBB (V) 30 40 0 0 Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 20 VBB (V) 30 40 6 SPF7302 16 16 12 12 INx Pin Threshold Characteristics 8 VOUT1 (V) VOUT1 (V) DI Pin Threshold Characteristics Full Bridge DC Motor Driver 4 0 8 4 0 1 2 3 4 0 5 0 1 2 VDI (V) 200 INx Pin Current Characteristics 100 TA= –40°C 0 2 4 6 8 IIN(SINK) (μA) IDI(SINK) (μA) 5 150°C 25°C 0 4 200 150°C DI Pin Current Characteristics 3 VIN (V) 25°C 100 TA= –40°C 0 10 0 2 4 VDI (V) 6 8 10 VIN (V) 0.6 6 0.5 150°C 4 25°C 0.3 0.2 UVLO Voltage versus Supply Voltage TA= –40°C VUVLO (V) DIAG Output versus DI SInk Current VDIAG (V) 0.4 2 0.1 0 0 1 2 3 0 0 IDI(SINK) (mA) Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 2 4 VBB (V) 6 7 SPF7302 Full Bridge DC Motor Driver 6 DIAG Output Voltage with TSD Activated (IC stops operation) 2 0 25 30 35 40 4 VDIAG (V) 4 VDIAG (V) DIAG Output Voltage with OVP Activated (IC continues operation) 6 2 0 100 45 120 VBB (V) 140 160 180 TJ (C°) VINX = 2 V/div VINX = 2 V/div Input to Output On Propagation Delay, tINx_ON Input to Output Off Propagation Delay, tINx_OFF VOUTX = 2 V/div 7.8 μs VOUTX = 2 V/div t = 2 μs/div 7.9 μs t = 2 μs/div VINX = 2 V/div VOUTX = 2 V/div VINX = 2 V/div Output Fall Time, tFX Output Rise Time, tRX 160 ns VOUTX = 2 V/div t = 50 ns/div 140 ns Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com t = 100 ns/div 8 SPF7302 Full Bridge DC Motor Driver VINX = 5 V/div DLY Voltage versus INx Pin Voltage 1.6 V VDLY = 0.5 V/div t = 10 μs/div 4.0 A 3.4 A IOUTX = 1 A/div IOUTX = 1 A/div High-side DMOSFET OCL Operation Example Low-side DMOSFET OCL Operation Example VOUTX = 10 V/div VOUTX = 10 V/div t = 100 μs/div t = 100 μs/div 7.1 A 6.9 A IOUTX = 2 A/div IOUTX = 2 A/div High-side DMOSFET OCP Operation Example Low-side DMOSFET OCP Operation Example VOUTX = 10 V/div VOUTX = 10 V/div t = 100 μs/div t = 100 μs/div Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 9 SPF7302 Full Bridge DC Motor Driver Protection Function Operation Current Limitation and Overcurrent Protection The overcurrent limit is adapted to each DMOSFET, and is activated when the drain current reaches 3 A typical. After that, it is followed by a 3 μs typical off-time, and then it restarts automatically. Overcurrent protection is activated when the drain current reaches 6 A typical within 3 μs, as shown in figure 3. It shuts down the IC in a latch mode. Setting the DI pin to logic low level resets the internal logic circuit and releases the latch. DIAG Pin and Open Load Detection Behavior Open load detection does not operate until after the output voltage of OUT1 (VOUT1) reaches about VBB – 2 V. If an open load is detected, the DIAG signal goes high. The process of open load detection is shown in figure 4: A. During this period, UVLO is activated and DIAG stays low. VUVLO_OFF VBB VUVLO_ON ≈ VBB – 2 V VOUT1 VDI_H(threshold) DI DIAG A B C Figure 4. Open Load Detection B. If a filtering capacitor is used at the outputs, it causes a delay of open load detection. (Refer to figure 5 for the relationship of the delay versus the filtering capacitor value.) C. The open load detection period starts functioning. Raising DI input above VDI_H(threshold), that is, by activating the IC, clears the DIAG signal. Therefore, the open load condition must be checked before the time of that event. Open Load Detection Delay Time versus Output Filtering Capacitance VBB = 14 V 1000 100 3A (typ.) Current Limit 3 μs (typ.) Delay (ms) 6 A (typ.) Overcurrent Maximum Typical Minimum 10 1 0.1 0.01 0.001 0.01 0.1 1 Capacitance of Filter Capacitor on VOUT1 (μF) Figure 3. Behavior of Current Limitation and Overcurrent Protection function Figure 5. Delay to Open Load protection activation versus value of external capacitor on the output pins Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 10 SPF7302 Full Bridge DC Motor Driver Open load detection during normal operation of the IC is done by checking the negative potential of the output. Referring to figure 6, during normal operation, recirculation current causes the output to be below GND. The IC checks the output voltage during 2.5 μs typical, just after the falling edge of the corresponding IN signal, and if it does not detect the negative potential, DIAG is asserted after the 2.5 μs detection period. During the 2.5 μs period, the DIAG pin is set to high because the internal circuit is reset during that period (see the arrows marked A in figure 6). Open load detection operates differently during startup of the IC. The overcurrent limitation deactivated period occurs immediately after DI is asserted. Therefore, in order to repeat OCL deactivation, recycle DI. During this period, overcurrent protection (OCP) is still active. (With regard to OCL delay, see also note 2 to the Electrical Characteristics table.) DI VDI_H(threshold) INx OUTx Normal Operation DIAG DIAG (high) OUTx 2.5 μs At Open Load DIAG A A A Figure 6. Open load detection in normal operation DI OCL deactivated VDLY(th) DLY INx VINx(threshold) IOUTX OCP activated 3 A (typ.) current limit Figure 7. DLY pin effect at startup Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 11 SPF7302 Full Bridge DC Motor Driver Application Information VCC RDIAG DIAG VBB DLY CP CCP SPF7302 CIN IN1 IN2 DI PGND CDLY M OUT1 OUT2 LGND Figure 8. Typical application circuit. Recommended components are: CCP 48 nF CDLY 0.1 μF RDIAG 3.3 kΩ 0.87 0.40 Pin 16 12.5 4.6 2.2 Pin 1 1.75 Figure 9. Recommended Solder Pad Layout, dimensions in mm Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 12 SPF7302 Full Bridge DC Motor Driver Thermal Design 45 60 03 With infinite heatsink 25 20 15 0 20 40 40 30 20 Mounted on 1000 mm2 PCB 10 Exposed copper area thickness 18 μm 5 0 –40 –20 Exposed copper area thickness 18 μm 50 35 RQJA (°C/W) Power Dissipation, PD (W) 40 10 60 80 100 120 0 10 140 160 100 10000 1000 100000 Copper Area (mm2) Ambient Temperature, TA (°C) Figure 10. Power Dissipation Derating Curve Figure 11. Thermal Resistance versus PCB Copper Area 125 ∆TJ (°C) 100 ∆TJA on PCB with exposed copper area = 1000 mm2 75 50 25 ∆TJC 0 0 1 2 3 4 5 PD (W) Figure 12. Test PCB Land Pattern Figure 13. Thermal Performance Approximate power dissipation, PD , in normal operation is calculated by equation 1, and the junction temperature, TJ, is estimated by equation 2 or 3. Figure 13 shows example data of ∆TJ versus PD . Note: a final thermal evaluation should be done under actual application conditions, taking into account actual PCB and load conditions. PD ≈ VBB IBB1 (VsatH VsatL) IOM DON (VsatL(H) VF) IOM DOFF where: VBB is the supply voltage (battery voltage), IBB1 is the circuit current during operation, VsatH is the high-side saturation voltage, VsatL is the low-side saturation voltage, (1) VF is the freewheeling diode forward voltage, IOM is the motor current, DON is the IN1 and IN2 duty cycle (proportion on) , and DOFF is the IN1 and IN2 proportion off (DON + DOFF = 100%). To calculate TJ: TJ = RθJA × PD + TA (2) TJ = TP + RθJC (3.2°C/W) × PD (3) or where: RθJA can be obtained from figure 11, and TP is the temperature at the exposed thermal pad of the device. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 13 SPF7302 Full Bridge DC Motor Driver Package Outline Drawing, 16 Pin HSOP 12.2 ±0.2 10.5 ±0.2 16 0.25 +0.15 –0.05 XXXXXXXX 7.50 ±0.2 2 ±0.2 10.5 ±0.3 Tab from exposed thermal pad XXXXXXXX Branding Area 1 2 View A 1.35 ±0.2 0.1 0 2.5 ±0.2 0.4 +0.15 –0.05 1.27±0.25 Exposed thermal pad (3.05) (4.7) 1 ±0.3 A 8° 0° ( 0.8) (8.89) Package: HSOP-16 Dimensions in millimeters Enlargement View A Branding codes (exact appearance at manufacturer discretion): 1st line, type: SPF7302 2nd line, lot: YMDD Where: Y is the last digit of the year of manufacture M is the month (1 to 9, O, N, D) DD is the date Leadframe plating Pb-free. Device composition complies with the RoHS directive. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 14 SPF7302 Full Bridge DC Motor Driver WARNING — These devices are designed to be operated at lethal voltages and energy levels. Circuit designs that embody these components must conform with applicable safety requirements. Precautions must be taken to prevent accidental contact with power-line potentials. Do not connect grounded test equipment. The use of an isolation transformer is recommended during circuit development and breadboarding. Because reliability can be affected adversely by improper storage environments and handling methods, please observe the following cautions. Cautions for Storage • Ensure that storage conditions comply with the standard temperature (5°C to 35°C) and the standard relative humidity (around 40 to 75%); avoid storage locations that experience extreme changes in temperature or humidity. • Avoid locations where dust or harmful gases are present and avoid direct sunlight. • Reinspect for rust on leads and solderability of products that have been stored for a long time. Cautions for Testing and Handling When tests are carried out during inspection testing and other standard test periods, protect the products from power surges from the testing device, shorts between adjacent products, and shorts to the heatsink. Soldering • When soldering the products, please be sure to minimize the working time, and any soldering iron should be kept at a distance from the body of the product. • The number of reflow procedures is restricted to two only. Device reliability and appearance are guaranteed within the temperature profile below, after storage conditions of up to 168 hours at TA = 85ºC and RH = 85%. Electrostatic Discharge • When handling the products, operator must be grounded. Grounded wrist straps worn should have at least 1 MΩ of resistance to ground to prevent shock hazard. • Workbenches where the products are handled should be grounded and be provided with conductive table and floor mats. • When using measuring equipment such as a curve tracer, the equipment should be grounded. • When soldering the products, the head of soldering irons or the solder bath must be grounded in other to prevent leak voltages generated by them from being applied to the products. • The products should always be stored and transported in our shipping containers or conductive containers, or be wrapped in aluminum foil. Temperature (ºC) 30s 245 230 200 60s 150 90 to 120 s 4 ºC/s Duration (s) Solder Reflow Profile Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 15 SPF7302 Full Bridge DC Motor Driver The products described herein are manufactured in Japan by Sanken Electric Co., Ltd. for sale by Allegro MicroSystems, Inc. Sanken and Allegro reserve the right to make, from time to time, such departures from the detail specifications as may be required to permit improvements in the performance, reliability, or manufacturability of its products. Therefore, the user is cautioned to verify that the information in this publication is current before placing any order. When using the products described herein, the applicability and suitability of such products for the intended purpose shall be reviewed at the users responsibility. Although Sanken undertakes to enhance the quality and reliability of its products, the occurrence of failure and defect of semiconductor products at a certain rate is inevitable. Users of Sanken products are requested to take, at their own risk, preventative measures including safety design of the equipment or systems against any possible injury, death, fires or damages to society due to device failure or malfunction. Sanken products listed in this publication are designed and intended for use as components in general-purpose electronic equipment or apparatus (home appliances, office equipment, telecommunication equipment, measuring equipment, etc.). Their use in any application requiring radiation hardness assurance (e.g., aerospace equipment) is not supported. When considering the use of Sanken products in applications where higher reliability is required (transportation equipment and its control systems or equipment, fire- or burglar-alarm systems, various safety devices, etc.), contact a company sales representative to discuss and obtain written confirmation of your specifications. The use of Sanken products without the written consent of Sanken in applications where extremely high reliability is required (aerospace equipment, nuclear power-control stations, life-support systems, etc.) is strictly prohibited. The information included herein is believed to be accurate and reliable. Application and operation examples described in this publication are given for reference only and Sanken and Allegro assume no responsibility for any infringement of industrial property rights, intellectual property rights, or any other rights of Sanken or Allegro or any third party that may result from its use. Anti radioactive ray design is not considered for the products listed herein. Copyright © 2006-2009 Allegro MicroSystems, Inc. Allegro MicroSystems, Inc. 115 Northeast Cutoff Worcester, Massachusetts 01615-0036 U.S.A. 1.508.853.5000; www.allegromicro.com 16