TI V62/11619-01XE

TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
–36V, –200mA, ULTRALOW-NOISE, NEGATIVE LINEAR REGULATOR
FEATURES
APPLICATIONS
•
•
•
1
23
•
•
•
•
•
•
•
•
Input Voltage Range: –3V to –36V
Noise:
– 14μVRMS (20Hz to 20kHz)
– 15.1μVRMS (10Hz to 100kHz)
Power-Supply Ripple Rejection:
– 72dB (120Hz)
– ≥ 55dB (10Hz to 700kHz)
Adjustable Output: –1.18V to –35V
Maximum Output Current: 200mA
Dropout Voltage: 216mV at 100mA
Stable with Ceramic Capacitors ≥ 2.2μF
CMOS Logic-Level-Compatible Enable Pin
Built-In, Fixed, Current-Limit and Thermal
Shutdown Protection
Available in High Thermal Performance
MSOP-8 PowerPAD™ Package
•
•
•
•
•
•
•
Supply Rails for Op Amps, DACs, ADCs, and
Other High-Precision Analog Circuitry
Audio
Post DC/DC Converter Regulation and Ripple
Filtering
Test and Measurement
RX, TX, and PA Circuitry
Industrial Instrumention
Base Stations and Telecom Infrastrucure
–12V and –24V Industrial Buses
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
DGN PACKAGE
3mm ´ 5mm MSOP-8 PowerPAD
(TOP VIEW)
OUT
FB
NC
GND
1
2
3
4
8
7
6
5
IN
DNC
NR/SS
EN
DESCRIPTION
The TPS7A3001 is a negative, high-voltage (–36V), ultralow-noise (15.1μVRMS, 72dB PSRR) linear regulator
capable of sourcing a maximum load of 200mA.
These linear regulators include a CMOS logic-level-compatible enable pin and capacitor-programmable soft-start
function that allows for customized power-management schemes. Other features available include built-in current
limit and thermal shutdown protection to safeguard the device and system during fault conditions.
The TPS7A3001 is designed using bipolar technology, and is ideal for high-accuracy, high-precision
instrumentation applications where clean voltage rails are critical to maximize system performance. This design
makes it an excellent choice to power operational amplifiers, analog-to-digital converters (ADCs),
digital-to-analog converters (DACs), and other high-performance analog circuitry.
1
2
3
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
In addition, the TPS7A3001 of linear regulators is suitable for post dc/dc converter regulation. By filtering out the
output voltage ripple inherent to dc/dc switching conversion, maximum system performance is provided in
sensitive instrumentation, test and measurement, audio, and RF applications.
For applications where positive and negative high-performance rails are required, consider TI’s TPS7A49xx
family of positive high-voltage, ultralow-noise linear regulators.
Figure 1. Typical Application
+18V
IN
OUT
+15V
TPS7A49
-18V
EN
GND
IN
OUT
-15V
TPS7A30
EN
GND
EVM
Post DC/DC Converter Regulation for High-Performace Analog Circuitry
2
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
TJ
PACKAGE
ORDERABLE PART
NUMBER
TOP-SIDE
MARKING
VID NUMBER
–55°C to 125°C
DGN
TPS7A3001MDGNTEP
PXCM
V62/11619-01XE
(1)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1)
Over operating free-air temperature range (unless otherwise noted).
VALUE
MIN
MAX
UNIT
IN pin to GND pin
–36
+0.3
V
OUT pin to GND pin
–33
+0.3
V
OUT pin to IN pin
–0.3
+36
V
–2
+0.3
V
FB pin to IN pin
–0.3
+36
V
EN pin to IN pin
–0.3
+36
V
EN pin to GND pin
–36
+36
V
NR/SS pin to IN pin
–0.3
+36
V
–2
+0.3
V
FB pin to GND pin
Voltage
NR/SS pin to GND pin
Current
Peak output
Temperature
Electrostatic discharge rating
(1)
Internally limited
Operating virtual junction, TJ
–55
+135
°C
Storage, Tstg
–65
+150
°C
1500
V
500
V
Human body model (HBM)
Charged device model (CDM)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to
absolute-maximum rated conditions for extended periods may affect device reliability.
THERMAL INFORMATION
TPS7A3001
THERMAL METRIC (1)
DGN
UNITS
8 PINS
θJA
Junction-to-ambient thermal resistance
69.3
θJC(top)
Junction-to-case(top) thermal resistance
40.3
θJB
Junction-to-board thermal resistance
39.0
ψJT
Junction-to-top characterization parameter
2.4
ψJB
Junction-to-board characterization parameter
38.7
θJC(bottom)
Junction-to-case(bottom) thermal resistance
17.8
(1)
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
3
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
ELECTRICAL CHARACTERISTICS (1)
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2µF, COUT = 2.2µF,
CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
–3.0
V
–1.184
–1.142
V
–36.0
UNIT
VIN
Input voltage range
VREF
Internal reference
VNR/SS = VREF
–1.22
Output voltage range (2)
|VIN| ≥ |VOUT(NOM)| + 1.0V
–35.0
VREF
V
Nominal accuracy
TJ = +25°C, |VIN| = |VOUT(NOM)| + 0.5V
–1.5
+1.5
%VOUT
Overall accuracy
|VOUT(NOM)| + 1.0V ≤ |VIN| ≤ 35V
1mA ≤ IOUT ≤ 200mA
–2.85
+2.85
%VOUT
DVOUT(DVIN)
VOUT(NOM)
Line regulation
TJ = +25°C, |VOUT(NOM)| + 1.0V ≤ |VIN| ≤ 35V
0.14
%VOUT
DVOUT(DIOUT)
VOUT(NOM)
Load regulation
TJ = +25°C, 1mA ≤ IOUT ≤ 200mA
0.04
%VOUT
VIN = 95% VOUT(NOM), IOUT = 100mA
216
VIN = 95% VOUT(NOM), IOUT = 200mA
325
600
mV
330
500
mA
55
100
μA
VOUT
|VDO|
Dropout voltage
ILIM
Current limit
IGND
Ground current
|ISHDN|
Shutdown supply current
I FB
Feedback current (3)
|IEN|
Enable current
VOUT = 90% VOUT(NOM)
220
IOUT = 0mA
IOUT = 100mA
950
VEN = +0.4V
1.0
VEN = –0.4V
mV
μA
3.0
μA
1.0
3.0
μA
14
100
nA
VEN = |VIN| = |VOUT(NOM)| + 1.0V
0.48
1.0
μA
VIN = VEN = –35V
0.51
1.0
μA
VIN = –35V, VEN = +15V
0.50
1.2
μA
+2.0
+15
V
TJ = –55°C to +125°C
V+EN_HI
Positive enable high-level voltage
V+EN_LO
Positive enable low- level voltage
0
+0.4
V
V–EN_HI
Negative enable high-level voltage
VIN
–2.0
V
V–EN_LO
Negative enable low- level voltage
–0.4
0
V
VNOISE
Output noise voltage
PSRR
Power-supply rejection ratio
TSD
Thermal shutdown temperature
TJ
Operating junction temperature
range
(1)
(2)
(3)
(4)
4
VIN = –3V, VOUT(NOM) = VREF, COUT = 10μF,
CNR/SS = 10nF, BW = 10Hz to 100kHz
15.1
μVRMS
VIN = –6.2V, VOUT(NOM) = –5V, COUT = 10μF,
CNR/SS = CBYP (4) = 10nF, BW = 10Hz to
100kHz
17.5
μVRMS
VIN = –6.2V, VOUT(NOM) = –5V, COUT = 10μF,
CNR/SS = CBYP (4) = 10nF, f = 120Hz
72
dB
Shutdown, temperature increasing
+170
°C
Reset, temperature decreasing
+150
°C
–55
+125
°C
At operating conditions, VIN ≤ 0V, VOUT(NOM) ≤ VREF ≤ 0V. At regulation, VIN ≤ VOUT(NOM) – |VDO|. IOUT > 0 flows from OUT to IN.
To ensure stability at no load conditions, a current from the feedback resistive network equal to or greater than 5μA is required.
IFB > 0 flows into the device.
CBYP refers to a bypass capacitor connected to the FB and OUT pins.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
DEVICE INFORMATION
FUNCTIONAL BLOCK DIAGRAM
GND
EN
Enable
FB
Bandgap
NR/SS
Antisaturation
OUT
Error
Amp
Pass
Device
Thermal
Shutdown
Current
Limit
IN
TYPICAL APPLICATION CIRCUIT
VIN
OUT
IN
CIN
10mF
EN
TPS7A3001
CBYP
10nF
VOUT
R1
FB
R2
CNR/SS
10nF
NR/SS
GND
Where:
COUT
10mF
VOUT
³ 5mA, and
R1 + R2
R1 = R2
VOUT
-1
VREF
Maximize PSRR Performance and Minimize RMS Noise
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
5
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
PIN CONFIGURATION
DGN PACKAGE
MSOP-8
(TOP VIEW)
OUT
FB
NC
GND
1
2
3
4
8
7
6
5
IN
DNC
NR/SS
EN
PIN DESCRIPTIONS
NAME
NO.
OUT
1
Regulator output. A capacitor ≥ 2.2µF must be tied from this pin to ground to assure stability.
FB
2
This pin is the input to the control-loop error amplifier. It is used to set the output voltage of the device.
NC
3
Not internally connected. This pin must either be left open or tied to GND.
GND
4
Ground
EN
5
This pin turns the regulator on or off. If VEN ≥ V+EN_HI or VEN ≤ V–EN_HI, the regulator is enabled.
If V+EN_LO ≥ VEN ≥ V–EN_LO, the regulator is disabled. The EN pin can be connected to IN, if not used. |VEN| ≤ |VIN|.
NR/SS
6
Noise reduction pin. Connecting an external capacitor to this pin bypasses noise generated by the internal bandgap.
This capacitor allows RMS noise to be reduced to very low levels and also controls the soft-start function.
DNC
7
DO NOT CONNECT. Do not route this pin to any electrical net, not even GND or IN.
IN
8
Input supply
PowerPAD
6
DESCRIPTION
Must either be left open or tied to GND. Solder to printed circuit board (PCB) plane to enhance thermal performance.
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2μF,
COUT = 2.2μF, CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
FEEDBACK VOLTAGE vs INPUT VOLTAGE
FEEDBACK CURRENT vs TEMPERATURE
-1.165
100
90
80
70
IFB (nA)
VFB (V)
-1.17
-1.175
+125°C
+105°C
+85°C
+25°C
-40°C
-1.18
60
50
40
30
20
10
-1.185
0
-40
-35
-30
-25
-20
VIN (V)
-15
-10
-5
0
-40 -25 -10
5
20 35 50 65
Temperature (°C)
Figure 2.
95
110 125
Figure 3.
GROUND CURRENT vs INPUT VOLTAGE
GROUND CURRENT vs INPUT VOLTAGE
2500
1200
0mA
10mA
50mA
100mA
200mA
2000
TJ = +25°C
1000
800
1500
IGND (mA)
IGND (mA)
80
1000
600
+125°C
+105°C
+85°C
+25°C
-40°C
400
500
200
IOUT = 100mA
0
0
-40
-35
-30
-25
-20
VIN (V)
-15
-10
-5
0
-40
-35
-30
-25
Figure 4.
-20
VIN (V)
-15
-10
-5
0
Figure 5.
GROUND CURRENT vs OUTPUT CURRENT
ENABLE CURRENT vs ENABLE VOLTAGE
2500
1000
+125°C
+25°C
-40°C
800
2000
600
IEN (nA)
IGND (mA)
400
1500
1000
+125°C
+105°C
+85°C
+25°C
-40°C
500
0
200
0
-200
-400
-600
-800
-1000
0
20
40
60
80 100 120 140 160 180 200
IOUT (mA)
Figure 6.
Copyright © 2011, Texas Instruments Incorporated
-35
-25
-15
5
-5
VEN (V)
15
25
35
Figure 7.
Submit Documentation Feedback
7
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2μF,
COUT = 2.2μF, CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
QUIESCENT CURRENT vs INPUT VOLTAGE
SHUTDOWN CURRENT vs INPUT VOLTAGE
100
3.5
90
+125°C
+105°C
+85°C
+25°C
-40°C
3
80
2.5
ISHDN (mA)
IQ (mA)
70
60
50
40
+125°C
+105°C
+85°C
+25°C
-40°C
30
20
IOUT = 0mA
10
1.5
1
0.5
VEN = -0.4V
0
0
-40
-35
-30
-25
-20
VIN (V)
-15
-10
-5
0
-40
-35
-30
-25
-20
VIN (V)
-15
-10
-5
Figure 8.
Figure 9.
DROPOUT VOLTAGE vs OUTPUT CURRENT
DROPOUT VOLTAGE vs TEMPERATURE
450
500
400
450
350
400
350
VDO (mV)
300
VDO (mV)
2
250
200
+125°C
+105°C
+85°C
+25°C
-40°C
150
100
50
0
10mA
50mA
100mA
200mA
300
250
200
150
100
50
0
0
0
20
40
60
80 100 120 140 160 180 200
IOUT (mA)
-40 -25 -10
5
Figure 10.
95
110 125
CURRENT LIMIT vs TEMPERATURE
500
VOUT = 90% VOUT(NOM)
400
80
Figure 11.
CURRENT LIMIT vs INPUT VOLTAGE
450
20 35 50 65
Temperature (°C)
450
350
400
ILIM (mA)
ILIM (mA)
300
250
200
+125°C
+105°C
+85°C
+25°C
-40°C
150
100
50
300
250
0
200
-10
-9
-8
-7
-6
VIN (V)
Figure 12.
8
350
Submit Documentation Feedback
-5
-4
-3
-40 -25 -10
5
20 35 50 65
Temperature (°C)
80
95
110 125
Figure 13.
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2μF,
COUT = 2.2μF, CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
ENABLE THRESHOLD VOLTAGE vs TEMPERATURE
POWER-SUPPLY REJECTION RATIO vs COUT
90
2
ON
80
1
70
0.5
60
0
PSRR (dB)
VEN (V)
1.5
OFF
-0.5
50
40
30
-1
-1.5
20
ON
10
-2
-40 -25 -10
5
20 35 50 65
Temperature (°C)
80
95
COUT = 10mF
VOUT = -5V
VIN = -6.2V
IOUT = 200mA
CNR/SS = 10nF
CBYP = 0mF
10
110 125
100
COUT = 2.2mF
1k
Figure 14.
LINE REGULATION
10M
POWER-SUPPLY REJECTION RATIO vs CNR/SS
90
+125°C
+105°C
+85°C
+25°C
-40°C
0.6
0.4
0.2
80
0
-0.2
-0.4
60
50
40
30
-0.6
20
-0.8
-1
10
-40
-35
-30
-25
-20
VIN (V)
-15
-10
-5
CNR/SS = 10nF
70
PSRR (dB)
0.8
VOUT(NOM) (%)
1M
Figure 15.
1
0
VOUT = -5V
VIN = -6.2V
IOUT = 200mA
COUT = 10mF
CBYP = 0mF
10
100
CNR/SS = 0nF
1k
Figure 16.
10k
100k
Frequency (Hz)
1M
10M
Figure 17.
LOAD REGULATION
POWER-SUPPLY REJECTION RATIO vs CBYP
1
90
0.6
0.4
0.2
0
-0.2
-0.4
80
CBYP = 10nF
70
PSRR (dB)
+125°C
+105°C
+85°C
+25°C
-40°C
0.8
VOUT(NOM) (%)
10k
100k
Frequency (Hz)
60
50
40
30
-0.6
20
-0.8
-1
VOUT = -5V
VIN = -6.2V
IOUT = 200mA
CNR/SS = 10nF
COUT = 10mF
CBYP = 0nF
10
0
20
40
60
80 100 120 140 160 180 200
IOUT (mA)
Figure 18.
Copyright © 2011, Texas Instruments Incorporated
10
100
1k
100k
10k
Frequency (Hz)
1M
10M
Figure 19.
Submit Documentation Feedback
9
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2μF,
COUT = 2.2μF, CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
Output Spectral Noise Density (mV/ÖHz)
OUTPUT SPECTRAL NOISE DENSITY vs OUTPUT CURRENT
10
VOUT = -1.2V
VIN = -3V
CNR/SS = 10nF
COUT = 10mF
1
RMS NOISE
IOUT
10Hz to 100kHz
100Hz to 100kHz
1mA
15.13
14.73
200mA
17.13
16.71
IOUT = 200mA
0.1
IOUT = 1mA
0.01
10
100
1k
Frequency (Hz)
10k
100k
Figure 20.
Output Spectral Noise Density (mV/ÖHz)
OUTPUT SPECTRAL NOISE DENSITY vs CNR/SS
10
VOUT = -1.2V
VIN = -3V
IOUT = 200mA
COUT = 10mF
CNR/SS = 0nF
1
RMS NOISE
CNR/SS
10Hz to 100kHz
100Hz to 100kHz
0nF
80.00
79.83
10nF
17.29
16.81
0.1
CNR/SS = 10nF
0.01
10
100
1k
Frequency (Hz)
10k
100k
Figure 21.
Output Spectral Noise Density (mV/ÖHz)
OUTPUT SPECTRAL NOISE DENSITY vs VOUT(NOM)
10
VOUT(NOM) = -5V
1
0.1
IOUT = 1mA
CNR/SS = 10nF
CBYP = 10nF
COUT = 10mF
RMS NOISE
VOUT(NOM)
10Hz to 100kHz
100Hz to 100kHz
-5V
17.50
15.04
-1.2V
15.13
14.73
VOUT(NOM) = -1.2V
0.01
10
100
1k
Frequency (Hz)
10k
100k
Figure 22.
10
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2μF,
COUT = 2.2μF, CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
CAPACITOR-PROGRAMMABLE SOFT START
VOUT = -1.2V
VIN = -3V
IOUT = 1mA
CIN = COUT = 2.2mF
CNR/SS = 0pF
VOUT
1V/div
1V/div
CAPACITOR-PROGRAMMABLE SOFT START
VEN
VOUT = -1.2V
VIN = -3V
IOUT = 1mA
CIN = COUT = 2.2mF
CNR/SS = 100pF
VOUT
VEN
Time (20ms/div)
Figure 23.
Figure 24.
CAPACITOR-PROGRAMMABLE SOFT START
CAPACITOR-PROGRAMMABLE SOFT START
VOUT = -1.2V
VIN = -3V
IOUT = 1mA
CIN = COUT = 2.2mF
CNR/SS = 1nF
VOUT
VEN
VEN
Time (100ms/div)
Time (1ms/div)
Figure 25.
Figure 26.
LINE TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
VIN
VIN = -20V to -4.3V
IOUT = 200mA
COUT = 2.2mF
VIN = -4.3V to -20V
IOUT = 200mA
COUT = 2.2mF
5V/div
5V/div
VOUT = -1.2V
VIN = -3V
IOUT = 1mA
CIN = COUT = 2.2mF
CNR/SS = 10nF
VOUT
1V/div
1V/div
Time (10ms/div)
20mV/div
20mV/div
VIN
VOUT
Time (10ms/div)
Figure 27.
Copyright © 2011, Texas Instruments Incorporated
VOUT
Time (10ms/div)
Figure 28.
Submit Documentation Feedback
11
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
TYPICAL CHARACTERISTICS (continued)
At TJ = –55°C to +125°C, |VIN| = |VOUT(NOM)| + 1.0V or |VIN| = 3.0V (whichever is greater), VEN = VIN, IOUT = 1mA, CIN = 2.2μF,
COUT = 2.2μF, CNR/SS = 0nF, and the FB pin tied to OUT, unless otherwise noted.
50mV/div
200mA/div
LOAD TRANSIENT RESPONSE
IOUT
VOUT
VIN = -3.0V
IOUT = 1mA to 200mA
COUT = 2.2mF
Time (100ms/div)
Figure 29.
12
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
THEORY OF OPERATION
GENERAL DESCRIPTION
The TPS7A3001 belongs to a family of new generation linear regulators that use an innovative bipolar process to
achieve ultralow-noise and very high PSRR levels at a wide input voltage range. These features, combined with
a high thermal performance MSOP-8 with PowerPAD package make this device ideal for high-performance
analog applications.
ADJUSTABLE OPERATION
The TPS7A3001 has an output voltage range of –1.174 to –35V. The nominal output voltage of the device is set
by two external resistors, as shown in Figure 30.
VOUT
VIN
OUT
IN
CIN
10mF
EN
CBYP
10nF
TPS7A3001
R1
FB
R2
NR/SS
CNR/SS
10nF
COUT
10mF
GND
Figure 30. Adjustable Operation for Maximum AC Performance
R1 and R2 can be calculated for any output voltage range using the formula shown in Equation 1. To ensure
stability under no load conditions, this resistive network must provide a current equal to or greater than 5μA.
VOUT
VOUT
³ 5mA
R1 = R2
- 1 , where
R1 + R2
VREF
(1)
If greater voltage accuracy is required, take into account the output voltage offset contributions because of the
feedback pin current and use 0.1% tolerance resistors.
ENABLE PIN OPERATION
The TPS7A3001 provides a dual polarity enable pin (EN) that turns on the regulator when |VEN| > 2.0V, whether
the voltage is positive or negative, as shown in Figure 31.
This functionality allows for different system power management topologies:
• Connecting the EN pin directly to a negative voltage, such as VIN, or
• Connecting the EN pin directly to a positive voltage, such as the output of digital logic circuitry.
VOUT
VEN
VIN
Time (20ms/div)
Figure 31. Enable Pin Positive/Negative Threshold
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
13
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
CAPACITOR RECOMMENDATIONS
Low ESR capacitors should be used for the input, output, noise reduction, and bypass capacitors. Ceramic
capacitors with X7R and X5R dielectrics are preferred. These dielectrics offer more stable characteristics.
Ceramic X7R capacitors offer improved over-temperature performance, while ceramic X5R capacitors are the
most cost-effective and are available in higher values.
Note that high ESR capacitors may degrade PSRR.
INPUT AND OUTPUT CAPACITOR REQUIREMENTS
This negative, high-voltage linear regulator achieves stability with a minimum input and output capacitance of
2.2μF; however, it is highly recommended to use a 10μF capacitor to maximize ac performance.
NOISE REDUCTION AND BYPASS CAPACITOR REQUIREMENTS
Although noise reduction and bypass capacitors (CNR/SS and CBYP, respectively) are not needed to achieve
stability, it is highly recommended to use 0.01μF capacitors to minimize noise and maximize ac performance.
MAXIMUM AC PERFORMANCE
In order to maximize noise and PSRR performance, it is recommended to include 10μF or higher input and
output capacitors, and 0.01μF noise reduction and bypass capacitors, as shown in Figure 30. The solution shown
delivers minimum noise levels of 15.1μVRMS and power-supply rejection levels above 55dB from 10Hz to 700kHz;
see Figure 19 and Figure 20.
OUTPUT NOISE
The TPS7A3001 provides low output noise when a noise reduction capacitor (CNR/SS) is used.
The noise reduction capacitor serves as a filter for the internal reference. By using a 0.01μF noise reduction
capacitor, the output noise is reduced by almost 80% (from 80μVRMS to 17μVRMS); see Figure 21.
TPS7A3001 low output voltage noise makes it an ideal solution for powering noise-sensitive circuitry.
POWER-SUPPLY REJECTION
The 0.01μF noise reduction capacitor greatly improves TPS7A3001 power-supply rejection, achieving up to 20dB
of additional power-supply rejection for frequencies between 110Hz and 400KHz.
Additionally, ac performance can be maximized by adding a 0.01μF bypass capacitor (CBYP) from the FB pin to
the OUT pin. This capacitor greatly improves power-supply rejection at lower frequencies, for the band from
10Hz to 200kHz; see Figure 19.
The very high power-supply rejection of the TPS7A3001 makes it a good choice for powering high-performance
analog circuitry, such as operational amplifiers, ADCs, DACS, and audio amplifiers.
TRANSIENT RESPONSE
As with any regulator, increasing the size of the output capacitor reduces over/undershoot magnitude but
increases duration of the transient response.
14
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
APPLICATION INFORMATION
POWER FOR PRECISION ANALOG
One of the primary TPS7A3001 applications is to provide ultralow noise voltage rails to high-performance analog
circuitry in order to maximize system accuracy and precision.
In conjunction with its positive counterpart, the TPS7A49xx family of positive high-voltage linear regulators, this
negative high voltage linear regulator provides ultralow noise positive and negative voltage rails to
high-performance analog circuitry, such as operational amplifiers, ADCs, DACs, and audio amplifiers.
Because of the ultralow noise levels at high voltages, analog circuitry with high-voltage input supplies can be
used. This characteristic allows for high-performance analog solutions to optimize the voltage range, maximizing
system accuracy.
POST DC/DC CONVERTER FILTERING
Most of the time, the voltage rails available in a system do not match the voltage specifications demanded by
one or more of its circuits; these rails must be stepped up or down, depending on specific voltage requirements.
DC/DC converters are the preferred solution to step up or down a voltage rail when current consumption is not
negligible. They offer high efficiency with minimum heat generation, but they have one primary disadvantage:
they introduce a high-frequency component, and the associated harmonics, on top of the dc output signal.
This high-frequency component, if not filtered properly, degrades analog circuitry performance, reducing overall
system accuracy and precision.
The TPS7A3001 offers a wide-bandwidth, very-high power-supply rejection ratio. This specification makes it ideal
for post dc/dc converter filtering, as shown in Figure 32. It is highly recommended to use the maximum
performance schematic shown in Figure 30. Also, verify that the fundamental frequency (and its first harmonic, if
possible) is within the bandwidth of the regulator PSRR, shown in Figure 19.
+18V
IN
OUT
+15V
TPS7A49
-18V
EN
GND
IN
OUT
-15V
TPS7A30
EN
GND
EVM
Figure 32. Post DC/DC Converter Regulation to High-Performance Analog Circuitry
AUDIO APPLICATIONS
Audio applications are extremely sensitive to any distortion and noise in the audio band from 20Hz to 20kHz.
This stringent requirement demands clean voltage rails to power critical high-performance audio systems.
The very-high power-supply rejection ratio (> 55dB) and low noise at the audio band of the TPS7A3001
maximize performance for audio applications; see Figure 19.
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
15
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
LAYOUT
PACKAGE MOUNTING
Solder pad footprint recommendations for the TPS7A3001 are available at the end of this product datasheet and
at www.ti.com.
BOARD LAYOUT RECOMMENDATIONS TO IMPROVE PSRR AND NOISE PERFORMANCE
To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the
board be designed with separate ground planes for IN and OUT, with each ground plane connected only at the
GND pin of the device. In addition, the ground connection for the output capacitor should connect directly to the
GND pin of the device.
Equivalent series inductance (ESL) and equivalent series resistance (ESR) must be minimized in order to
maximize performance and ensure stability. Every capacitor (CIN, COUT, CNR/SS, CBYP) must be placed as close as
possible to the device and on the same side of the printed circuit board (PCB) as the regulator itself.
Do not place any of the capacitors on the opposite side of the PCB from where the regulator is installed. The use
of vias and long traces is strongly discouraged because they may impact system performance negatively and
even cause instability.
If possible, and to ensure the maximum performance denoted in this product datasheet, use the same layout
pattern used for TPS7A30 evaluation board, available at www.ti.com.
THERMAL PROTECTION
Thermal protection disables the output when the junction temperature rises to approximately +170°C, allowing
the device to cool. When the junction temperature cools to approximately +150°C, the output circuitry is enabled.
Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may
cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage as a result of
overheating.
Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate
heatsink. For reliable operation, junction temperature should be limited to a maximum of +125°C. To estimate the
margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal
protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should
trigger at least +35°C above the maximum expected ambient condition of your particular application. This
configuration produces a worst-case junction temperature of +125°C at the highest expected ambient
temperature and worst-case load.
The internal protection circuitry of the TPS7A3001 has been designed to protect against overload conditions. It
was not intended to replace proper heatsinking. Continuously running the TPS7A3001 into thermal shutdown
degrades device reliability.
POWER DISSIPATION
The ability to remove heat from the die is different for each package type, presenting different considerations in
the PCB layout. The PCB area around the device that is free of other components moves the heat from the
device to the ambient air. Using heavier copper increases the effectiveness in removing heat from the device.
The addition of plated through-holes to heat dissipating layers also improves the heatsink effectiveness.
Power dissipation depends on input voltage and load conditions. Power dissipation (PD) is equal to the product of
the output current times the voltage drop across the output pass element, as shown in Equation 2:
PD = (VIN - VOUT) IOUT
(2)
SUGGESTED LAYOUT AND SCHEMATIC
Layout is a critical part of good power-supply design. There are several signal paths that conduct fast-changing
currents or voltages that can interact with stray inductance or parasitic capacitance to generate noise or degrade
the power-supply performance. To help eliminate these problems, the IN pin should be bypassed to ground with
a low ESR ceramic bypass capacitor with a X5R or X7R dielectric.
16
Submit Documentation Feedback
Copyright © 2011, Texas Instruments Incorporated
TPS7A3001-EP
SBVS174 – OCTOBER 2011
www.ti.com
The GND pin should be tied directly to the PowerPAD under the IC. The PowerPAD should be connected to any
internal PCB ground planes using multiple vias directly under the IC.
It may be possible to obtain acceptable performance with alternate PCB layouts; however, the layout shown in
Figure 33 and the schematic shown in Figure 34 have been shown to produce good results and are meant as a
guideline.
Figure 33. PCB Layout Example
U1 TPS7A30XXDGN
5
6
C4
7
8
Vin
J1
4
GND
EN
3
NR/SS
NC
DNC
FB
2
IN
PwPd
J1
1
OUT
C1
J7
GND
R1
9
J4
C2
C3
R3
Figure 34. Schematic for PCB Layout Example
Copyright © 2011, Texas Instruments Incorporated
Submit Documentation Feedback
17
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2011
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package
Drawing
Pins
Package Qty
Eco Plan
(2)
Lead/
Ball Finish
MSL Peak Temp
(3)
TPS7A3001MDGNTEP
ACTIVE
MSOPPowerPAD
DGN
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
V62/11619-01XE
ACTIVE
MSOPPowerPAD
DGN
8
250
Green (RoHS
& no Sb/Br)
CU NIPDAU Level-2-260C-1 YEAR
Samples
(Requires Login)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TPS7A3001-EP :
• Catalog: TPS7A3001
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Nov-2011
• Catalog - TI's standard catalog product
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Dec-2011
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPS7A3001MDGNTEP
Package Package Pins
Type Drawing
MSOPPower
PAD
DGN
8
SPQ
250
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
180.0
12.4
Pack Materials-Page 1
5.3
B0
(mm)
K0
(mm)
P1
(mm)
3.4
1.4
8.0
W
Pin1
(mm) Quadrant
12.0
Q1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Dec-2011
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS7A3001MDGNTEP
MSOP-PowerPAD
DGN
8
250
210.0
185.0
35.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
www.ti.com/audio
Communications and Telecom www.ti.com/communications
Amplifiers
amplifier.ti.com
Computers and Peripherals
www.ti.com/computers
Data Converters
dataconverter.ti.com
Consumer Electronics
www.ti.com/consumer-apps
DLP® Products
www.dlp.com
Energy and Lighting
www.ti.com/energy
DSP
dsp.ti.com
Industrial
www.ti.com/industrial
Clocks and Timers
www.ti.com/clocks
Medical
www.ti.com/medical
Interface
interface.ti.com
Security
www.ti.com/security
Logic
logic.ti.com
Space, Avionics and Defense
www.ti.com/space-avionics-defense
Power Mgmt
power.ti.com
Transportation and Automotive www.ti.com/automotive
Microcontrollers
microcontroller.ti.com
Video and Imaging
RFID
www.ti-rfid.com
OMAP Mobile Processors
www.ti.com/omap
Wireless Connectivity
www.ti.com/wirelessconnectivity
TI E2E Community Home Page
www.ti.com/video
e2e.ti.com
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2011, Texas Instruments Incorporated