TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 ULTRA-SMALL, LOW-INPUT-VOLTAGE, LOW rON LOAD SWITCH Check for Samples: TPS22924C FEATURES DESCRIPTION • • • The TPS22924C is a small, ultra-low rON load switch with controlled turn on. The devices contain Nchannel MOSFETs that can operate over an input voltage range of 0.75 V to 3.6 V. An integrated charge pump biases the NMOS switch to achieve a minimum switch ON resistance. The switch is controlled by an on/off input (ON), which is capable of interfacing directly with low-voltage control signals. 1 • • • • • • • Integrated Single Load Switch Input Voltage: 0.75 V to 3.6 V Ultra-Low ON Resistance – rON = 18.3 mΩ at VIN = 3.6 V – rON = 18.5 mΩ at VIN = 2.5 V – rON = 19.6 mΩ at VIN = 1.8 V – rON = 19.4 mΩ at VIN = 1.2 V – rON = 20.3 mΩ at VIN = 1.0 V – rON = 22.7 mΩ at VIN = 0.75 V Ultra Small CSP-6 package 0.9 mm x 1.4 mm, 0.5-mm Pitch 2-A Maximum Continuous Switch Current Low Shutdown Current Low Threshold Control Input Controlled Slew Rate to Avoid Inrush Currents Quick Output Discharge Transistor ESD Performance Tested Per JESD 22 – 5000-V Human-Body Model (A114-B, Class II) – 1000-V Charged-Device Model (C101) is added for output turned off. The rise controlled to avoid features a rise time The TPS22924C is available in an ultra-small spacesaving 6-pin CSP package and is characterized for operation over the free-air temperature range of –40ºC to 85ºC. Figure 1. TYPICAL APPLICATION VIN SMPS ON CIN = 1 µF CL VOUT LOAD TPS22924C CL RL OFF GND GND GND NOTE: SMPS = Switched-mode power supply APPLICATIONS • • • • • • • • • A 1250-Ω on-chip load resistor quick discharge when switch is time of the device is internally inrush current. The TPS22924C of 800 µs at 3.6 V. Battery Powered Equipment Portable Industrial Equipment Portable Medical Equipment Portable Media Players Point Of Sales Terminal GPS Devices Digital Cameras Netbooks / Notebooks Smartphones Table 1. FEATURE LIST TPS22924C (1) rON (TYP) AT 3.6 V SLEW RATE (TYP) AT 3.6 V QUICK OUTPUT DISCHARGE (1) MAXIMUM OUTPUT CURRENT ENABLE 18.3 mΩ 800 μs Yes 2A Active high This feature discharges the output of the switch to ground through a 1250-Ω resistor, preventing the output from floating. See the Output Pulldown section in Application Information. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009–2013, Texas Instruments Incorporated TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ORDERING INFORMATION PACKAGE (2) TA (1) ORDERABLE PART NUMBER TOP-SIDE MARKING (3) –40°C to 85°C DSBGA – YZP (0.5-mm pitch) Reel TPS22924CYZPR (without back side coating) _ _ _ 5L _ –40°C to 85°C DSBGA – YZP (0.5-mm pitch) Reel TPS22924CYZPRB (with back side coating) _ _ _ 5L _ (1) (2) (3) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). YZP PACKAGE C C B B A A 2 1 Laser Marking View 1 2 Bump View TERMINALS ASSIGNMENTS (YZP PACKAGE) C GND ON B VOUT VIN A VOUT VIN 1 2 TERMINAL FUNCTIONS NO. 2 NAME DESCRIPTION C1 GND Ground C2 ON Switch control input, active high. Do not leave floating A1, B1 VOUT Switch output A2, B2 VIN Switch input, bypass this input with a ceramic capacitor to ground Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 BLOCK DIAGRAM VIN Charge Pump Control Logic ON VOUT GND FUNCTION TABLE ON (Control Signal) VIN to VOUT VOUT to GND (1) L OFF ON H ON OFF (1) See application section Output Pulldown. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C 3 TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com ABSOLUTE MAXIMUM RATINGS (1) MIN MAX –0.3 4 V VIN + 0.3 V 4 V Maximum continuous switch current, TA = -40°C to 85°C 2 A Maximum pulsed switch current, 100-µs pulse, 2% duty cycle, TA = -40°C to 85°C 4 A 85 °C 150 °C VIN Input voltage range VOUT Output voltage range VON Input voltage range IMAX IPLS TA Operating free-air temperature range Tstg Storage temperature range ESD (1) –0.3 –40 –65 Electrostatic discharge protection Human-Body Model (HBM) 5000 Charged-Device Model (CDM) 1000 UNIT V Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATINGS (1) BOARD PACKAGE RθJC RθJA DERATING FACTOR ABOVE TA = 25°C TA < 25°C TA = 70°C TA = 85°C High-K (1) YZP 17.6°C/W 123.36°C/W - 8.1063 mW/°C 810.63 mW 445.84 mW 324.25 mW The JEDEC high-K (2s2p) board used to derive this data was a 3- × 3-inch, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board. RECOMMENDED OPERATING CONDITIONS VIN Input voltage VOUT Output voltage VIH High-level input voltage, ON VIL Low-level input voltage, ON CIN Input capacitance (1) 4 MIN MAX 0.75 3.6 V VIN V VIN = 2.5 V to 3.6 V 1.2 3.6 VIN = 0.75 V to 2.5 V 0.9 3.6 VIN = 2.5 V to 3.6 V 0.6 VIN = 0.75 V to 2.49 V 0.4 1 (1) UNIT V V μF See the Input Capacitor section in Application Information. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 ELECTRICAL CHARACTERISTICS VIN = 0.75 V to 3.6 V (unless otherwise noted) PARAMETER IIN Quiescent current IIN(LEAK) OFF-state supply current TEST CONDITIONS IOUT = 0, VIN = VON 75 42 70 VIN = 1.8 V 50 350 95 200 VIN = 1.0 V 65 110 VIN = 0.75 V 35 70 VIN = 1.2 V VON = GND, OUT = 0V Full 160 Full VIN = 1.8 V IOUT = -200 mA VIN = 1.2 V VIN = 1.0 V VIN = 0.75 V rPD Output pulldown resistance (2) VIN = 3.3 V, VON = 0, IOUT = 3 mA ION ON-state input leakage current VON = 0.75 V to 3.6 V or GND (1) (2) MAX UNIT VIN = 2.5 V VIN = 2.5 V ON-state resistance MIN TYP (1) VIN = 3.6 V VIN = 3.6 V rON TA 3.5 25°C 18.3 μA μA 19.7 Full 26.0 25°C 18.5 19.5 Full 25.8 25°C 19.6 21.8 Full 27.4 25°C 19.4 21.8 Full mΩ 28.0 25°C 20.3 21.2 Full 28.6 25°C 22.7 25.3 Full 34.8 25°C 1250 1500 Ω 0.1 μA Full Typical values are at VIN = 3.3 V and TA = 25°C. See Output Pulldown in Application Information. SWITCHING CHARACTERISTICS VIN = 3.6 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tON Turn-ON time RL = 10 Ω, CL = 0.1 μF, VIN = 3.6 V 800 μs tOFF Turn-OFF time RL = 10 Ω, CL = 0.1 μF, VIN = 3.6 V 3 μs tr VOUT rise time RL = 10 Ω, CL = 0.1 μF, VIN = 3.6 V 800 μs tf VOUT fall time RL = 10 Ω, CL = 0.1 μF, VIN = 3.6 V 2.5 μs SWITCHING CHARACTERISTICS VIN = 0.9 V, TA = 25°C (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT tON Turn-ON time RL = 10 Ω, CL = 0.1 μF, VIN = 0.9 V 865 μs tOFF Turn-OFF time RL = 10 Ω, CL = 0.1 μF, VIN = 0.9 V 20 μs tr VOUT rise time RL = 10 Ω, CL = 0.1 μF, VIN = 0.9 V 500 μs tf VOUT fall time RL = 10 Ω, CL = 0.1 μF, VIN = 0.9 V 5 μs Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C 5 TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com PARAMETER MEASURMENT INFORMATION VIN CIN =1 μF VOUT CL ON RL ON + – (A) GND TPS22924C OFF GND GND TEST CIRCUIT VON 50% 50% tr tf tOFF tON 90% 90% VOUT 50% 50% 10% 10% VOUT tON/tOFF WAVEFORMS A. trise and tfall of the control signal is 100 ns. Figure 2. Test Circuit and tON/tOFF Waveforms 6 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 TYPICAL CHARACTERISTICS ON-STATE RESISTANCE vs INPUT VOLTAGE ON-STATE RESISTANCE vs TEMPERATURE INPUT CURRENT, QUIESCENT vs INPUT VOLTAGE INPUT CURRENT, QUIESCENT vs TEMPERATURE 180 70 160 60 140 IIN (Quiescent) (µA) IIN (µA) 120 100 80 60 50 40 30 20 40 20 10 0 0 1 2 V IN (V) 3 4 0 -40 -15 10 35 60 85 Tem perature (°C) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C 7 TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) INPUT CURRENT, LEAK vs TEMPERATURE VIN = 3.6V INPUT CURRENT, LEAK vs INPUT VOLTAGE ON INPUT THRESHOLD 4 V IN = 3.6 V 3.5 3 V IN = 2.5 V VOUT (V) 2.5 2 V IN = 1.8 V 1.5 V IN = 1.2 V 1 V IN = 1.0 V V IN = 0.75 V 0.5 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 V ON (V) 8 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 TYPICAL CHARACTERISTICS (continued) VIN TURN-ON TIME vs TEMPERATURE = 3.6 V, CL = 0.1 µF, RL = 10 Ω VIN TURN-OFF TIME vs TEMPERATURE = 3.6 V, CL = 0.1 µF, RL = 10 Ω 3.1 1200 3.05 1000 3 800 tOFF (µs) tON (µs) 2.95 600 2.9 2.85 400 2.8 200 2.75 0 -40 -15 10 35 60 2.7 -40 85 2.4 900 2.38 800 2.36 700 2.34 600 2.32 tF (µs) tR (µs) 1000 500 2.28 300 2.26 200 2.24 100 2.22 10 35 60 35 60 85 2.3 400 -15 10 Tem perature (°C) FALL TIME vs TEMPERATURE VIN = 3.6 V, CL = 0.1 µF, RL = 10 Ω Tem perature (°C) RISE TIME vs TEMPERATURE VIN = 3.6 V, CL = 0.1 µF, RL = 10 Ω 0 -40 -15 85 2.2 -40 Tem perature (°C) -15 10 35 60 85 Tem perature (°C) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C 9 TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) VIN TURN-ON TIME vs TEMPERATURE = 0.9 V, CL = 0.1 µF, RL = 10 Ω VIN 1400 TURN-OFF TIME vs TEMPERATURE = 0.9 V, CL = 0.1 µF, RL = 10 Ω 20 18 1200 16 14 12 800 tOFF (µs) tON (µs) 1000 600 10 8 6 400 4 200 2 0 -40 -15 10 35 60 0 -40 85 Tem perature (°C) RISE TIME vs TEMPERATURE VIN = 0.9 V, CL = 0.1 µF, RL = 10 Ω -15 10 35 60 85 Tem perature (°C) FALL TIME vs TEMPERATURE VIN = 0.9 V, CL = 0.1 µF, RL = 10 Ω 700 6 600 5 500 400 tF (µs) tR (µs) 4 3 300 2 200 1 100 0 -40 -15 10 35 60 85 0 -40 Tem perature (°C) 10 -15 10 35 60 85 Tem perature (°C) Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 TYPICAL CHARACTERISTICS (continued) RISE TIME vs INPUT VOLTAGE CL = 0.1 µF, RL = 10 Ω, VON = 1.8 V RISE TIME vs INPUT VOLTAGE CL = 20 µF, RL = 10 Ω, VON = 1.8 V 1400 1200 TA = -40°C TA = -40°C 1200 TA = 25°C 1000 TA = 25°C TA = 85°C TA = 85°C 1000 800 tR (µs) tR (µs) 800 600 600 400 400 200 200 0 0 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.5 1 1.5 2 2.5 3 3.5 V IN (V) TURN-ON RESPONSE CIN = 1 µF, CL = 0.1 µF, RL = 10 Ω, VIN = 0.9 V, TA = 25°C V IN (V) TURN-OFF RESPONSE CIN = 1 µF, CL = 0.1 µF, RL = 10 Ω, VIN = 0.9 V, TA = 25°C TURN-ON RESPONSE CIN = 47 µF, CL = 20 µF, RL = 10 Ω, VIN = 0.9 V, TA = 25°C TURN-OFF RESPONSE CIN = 47 µF, CL = 20 µF, RL = 10 Ω, VIN = 0.9 V, TA = 25°C Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C 4 11 TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com TYPICAL CHARACTERISTICS (continued) TURN-ON RESPONSE = 1 µF, CL = 0.1 µF, RL = 10 Ω, VIN = 3.6 V, TA = 25°C TURN-OFF RESPONSE CIN = 1 µF, CL = 0.1 µF, RL = 10 Ω, VIN = 3.6 V, TA = 25°C TURN-ON RESPONSE CIN = 47 µF, CL = 20 µF, RL = 10 Ω, VIN = 3.6 V, TA = 25°C TURN-OFF RESPONSE CIN = 47 µF, CL = 20 µF, RL = 10 Ω, VIN = 3.6 V, TA = 25°C CIN 12 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C TPS22924C www.ti.com SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 APPLICATION INFORMATION ON/OFF Control The ON pin controls the state of the switch. Asserting ON high enables the switch. ON is active high and has a low threshold, making it capable of interfacing with low-voltage signals. The ON pin is compatible with standard GPIO logic threshold. It can be used with any microcontroller with 1.2-V, 1.8-V, 2.5-V or 3.3-V GPIOs. Input Capacitor To limit the voltage drop on the input supply caused by transient in-rush currents when the switch turns on into a discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-μF ceramic capacitor, CIN, placed close to the pins is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop. Output Capacitor Due to the integral body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip caused by inrush currents during startup. Output Pulldown The output pulldown is active when the user is turning off the main pass FET. The pulldown discharges the output rail to approximately 10% of the rail, then the output pulldown is automatically disconnected to optimize the shutdown current. Board Layout For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance. Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C 13 TPS22924C SLVSA52C – NOVEMBER 2009 – REVISED JUNE 2013 www.ti.com REVISION HISTORY Changes from Original (November 2009) to Revision A Page • Changed Ultra-Low ON Resistance list in Features ............................................................................................................. 1 • Changed rON (TYP) in Feature List table from 5.7mΩ to 18.3mΩ. ....................................................................................... 1 • Changed block diagram to show a PMOS FET instead of an NMOS FET. ......................................................................... 3 • Changed VIL lower end VIN value from (0.75 V to 2.5 V) to (0.75V to 2.49 V). .................................................................... 4 • Changed the way IIN is specified. ......................................................................................................................................... 5 • Changed the name of the parameter IIN(OFF) to IIN(LEAK). The test condition also changed from OUT = OPEN to OUT = 0V. ......................................................................................................................................................................................... 5 • Changed rON values. ............................................................................................................................................................. 5 • Changed Test Circuit diagram in the PARAMETER MEASURMENT INFORMATION section. .......................................... 6 • Changed graphs in the TYPICAL CHARACTERISTICS section. ......................................................................................... 7 Changes from Revision A (May 2011) to Revision B • Changed parametric (MAX ) values for IIN Quiescent and IIN(LEAK) . ..................................................................................... 5 Changes from Revision B (June 2011) to Revision C • 14 Page Page Added new orderable part number to the ORDERING INFORMATION table. .................................................................... 2 Submit Documentation Feedback Copyright © 2009–2013, Texas Instruments Incorporated Product Folder Links: TPS22924C PACKAGE OPTION ADDENDUM www.ti.com 23-Jun-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish (2) MSL Peak Temp Op Temp (°C) Device Marking (3) (4/5) TPS22924CYZPR ACTIVE DSBGA YZP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 (5L ~ 5LG) TPS22924CYZPRB ACTIVE DSBGA YZP 6 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 5L TPS22924CYZPT ACTIVE DSBGA YZP 6 250 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 (5LF ~ 5LG) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. 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Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 23-Jun-2013 In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) TPS22924CYZPR DSBGA YZP 6 3000 178.0 9.2 TPS22924CYZPRB DSBGA YZP 6 3000 178.0 TPS22924CYZPT DSBGA YZP 6 250 178.0 1.02 1.52 0.63 4.0 8.0 Q1 9.2 1.02 1.52 0.63 4.0 8.0 Q1 9.2 1.02 1.52 0.63 4.0 8.0 Q1 Pack Materials-Page 1 W Pin1 (mm) Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 22-Jun-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TPS22924CYZPR DSBGA YZP 6 3000 220.0 220.0 35.0 TPS22924CYZPRB DSBGA YZP 6 3000 220.0 220.0 35.0 TPS22924CYZPT DSBGA YZP 6 250 220.0 220.0 35.0 Pack Materials-Page 2 D: Max = 1.418 mm, Min =1.358 mm E: Max = 0.918 mm, Min =0.858 mm IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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