EIC1415-3 14.40 – 15.35GHz 3-Watt Internally Matched Power FET UPDATED 11/22/2004 FEATURES • • • • • • • • 14.40-15.35 GHz Bandwidth Input/Output Impedance Matched to 50 Ohms +34.5 dBm Output Power at 1dB Compression 6.0 dB Power Gain at 1dB Compression 25% Power Added Efficiency -42 dBc IM3 at Po = 23.5 dBm SCL Hermetic Metal Flange Package 100% Tested for DC, RF, and RTH .060 MIN. GATE P1dB G1dB ∆G PAE Id1dB .319 DRAIN SN .045 .094 .382 .004 .129 PARAMETERS/TEST CONDITIONS1 Output Power at 1dB Compression f = 14.40-15.35GHz VDS = 10 V, IDSQ ≈ 800mA Gain at 1dB Compression f = 14.40-15.35GHz VDS = 10 V, IDSQ ≈ 800mA Gain Flatness f = 14.40-15.35GHz VDS = 10 V, IDSQ ≈ 800mA Power Added Efficiency at 1dB Compression VDS = 10 V, IDSQ ≈ 800mA f = 14.40-15.35GHz Drain Current at 1dB Compression f = 14.40-15.35GHz IM3 Output 3rd Order Intermodulation Distortion 2 ∆f = 10 MHz 2-Tone Test; Pout = 23.5 dBm S.C.L VDS = 10 V, IDSQ ≈ 65% IDSS f = 15.35GHz IDSS Saturated Drain Current VP Pinch-off Voltage Caution! ESD sensitive device. MIN TYP MAX 33.5 34.5 dBm 5.0 6.0 dB UNITS ±0.6 dB 25 900 -38 % 1100 -42* 1800 VDS = 3 V, IDS = 15 mA -2.5 -4.0 8.0 mA dBc 1400 Thermal Resistance .070 ±.008 ALL DIMENSIONS IN INCHES VDS = 3 V, VGS = 0 V 3 RTH .060 MIN. .022 YM ELECTRICAL CHARACTERISTICS (Ta = 25°C) SYMBOL Excelics EIC1415-3 .650±.008 .512 9.0 mA V o C/W Notes: 1. * Tested with 100 Ohm gate resistor. 2. S.C.L. = Single Carrier Level. 3. Overall Rth depends on case mounting. These devices are available screened for IM3 performance. Please contact factory with your requirement. ABSOLUTE MAXIMUM RATINGS FOR CONTINUOUS OPERATION1,2 SYMBOL CHARACTERISTIC VALUE VDS Drain to Source Voltage 10 V VGS Gate to Source Voltage -4.5 V IDS Drain Current IDSS IGSF Forward Gate Current 30 mA PIN Input Power PT Total Power Dissipation 14 W TCH Channel Temperature 150°C TSTG Storage Temperature -65/+150°C @ 3dB compression Notes: 1. Operating the device beyond any of the above ratings may result in permanent damage or reduction of MTTF. 2. Bias conditions must also satisfy the following equation PT < (TCH –TPKG)/RTH; where TPKG = temperature of package, and PT = (VDS * IDS) – (POUT – PIN). Specifications are subject to change without notice. Excelics Semiconductor, Inc. 310 De Guigne Drive, Sunnyvale, CA 94085 page 1 of 1 Phone: 408-737-1711 Fax: 408-737-1868 Web: www.excelics.com Revised December 2004