74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 D D D D D D Member of the Texas Instruments Widebus Family Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Bus-Hold Inputs Eliminate the Need for External Pullup Resistors Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 5 V, TA = 25°C Distributed VCC and GND Pin Configuration Minimizes High-Speed Switching Noise Packaged in Plastic Thin Shrink Small-Outline (DGG) Package DGG PACKAGE (TOP VIEW) B1 B3 B6 B7 B9 GND B11 B13 B15 VCC A16 A15 A14 GND A13 A12 A11 A10 GND A9 A8 A7 VCC A6 A5 A4 GND A3 A2 A1 EN2 EN1 description The 74ACT16254 is a dual 16-bit, noninverting bus-interface device. The A and C ports perform a transceiver function, like that of the 74ACT245. The B and C ports perform the buffer/driver function of the 74ACT244. The A and C port outputs are designed to sink up to 12 mA. The 74ACT16254 is designed for asynchronous communication between data buses. The control function implementation minimizes external timing requirements. Data transmission from the A port to the C port, C port to A port, or B port to C port is accomplished by setting the appropriate logic levels on the bus enable (EN1 and EN2) inputs. All outputs are disabled when logic highs are placed on both EN1 and EN2; the buses are effectively isolated. The 74ACT16254 is packaged in TI’s thin shrink small-outline package (DGG), which provides twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area. 1 64 2 63 3 62 4 61 5 60 6 59 7 58 8 57 9 56 10 55 11 54 12 53 13 52 14 51 15 50 16 49 17 48 18 47 19 46 20 45 21 44 22 43 23 42 24 41 25 40 26 39 27 38 28 37 29 36 30 35 31 34 32 33 B2 B4 B6 B8 B10 GND B12 B14 B16 VCC C16 C15 C14 GND C13 C12 C11 C10 GND C9 C8 C7 VCC C6 C5 C4 GND C3 C2 C1 NC NC NC – No internal connection Active bus-hold circuitry is provided to hold unused or floating data and I/O pins at a valid logic level. The 74ACT16254 is characterized for operation from – 40°C to 85°C. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Widebus is a trademark of Texas Instruments Incorporated. Copyright 1995, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 FUNCTION TABLE INPUTS OPERATION EN2 EN1 H H Isolation H L B data to C bus L H A data to C bus L L C data to A bus logic diagram, each port (positive logic) EN1 EN2 A1 32 31 35 30 0 B1 2:1 MUX 1 1 To 15 Other Channels 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 C1 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to VCC + 0.5 V Current into any output in the low state, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA Maximum power dissipation at TA = 55°C (in still air) (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils. recommended operating conditions (see Note 3) MIN MAX 4.5 5.5 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage IOH IOL High-level output current VCC –12 mA Low-level output current 12 mA ∆t /∆v Input transition rise or fall rate 10 ns / V 85 °C High-level input voltage 2 V 0.8 Input voltage 0 TA Operating free-air temperature NOTE 3: Unused inputs must be held high or low to prevent them from floating. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 – 40 V V V 3 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VIK VCC = 4.5 V, VCC = 4.5 V, II = –18 mA IOH = –100 µA VOH VCC = 5.5 V, VCC = 4.5 V, IOH = –100 µA IOH = –12 mA VCC = 4.5 V to 5.5 V, VCC = 4.5 V, IOL = 100 µA IOL = 12 mA VCC = 5.5 V, VCC= 4.5 V, VI = VCC or GND VI = 2 V VCC = 4.5 V, VCC = 5.5 V, VI = 0.8 V VO = VCC or GND VCC = 5.5 V, IO = 0, VCC = 5.5 V, Other inputs at VCC or GND VI = VCC or GND One input at 3.4 V, VCC = 5 V, VCC = 5 V, VI = VCC or GND VO = VCC or GND VOL II Ihold h ld IOZ‡ ICC nICC§ Ci TYP† MIN MAX UNIT –1.2 V 3 V 4.2 3 0.1 0.4 ±10 Inputs only A B, A, B or C port –100 V µA µA 100 Cio † All typical values are at TA = 25°C. ‡ The parameter IOZ includes the input-leakage current. § This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. ±20 µA 50 µA 500 µA 3.5 pF 5 pF switching characteristics over recommended ranges of supply voltage and operating free-air temperature, CL = 50 pF (unless otherwise noted) (see Figure 1) TA = 25°C TYP MAX PARAMETER FROM (INPUT) TO (OUTPUT) MIN tpd A or B C 1.5 3.7 6.2 ns tpd C A 1.5 3.3 5.5 ns ten EN1 or EN2 C 1.5 5.3 9.5 ns tdis EN1 or EN2 C 1.5 4.4 8 ns ten EN2 A 1.5 6.2 10.5 ns tdis EN2 A 1.5 4.8 8 ns UNIT operating characteristics, TA = 25°C PARAMETER Cpd 4 Power dissipation dissi ation ca capacitance acitance TEST CONDITIONS Outputs enabled CL = 50 pF F, Outputs disabled POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 f = 10 MHz TYP UNIT 16 pF 2 pF 74ACT16254 16-BIT ADDRESS/DATA MULTIPLEXER WITH 3-STATE OUTPUTS SCAS527A – AUGUST 1995 – NOVEMBER 1995 PARAMETER MEASUREMENT INFORMATION 7V S1 500 Ω From Output Under Test Open GND TEST S1 tpd tPLZ/tPZL tPHZ/tPZH Open 7V GND 500 Ω CL = 50 pF (see Note A) LOAD CIRCUIT tw 3V 3V 1.5 V Timing Input Input 0V 1.5 V 1.5 V 0V tsu th VOLTAGE WAVEFORMS PULSE DURATION 3V Data Input 1.5 V 1.5 V 0V 3V Output Control (low-level enabling) VOLTAGE WAVEFORMS SETUP AND HOLD TIMES 1.5 V 0 tPZL 3V Input 1.5 V 1.5 V 0V tPLH tPHL 1.5 V 1.5 V VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES tPLZ 3.5 V Output Waveform 1 S1 at 7 V (see Note B) 1.5 V tPZH VOH Output 1.5 V Output Waveform 2 S1 at GND (see Note B) VOL + 0.3 V VOL tPHZ 1.5 V VOH VOH – 0.3 V ≈0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. Figure 1. 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