PI74AVC+16244 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 2.5V 16-Bit Buffer Driver with 3-State Outputs Product Features Product Description • PI74AVC+16244 is designed for low-voltage operation, VCC = 1.65V to 3.6V PI74AVC+16244 is a non-inverting 16-bit buffer/driver designed for low-voltage 1.65V to 3.6V VCC operation. • True ±24mA Balanced Drive @ 3.3V The buffer/driver is designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. • Compatible with Philips and T.I. AVC Logic family • IOFF supports partial power-down operation The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides non-inverting outputs and symmetrical active-low output-enable (OE) inputs. • 3.6V I/O Tolerant inputs and outputs • All outputs contain a patented DDC (Dynamic Drive Control) circuit that reduces noise without degrading propagation delay To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor in which the minimum value is determined by the current-sinking capability of the driver. • Industrial operation: –40°C to +85°C • Packaging (Pb-free & Green available): – 48-pin 240-mil wide plastic TSSOP – 48-pin 173-mil wide plastic TVSOP Logic Block Diagram 1OE 1A1 1A2 1A3 1A4 2OE 2A1 2A2 2A3 2A4 06-0164 1 3OE 47 2 46 3 44 5 43 6 1Y1 3A1 1Y2 3A2 1Y3 3A3 1Y4 3A4 48 4OE 41 8 2Y1 40 9 38 11 37 12 4A1 2Y2 4A2 2Y3 4A3 2Y4 4A4 1 25 36 13 35 14 33 16 32 17 3Y1 3Y2 3Y3 3Y4 24 30 19 29 20 27 22 26 23 4Y1 4Y2 4Y3 4Y4 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested.) Product Pin Description Pin Name Supply voltage range, VCC .............................. –0.5V to +4.6V Input voltage range, VI .................................... –0.5V to +4.6V Voltage range applied to any output in the high-impedance or power-off state, VO(1) ........ –0.5V to +4.6V Voltage range applied to any output in the high or low state, VO(1,2) ............................ –0.5V to VCC +0.5V Input clamp current, IIK (VI <0) ..................................... –50mA Output clamp current, IOK (VO <0) ............................... –50mA Continuous output current, IO ..................................... ±50mA Continuous current through each VCC or GND ...........±100mA Package thermal impedance, θJA(3): package A ........... 64°C/W package K .......... 48°C/W Storage Temperature range, Tstg ..................... –65°C to 150°C nOE 3- State Output Enable Inputs (Active LOW) nAx Inputs nYx 3- State Outputs GND Ground VCC Power Product Pin Configuration Notes: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 1. Input & output negative-voltage ratings may be exceeded if the input and output curent rating are observed. 2. Output positive-voltage rating may be exceeded up to 4.6V maximum if the output current rating is observed. 3. The package thermal impedance is calculated in accordance with JESD 51. Truth Table(1) Inputs De s cription 1OE 1 48 2OE 1Y1 2 47 1A1 1Y2 3 46 1A2 GND 4 45 GND 1Y3 5 44 1A3 1Y4 6 43 1A4 VCC 7 42 2Y1 8 41 VCC 2A1 2Y2 9 40 2A2 GND 10 39 GND 2Y3 11 38 2A3 2Y4 12 37 2A4 3Y1 13 36 3A1 3Y2 14 35 3A2 Outputs GND 15 34 GND nOE nAx nYx 3Y3 16 33 3A3 L H H 17 32 L L L 3Y4 VCC 4Y1 18 31 3A4 VCC 19 30 4A1 H X Z 4Y2 20 29 4A2 GND 21 28 GND 4Y3 22 27 4A3 4Y4 23 26 4A4 4OE 24 25 3OE Notes: 1. H = High Signal Level L = Low Signal Level X = Don’t Care or Irrelevant Z = High Impedance 06-0164 2 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Recommended Operating Conditions(1) VCC Supply Voltage M in. M a x. Operating 1.4 3.6 Data retention only 1.2 VCC = 1.2V VIH High- level Input Voltage VCC VCC = 1.4V to 1.6V 0.65 x VCC VCC = 1.65V to 1.95V 0.65 x VCC VCC = 2.3V to 2.7V VCC = 3V to 3.6V 1.7 2 VCC = 1.2V VIL Low- level Input Voltage VI Input Voltage VO Output Voltage IOHS High- level output current IOLS Low- level output current ΔtΔv Input transition rise or fall rate TA Units GND V VCC = 1.4V to 1.6V 0.35 x VCC VCC = 1.65V to 1.95V 0.35 x VCC VCC = 2.3V to 2.7V 0. 7 VCC = 3V to 3.6V 0. 8 0 3 .6 Active State 0 VCC 3- State 0 3.6 VCC = 1.4V to 1.6V –4 VCC = 1.65V to 1.95V –6 VCC = 2.3V to 2.7V – 12 VCC = 3V to 3.6V – 24 mA VCC = 1.4V to 1.6V 4 VCC = 1.65V to 1.95V 6 VCC = 2.3V to 2.7V 12 VCC = 3V to 3.6V 24 VCC = 1.4V to 3.6V 5 ns/V 85 °C Operating free- air temperature –40 Notes: 1. All unused inputs must be held at VCC or GND to ensure proper device operation. 06-0164 3 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 DC Electrical Characteristics (Over the Operating Range, TA = –40°C +85°C) Te s t Conditions (1) Parame te rs IO H = –100μA VO H VO L VCC M in. 1.4V to 3.6V VC C –0.2V IO HS = –4mA VIH = 0.91V 1.4V 1.05 IO HS = –6mA VIH = 1.07V 1.65V 1.2 IO HS = –12mA VIH = 1.7V 2.3V 1.75 IO HS = –24mA VIH = 2V 3V 2. 0 IO LS = 100μA Typ. M ax. 1.4V to 3.6V 0 .2 IO LS = 4mA VIL = 0.49V 1.4V 0 .4 IO LS = 6mA VIL = 0.57V 1.65V 0 . 45 IO LS = 12mA VIL = 0.7V 2.3V 0 . 55 IO LS = 24mA VIL = 0.8V 3V 0.8 II VI = VC C or GND 3 . 6V ± 2.5 IO F F VI or VO = 3.6V 0 ± 10 IO Z VO = VC C or GND 3.6V ± 10 IC C VI = VC C or GND 3 . 6V 40 CI Control Inputs IO = 0 VI = VC C or GND Data Inputs CO Outputs VO = VC C or GND 2.5V 3. 5 3.3V 3. 5 2.5V 6 3.3V 6 2.5V 6. 5 3.3V 6. 5 Units V μA pF Notes: 1. Typical values are measured at TA = 25°C. 06-0164 4 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Switching Characteristics (Over recommended operating free-air temperature range, unless otherwise noted, see Figures 1 thru 4) VCC = 1.5V ± 0.1V From (Input) To (Output) VCC = 1.2V Typ. M in. tpd A Y 3.1 0.6 3 .3 ten OE Y 7 .6 1.4 tdis OE Y 7 .2 1.7 Parame te rs VCC = 1.8V ± 0.15V M ax. M in. VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V M a x. M in. M ax. M in. M a x. 0.7 2.9 0 .6 1.9 0.5 1. 7 8 1.3 6. 8 0. 9 4 .0 0.7 3. 5 7. 3 1.6 6. 2 1.0 4.3 1.0 3.5 Units ns Operating Characteristics, TA= 25°C Parame te rs Cpd Power Dissipation Capacitance 06-0164 Outputs Enabled Outputs Disabled VCC = 1.8V ± 0.15V VCC = 2.5V ± 0.2V VCC = 3.3V ± 0.3V Te s t Conditions Typical Typical Typical CL = 0pF, f = 10 MHz 23 27 33 0. 1 0. 1 0. 1 5 PS8507B Units pF 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 1.2V and 1.5V ±0.1V 2xVCC S1 2Ω From Output Under Test CL = 15pF Open GND 2Ω (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.1V VOL tPHZ VCC/2 VOH –0.1V VOH 0V Voltage Waveforms Enable and Disable Times Figure 1. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. • All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tR ≤ 2.0ns, tF ≤ 2.0ns. • The outputs are measured one at a time with one transition per measurement. • tPLZ and tPHZ are the same as tdis • tPZL and tPZH are the same as ten • tPLH and tPHL are the same as tpd 06-0164 6 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 1.8V ±0.15V 2xVCC S1 12ΩkΩ From Output Under Test CL = 30 15pF Open GND 2Ω 1 kΩ (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.1V 0.15V VOL tPHZ VCC/2 VOH –0.1V 0.15V VOH 0V Voltage Waveforms Enable and Disable Times Figure 2. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. • All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tR ≤ 2.0ns, tF ≤ 2.0ns. • The outputs are measured one at a time with one transition per measurement. • tPLZ and tPHZ are the same as tdis • tPZL and tPZH are the same as ten • tPLH and tPHL are the same as tpd 06-0164 7 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 2.5V ±0.2V 2xVCC S1 500Ω 2Ω From Output Under Test CL =30 15pF Open GND 500Ω 2Ω (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.15V VOL tPHZ VCC/2 VOH –0.15V VOH 0V Voltage Waveforms Enable and Disable Times Figure 3. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. • All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tR ≤ 2.0ns, tF ≤ 2.0ns. • The outputs are measured one at a time with one transition per measurement. • tPLZ and tPHZ are the same as tdis • tPZL and tPZH are the same as ten • tPLH and tPHL are the same as tpd 06-0164 8 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 PARAMETER MEASUREMENT INFORMATION VCC = 3.3V ±0.3V 2xVCC S1 500Ω 2Ω From Output Under Test CL = 30 15pF Open GND 500Ω 2Ω (See Note A) Te s t S1 tpd tPLZ/tPZL tPHZ/tPZH Open 2 x VCC GND Load Circuit VCC Timing Input VCC/2 tW 0V tsu VCC VCC/2 Input th 0V VCC Data Input VCC/2 VCC/2 Voltage Waveforms Pulse Duration 0V Voltage Waveforms Setup and Hold Times Output Control (Low Level Enabling) VCC Input VCC/2 VCC/2 tPLH tPHL VOH VCC /2 VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VCC/2 VOL Voltage Waveforms Propagation Delay Times VCC/2 0V tPZL Output Waveform 1 S1 at 2 x VCC (see Note B) t PZH 0V Output VCC/2 tPLZ VCC VCC/2 VOL +0.1V 0.3V VOL tPHZ VCC/2 VOH –0.1V 0.3V VOH 0V Voltage Waveforms Enable and Disable Times Figure 4. Load Circuit and Voltage Waveforms Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. • All input impulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50Ω, tR ≤ 2.0ns, tF ≤ 2.0ns. • The outputs are measured one at a time with one transition per measurement. • tPLZ and tPHZ are the same as tdis • tPZL and tPZH are the same as ten • tPLH and tPHL are the same as tpd 06-0164 9 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Packaging Mechanical: 48-pin TSSOP (A) 48 .236 .244 1 6.0 6.2 .488 12.4 .496 12.6 .047 1.20 Max SEATING PLANE .004 0.09 .008 0.20 X.XX X.XX DENOTES DIMENSIONS IN MILLIMETERS .0197 BSC 0.50 0.45 .018 0.75 .030 .002 .006 0.05 0.15 .007 .010 0.17 0.27 .319 BSC 8.1 Packaging Mechanical: 48-pin TVSOP (TSSOP) (K) 48 .169 .177 4.30 4.50 .0035 .008 .031 .041 0.80 1.05 1 .378 9.60 .386 9.80 0.09 0.20 0.45 .018 0.75 .030 .252 BSC 6.4 SEATING PLANE .016 BSC 0.40 06-0164 .002 .006 0.05 0.15 .0051 .009 0.13 0.23 10 Max. .047 1.20 PS8507B 05/31/06 PI74AVC+16244 2.5V 16-Bit Buffer Driver with 3-State Outputs 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 12345678901234567890123456789012123456789012345678901234567890121234567890123456789012345678901212345678901234567890123456789012123456789012 Ordering Information Orde ring Code Package Type Package De s cription PI74AVC+16244A A 48- pin, 240- mil wide plastic TSSOP PI74AVC+16244AE A Pb- free & Green, 48- pin, 240- mil wide plastic TSSOP PI74AVC+16244K K 48- pin, 173- mil wide plastic TVSOP PI74AVC+16244KE K Pb- free & Green, 48- pin, 173- mil wide plastic TVSOP Notes: • Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ • E = Pb-free & Green • Adding an X suffix = Tape/Reel Pericom Semiconductor Corporation • 1-800-435-2336 • www.pericom.com 06-0164 11 PS8507B 05/31/06