SSM2602GY N-CHANNEL ENHANCEMENT MODE POWER MOSFET PRODUCT SUMMARY Capable of 2.5V gate drive Lower on-resistance Surface mount package RoHS Compliant S D D BVDSS 20V RDS(ON) 34mΩ ID G 6.3A D SOT-26 D DESCRIPTION Advanced Power MOSFETs utilized advanced processing techniques to achieve the lowest possible on-resistance, extremely efficient and cost-effectiveness device. D G The SOT-26 package is universally used for all commercial–industrial applications. S Pb-free; RoHS-compliant ABSOLUTE MAXIMUM RATINGS Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage ID@TA=25℃ ID@TA=70℃ Rating Units 20 V ±12 V 3 6.3 A 3 5 A Continuous Drain Current , VGS @ 4.5V Continuous Drain Current , VGS @ 4.5V 1,2 IDM Pulsed Drain Current 30 A PD@TA=25℃ Total Power Dissipation 2 W Linear Derating Factor 0.016 W/℃ TSTG Storage Temperature Range -55 to 150 ℃ TJ Operating Junction Temperature Range -55 to 150 ℃ THERMAL DATA Symbol Rthj-a 11/16/2007 Rev.1.00 Parameter Thermal Resistance Junction-ambient 3 www.SiliconStandard.com Max. Value Unit 62.5 ℃/W 1 SSM2602GY ELECTRICAL CHARACTERISTICS o (TJ=25 C unless otherwise specified) Symbol Parameter Test Conditions Min. Typ. 20 - - V - 0.1 - V/℃ VGS=10V, ID=5.5A - - 30 mΩ VGS=4.5V, ID=5.3A - - 34 mΩ VGS=2.5V, ID=2.6A - - 50 mΩ Gate Threshold Voltage VDS=VGS, ID=250uA 0.5 - - V gfs Forward Transconductance VDS=5V, ID=5.3A - 13 - S IDSS Drain-Source Leakage Current (Tj=25oC) VDS=20V, VGS=0V - - 1 uA Drain-Source Leakage Current (Tj=55oC) VDS=16V ,VGS=0V - - 10 uA Gate-Source Leakage VGS= ± 12V - - ±100 nA ID=5.3A - 8.7 16 nC BVDSS Drain-Source Breakdown Voltage ΔBVDSS/ΔTj Breakdown Voltage Temperature Coefficient Reference to 25℃, ID=1mA RDS(ON) VGS(th) IGSS Static Drain-Source On-Resistance 2 VGS=0V, ID=250uA 2 Max. Units Qg Total Gate Charge Qgs Gate-Source Charge VDS=10V - 1.5 - nC Qgd Gate-Drain ("Miller") Charge VGS=4.5V - 3.6 - nC VDS=15V - 6 - ns 2 td(on) Turn-on Delay Time tr Rise Time ID=1A - 14 - ns td(off) Turn-off Delay Time RG=2Ω,VGS=10V - 18.4 - ns tf Fall Time RD=15Ω - 2.8 - ns Ciss Input Capacitance VGS=0V - 603 1085 pF Coss Output Capacitance VDS=15V - 144 - pF Crss Reverse Transfer Capacitance f=1.0MHz - 111 - pF Min. Typ. IS=1.2A, VGS=0V - - 1.2 V IS=5A, VGS=0V, - 16.8 - ns dI/dt=100A/µs - 11 - nC SOURCE-DRAIN DIODE Symbol VSD Parameter Test Conditions 2 Forward On Voltage 2 trr Reverse Recovery Time Qrr Reverse Recovery Charge Max. Units Notes: 1.Pulse width limited by Max. junction temperature. 2.Pulse width <300us , duty cycle <2%. 3.Surface mounted on 1 in2 copper pad of FR4 board ; 156℃/W when mounted on min. copper pad. 11/16/2007 Rev.1.00 www.SiliconStandard.com 2 SSM2602GY 50 80 5.0V T A =25 o C o 40 4.0V 5.0V ID , Drain Current (A) 60 ID , Drain Current (A) T A =150 C 4.5V V G =2.5V 40 20 4.5V 30 4.0V 20 V G =2.5V 10 0 0 0 1 2 3 4 5 6 0 7 1 2 3 4 5 6 7 8 V DS , Drain-to-Source Voltage (V) V DS , Drain-to-Source Voltage (V) Fig 1. Typical Output Characteristics Fig 2. Typical Output Characteristics 100 1.8 I D = 1.0 A I D =5.3A V G =4.5V o T A =25 C Normalized RDS(ON) RDS(ON) (mΩ) 80 60 1.4 1.0 40 0.6 20 1 4 7 -50 10 V GS , Gate-to-Source Voltage (V) Fig 3. On-Resistance v.s. Gate Voltage 100 150 1 1 VGS(th)(V) 1.4 IS (A) 50 Fig 4. Normalized On-Resistance v.s. Junction Temperature 10 T j =150 o C 0 T j , Junction Temperature ( o C) T j =25 o C 0.6 0.1 0.2 0.01 0 0.4 0.8 1.2 1.6 -50 Fig 5. Forward Characteristic of Reverse Diode 11/16/2007 Rev.1.00 0 50 100 150 T j , Junction Temperature ( o C ) V SD , Source-to-Drain Voltage (V) Fig 6. Gate Threshold Voltage v.s. Junction Temperature www.SiliconStandard.com 3 SSM2602GY f=1.0MHz 14 1000 10 8 C (pF) VGS , Gate to Source Voltage (V) C iss I D =5.3A V DS =16V 12 6 C oss 100 C rss 4 2 10 0 0 5 10 15 20 1 25 5 9 13 17 21 25 29 V DS , Drain-to-Source Voltage (V) Q G , Total Gate Charge (nC) Fig 7. Gate Charge Characteristics Fig 8. Typical Capacitance Characteristics 100 1 Normalized Thermal Response (Rthja) Duty factor=0.5 10 ID (A) 1ms 1 10ms 100ms 1s 0.1 T A =25 o C Single Pulse DC 0.01 0.2 0.1 0.1 0.05 PDM 0.01 t T Single Pulse 0.01 Duty factor = t/T Peak Tj = PDM x Rthja + T a Rthja = 156℃/W 0.001 0.1 1 10 100 0.0001 0.001 0.01 V DS , Drain-to-Source Voltage (V) 0.1 1 10 100 1000 t , Pulse Width (s) Fig 9. Maximum Safe Operating Area Fig 10. Effective Transient Thermal Impedance VG VDS 90% QG 4.5V QGS QGD 10% VGS td(on) tr td(off) tf Charge Fig 11. Switching Time Waveform 11/16/2007 Rev.1.00 Q Fig 12. Gate Charge Waveform www.SiliconStandard.com 4 SSM2602GY Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. 11/16/2007 Rev.1.00 www.SiliconStandard.com 5