FAIRCHILD FDMS7600AS

FDMS7600AS
Dual N-Channel PowerTrench® MOSFET
N-Channel: 30 V, 30 A, 7.5 mΩ N-Channel: 30 V, 40 A, 2.8 mΩ
Features
General Description
Q1: N-Channel
This device includes two specialized N-Channel MOSFETs in a
„ Max rDS(on) = 7.5 mΩ at VGS = 10 V, ID = 12 A
dual MLP package.The switch node has been internally
„ Max rDS(on) = 12 mΩ at VGS = 4.5 V, ID = 10 A
connected to enable easy placement and routing of synchronous
buck converters. The control MOSFET (Q1) and synchronous
Q2: N-Channel
SyncFET (Q2) have been designed to provide optimal power
„ Max rDS(on) = 2.8 mΩ at VGS = 10 V, ID = 20 A
efficiency.
„ Max rDS(on) = 3.3 mΩ at VGS = 4.5 V, ID = 18 A
Applications
„ RoHS Compliant
„ Computing
„ Communications
„ General Purpose Point of Load
„ Notebook VCORE
S2
S2
S2
G2
S1/D2
D1
D1
D1
D1
Top
Power 56
G1
Bottom
Q2
4 D1
S2
5
S2
6
3 D1
S2
7
2 D1
G2
8
1 G1
Q1
MOSFET Maximum Ratings TA = 25 °C unless otherwise noted
Symbol
VDS
Drain to Source Voltage
Parameter
VGS
Gate to Source Voltage
Drain Current
ID
Units
V
V
(Note 3)
±20
±20
TC = 25 °C
30
40
-Continuous (Silicon limited)
TC = 25 °C
50
120
-Continuous
TA = 25 °C
121a
221b
40
60
TA = 25 °C
2.21a
2.51b
TA = 25 °C
1.01c
1.01d
-Pulsed
TJ, TSTG
Q2
30
-Continuous (Package limited)
Power Dissipation for Single Operation
PD
Q1
30
Operating and Storage Junction Temperature Range
-55 to +150
A
W
°C
Thermal Characteristics
Thermal Resistance, Junction to Ambient
571a
501b
RθJA
Thermal Resistance, Junction to Ambient
1251c
1201d
RθJC
Thermal Resistance, Junction to Case
3.5
2
RθJA
°C/W
Package Marking and Ordering Information
Device Marking
FDMS7600AS
Device
FDMS7600AS
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
Package
Power 56
1
Reel Size
13 ”
Tape Width
12 mm
Quantity
3000 units
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
December 2009
Symbol
Parameter
Test Conditions
Type
Min
30
30
Typ
Max
Units
Off Characteristics
BVDSS
Drain to Source Breakdown Voltage
ID = 250 µA, VGS = 0 V
ID = 1 mA, VGS = 0 V
Q1
Q2
∆BVDSS
∆TJ
Breakdown Voltage Temperature
Coefficient
ID = 250 µA, referenced to 25 °C
ID = 1 mA, referenced to 25 °C
Q1
Q2
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
Q1
Q2
1
500
µA
µA
IGSS
Gate to Source Leakage Current
VGS = 20 V, VDS= 0 V
Q1
Q2
100
100
nA
nA
3
3
V
V
15
18
mV/°C
On Characteristics
VGS(th)
Gate to Source Threshold Voltage
VGS = VDS, ID = 250 µA
VGS = VDS, ID = 1 mA
Q1
Q2
∆VGS(th)
∆TJ
Gate to Source Threshold Voltage
Temperature Coefficient
ID = 250 µA, referenced to 25 °C
ID = 1 mA, referenced to 25 °C
Q1
Q2
-6
-5
VGS = 10 V, ID = 12 A
VGS = 4.5 V, ID = 10 A
VGS = 10 V, ID = 12 A , TJ = 125 °C
Q1
6.0
8.5
8.3
7.5
12
12
VGS = 10 V, ID = 20 A
VGS = 4.5 V, ID = 18 A
VGS = 10 V, ID = 20 A , TJ = 125 °C
Q2
2.2
2.6
2.6
2.8
3.3
3.8
VDS = 5 V, ID = 12 A
VDS = 5 V, ID = 20 A
Q1
Q2
63
190
Q1:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Q1
Q2
1315
5265
1750
7005
pF
Q1
Q2
445
2150
600
2860
pF
Q1
Q2
45
200
70
300
pF
Q1
Q2
0.9
0.3
rDS(on)
gFS
Drain to Source On Resistance
Forward Transconductance
1
1
1.8
1.5
mV/°C
mΩ
S
Dynamic Characteristics
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Rg
Gate Resistance
Q2:
VDS = 15 V, VGS = 0 V, f = 1 MHZ
Ω
Switching Characteristics
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Qg
Total Gate Charge
Qg
Total Gate Charge
Qgs
Gate to Source Gate Charge
Qgd
Gate to Drain “Miller” Charge
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
Q1:
VDD = 15 V, ID = 12 A,
VGS = 10 V, RGEN = 6 Ω
Q2:
VDD = 15 V, ID = 20 A,
VGS = 10 V, RGEN = 6 Ω
VGS = 0 V to 10 V Q1
VDD = 15 V,
VGS = 0 V to 4.5 V ID = 12 A
Q2
VDD = 15 V,
ID = 20 A
2
Q1
Q2
8.6
18
18
32
ns
Q1
Q2
2.5
7.6
10
16
ns
Q1
Q2
20
45
32
72
ns
Q1
Q2
2.3
5.2
10
10
ns
Q1
Q2
20
81
28
113
nC
Q1
Q2
9.3
37
13
52
nC
Q1
Q2
4.3
13
nC
Q1
Q2
2.2
9.6
nC
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
Symbol
Parameter
Test Conditions
Type
Min
Typ
Max
Units
Q1
Q2
0.8
0.7
1.2
1.2
V
Q1
Q2
27
47
43
75
ns
Q1
Q2
10
80
18
128
nC
Drain-Source Diode Characteristics
VSD
Source to Drain Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
VGS = 0 V, IS = 12 A
VGS = 0 V, IS = 20 A
(Note 2)
(Note 2)
Q1
IF = 12 A, di/dt = 100 A/µs
Q2
IF = 20 A, di/dt = 300 A/µs
Notes:
1: RθJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RθJC is guaranteed by design while RθCA is determined
by the user's board design.
b. 50 °C/W when mounted on
a 1 in2 pad of 2 oz copper
a. 57 °C/W when mounted on
a 1 in2 pad of 2 oz copper
c. 125 °C/W when mounted on a
minimum pad of 2 oz copper
d. 120 °C/W when mounted on a
minimum pad of 2 oz copper
2: Pulse Test: Pulse Width < 300 µs, Duty cycle < 2.0%.
3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied.
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
3
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Electrical Characteristics TJ = 25 °C unless otherwise noted
40
4
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
ID, DRAIN CURRENT (A)
VGS = 10 V
VGS = 6 V
30
VGS = 4.5 V
VGS = 4 V
20
10
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
VGS = 3.5 V
0
0.0
0.5
1.0
1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
3
VGS = 3.5 V
VGS = 4 V
2
VGS = 4.5 V
1
VGS = 6 V
0
2.0
0
Figure 1. On Region Characteristics
30
40
40
ID = 12 A
VGS = 10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
-75
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
10
20
ID, DRAIN CURRENT (A)
Figure 2. Normalized On-Resistance
vs Drain Current and Gate Voltage
1.6
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
30
ID = 12 A
20
TJ = 125 oC
10
TJ = 25 oC
0
-50
2
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
4
6
8
10
VGS, GATE TO SOURCE VOLTAGE (V)
Figure 3. Normalized On Resistance
vs Junction Temperature
Figure 4. On-Resistance vs Gate to
Source Voltage
40
40
IS, REVERSE DRAIN CURRENT (A)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
ID, DRAIN CURRENT (A)
VGS = 10 V
30
VDS = 5 V
TJ = 150 oC
20
TJ = 25 oC
10
TJ = -55 oC
0
1.5
2.0
2.5
3.0
3.5
1
TJ = 150 oC
TJ = 25 oC
0.1
0.01
TJ = -55 oC
0.001
0.0
4.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
VGS = 0 V
10
Figure 6. Source to Drain Diode
Forward Voltage vs Source Current
4
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
VGS, GATE TO SOURCE VOLTAGE (V)
10
2000
ID = 12 A
1000
Ciss
8
CAPACITANCE (pF)
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
Coss
100
2
Crss
f = 1 MHz
VGS = 0 V
0
0
5
10
15
10
0.1
20
Figure 7. Gate Charge Characteristics
10
30
Figure 8. Capacitance vs Drain
to Source Voltage
60
100
o
RθJC = 3.5 C/W
100us
ID, DRAIN CURRENT (A)
VGS = 10 V
ID, DRAIN CURRENT (A)
1
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
40
VGS = 4.5 V
20
Limited by Package
10
1 ms
1
0.1
10 ms
THIS AREA IS
LIMITED BY rDS(on)
100 ms
SINGLE PULSE
TJ = MAX RATED
1s
10s
RθJA = 125 oC/W
DC
TA = 25 oC
0
25
50
75
100
125
0.01
0.01
150
o
TC, CASE TEMPERATURE ( C)
0.1
1
10
100 200
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 9. Maximum Continuous Drain Current vs
Case Temperature
Figure 10. Forward Bias Safe Operating Area
P(PK), PEAK TRANSIENT POWER (W)
1000
SINGLE PULSE
o
RθJA = 125 C/W
o
TA = 25 C
100
10
1
0.5
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (s)
Figure 11. Single Pulse Maximum Power Dissipation
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
5
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
SINGLE PULSE
t2
o
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
RθJA = 125 C/W
(Note 1c)
0.001
-4
10
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure 12. Junction-to-Ambient Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
6
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q1 N-Channel) TJ = 25 °C unless otherwise noted
25 oC unlenss otherwise noted
60
3
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 10 V
ID, DRAIN CURRENT (A)
VGS = 6 V
40
VGS = 4.5 V
VGS = 3.5 V
VGS = 3 V
20
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
0.0
0.1
0.2
0.3
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 3.5 V
VGS = 4.5 V
VGS = 6 V
VGS = 10 V
1
0
0
20
40
60
ID, DRAIN CURRENT (A)
Figure 14. Normalized on-Resistance vs Drain
Current and Gate Voltage
1.6
10
ID = 20 A
VGS = 10 V
rDS(on), DRAIN TO
1.4
1.2
1.0
0.8
0.6
-75
-50
SOURCE ON-RESISTANCE (mΩ)
NORMALIZED
DRAIN TO SOURCE ON-RESISTANCE
VGS = 3 V
2
0.4
Figure 13. On-Region Characteristics
60
4
TJ = 125 oC
2
TJ = 25 oC
4
6
8
10
60
IS, REVERSE DRAIN CURRENT (A)
TJ = 125 oC
20
TJ = 25 oC
TJ = -55 oC
2.5
VGS = 0 V
10
TJ = 125 oC
1
TJ = 25 oC
TJ = -55 oC
0.1
0.01
0.0
3.0
VGS, GATE TO SOURCE VOLTAGE (V)
0.2
0.4
0.6
0.8
1.0
1.2
VSD, BODY DIODE FORWARD VOLTAGE (V)
Figure 17. Transfer Characteristics
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
6
Figure 16. On-Resistance vs Gate to
Source Voltage
40
2.0
ID = 20 A
VGS, GATE TO SOURCE VOLTAGE (V)
VDS = 5 V
1.5
8
2
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
1.0
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
0
-25
0
25 50 75 100 125 150
TJ, JUNCTION TEMPERATURE (oC)
Figure 15. Normalized On-Resistance
vs Junction Temperature
ID, DRAIN CURRENT (A)
PULSE DURATION = 80 µs
DUTY CYCLE = 0.5% MAX
Figure 18. Source to Drain Diode
Forward Voltage vs Source Current
7
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ =
10000
10
VGS, GATE TO SOURCE VOLTAGE (V)
ID = 20A
Ciss
CAPACITANCE (pF)
8
VDD = 10 V
6
VDD = 15 V
4
VDD = 20 V
Coss
1000
2
f = 1 MHz
VGS = 0 V
0
30
60
Crss
100
0.1
0
90
1
10
30
VDS, DRAIN TO SOURCE VOLTAGE (V)
Qg, GATE CHARGE (nC)
Figure 20. Capacitance vs Drain
to Source Voltage
Figure 19. Gate Charge Characteristics
150
100
o
RθJC = 2 C/W
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 10 V
120
90
VGS = 4.5 V
60
30
Limited by Package
0
25
50
10
1
0.1
1 ms
10 ms
THIS AREA IS
LIMITED BY rDS(on)
100 ms
1s
SINGLE PULSE
TJ = MAX RATED
10s
RθJA = 120 oC/W
DC
TA = 25 oC
75
100
125
0.01
0.01
150
o
TC, CASE TEMPERATURE ( C)
0.1
1
100 200
10
VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 21. Maximun Continuous Drain
Current vs Case Temperature
Figure 22. Forward Bias Safe Operating Area
P(PK), PEAK TRANSIENT POWER (W)
1000
SINGLE PULSE
o
RθJA = 120 C/W
o
TA = 25 C
100
10
1
0.5
-3
10
-2
10
-1
10
1
10
100
1000
t, PULSE WIDTH (s)
Figure 23. Single Pulse Maximum Power Dissipation
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
8
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N-Channel) TJ = 25 oC unless otherwise noted
2
NORMALIZED THERMAL
IMPEDANCE, ZθJA
1
0.1
TJ = 25 oC unless otherwise noted
DUTY CYCLE-DESCENDING ORDER
D = 0.5
0.2
0.1
0.05
0.02
0.01
PDM
t1
0.01
t2
SINGLE PULSE
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJA x RθJA + TA
o
RθJA = 120 C/W
(Note 1d)
0.001
-3
10
-2
10
-1
10
1
10
100
1000
t, RECTANGULAR PULSE DURATION (sec)
Figure24. Junction-to-Ambient Transient Thermal Response Curve
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
9
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (Q2 N_Channel)
SyncFET Schottky body diode
Characteristics
Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power
in the device.
Fairchild’s SyncFET process embeds a Schottky diode in parallel
with PowerTrench MOSFET. This diode exhibits similar
characteristics to a discrete external Schottky diode in parallel
with a MOSFET. Figure 25 shows the reverse recovery
characteristic of the FDMS7600AS.
-1
IDSS, REVERSE LEAKAGE CURRENT (A)
15
CURRENT (A)
10
didt = 300 A/µs
5
0
-5
150
200
250
300
TJ = 125 oC
-2
10
-3
10
TJ = 100 oC
-4
10
-5
10
TJ = 25 oC
-6
10
0
5
10
15
20
25
30
VDS, REVERSE VOLTAGE (V)
TIME (ns)
Figure 25. FDMS7600AS SyncFET body
diode reverse recovery characteristic
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
10
Figure 26. SyncFET body diode reverse
leakage versus drain-source voltage
10
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Typical Characteristics (continued)
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
Dimensional Outline and Pad Layout
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
11
www.fairchildsemi.com
tm
tm
tm
*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b) support or sustain life,
and (c) whose failure to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably
expected to result in a significant injury of the user.
2.
A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.
ANTI-COUNTERFEITING POLICY
Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support.
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their
parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed
application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild
Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild
Distributors are genuine parts, have full traceability, meet Fairchild’s quality standards for handing and storage and provide access to Fairchild’s full range of
up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and
warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is
committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative / In Design
Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.
Preliminary
First Production
Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.
No Identification Needed
Full Production
Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.
Obsolete
Not In Production
Datasheet contains specifications on a product that is discontinued by Fairchild
Semiconductor. The datasheet is for reference information only.
Rev. I41
©2009 Fairchild Semiconductor Corporation
FDMS7600AS Rev.C
12
www.fairchildsemi.com
FDMS7600AS Dual N-Channel PowerTrench® MOSFET
TRADEMARKS
The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not
intended to be an exhaustive list of all such trademarks.
AccuPower™
PowerTrench®
FPS™
The Power Franchise®
Auto-SPM™
F-PFS™
PowerXS™
®
Build it Now™
FRFET®
Programmable Active Droop™
CorePLUS™
Global Power ResourceSM
QFET®
TinyBoost™
Green FPS™
QS™
CorePOWER™
TinyBuck™
Green FPS™ e-Series™
Quiet Series™
CROSSVOLT™
TinyCalc™
Gmax™
RapidConfigure™
CTL™
TinyLogic®
Current Transfer Logic™
GTO™
TINYOPTO™
EcoSPARK®
IntelliMAX™
™
TinyPower™
EfficentMax™
Saving our world, 1mW /W /kW at a time™
ISOPLANAR™
TinyPWM™
EZSWITCH™*
SmartMax™
MegaBuck™
TinyWire™
™*
SMART START™
MICROCOUPLER™
TriFault Detect™
SPM®
MicroFET™
TRUECURRENT™*
STEALTH™
MicroPak™
®
SuperFET™
MillerDrive™
®
Fairchild
SuperSOT™-3
MotionMax™
Fairchild Semiconductor®
SuperSOT™-6
UHC®
Motion-SPM™
FACT Quiet Series™
Ultra FRFET™
SuperSOT™-8
OPTOLOGIC®
®
FACT
OPTOPLANAR®
UniFET™
SupreMOS™
®
®
FAST
VCX™
SyncFET™
FastvCore™
VisualMax™
Sync-Lock™
FETBench™
XS™
®*
PDP
SPM™
®
FlashWriter *
Power-SPM™