NSC 74F280SJ

54F/74F280
9-Bit Parity Generator/Checker
General Description
Features
The ’F280 is a high-speed parity generator/checker that accepts nine bits of input data and detects whether an even or
an odd number of these inputs is HIGH. If an even number
of inputs is HIGH, the Sum Even output is HIGH. If an odd
number is HIGH, the Sum Even output is LOW. The Sum
Odd output is the complement of the Sum Even output.
Y
Commercial
Guaranteed 4000V minimum ESD protection
Package
Number
Military
Package Description
N14A
14-Lead (0.300× Wide) Molded Dual-In-Line
J14A
14-Lead Ceramic Dual-In-Line
74F280SC (Note 1)
M14A
14-Lead (0.150× Wide) Molded Small Outline, JEDEC
74F280SJ (Note 1)
M14D
14-Lead (0.300× Wide) Molded Small Outline, EIAJ
54F280FM (Note 2)
W14B
14-Lead Cerpack
54F280LM (Note 2)
E20A
20-Lead Ceramic Leadless Chip Carrier, Type C
74F280PC
54F280DM (Note 2)
Note 1: Devices also available in 13× reel. Use suffix e SCX and SJX.
Note 2: Military grade device with environmental and burn-in processing. Use suffix e DMQB, FMQB and LMQB.
Logic Symbols
Connection Diagrams
Pin Assignment for
DIP, SOIC and Flatpak
Pin Assignment
for LCC
TL/F/9512–3
IEEE/IEC
TL/F/9512 – 1
TL/F/9512 – 2
TL/F/9512–5
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.
C1995 National Semiconductor Corporation
TL/F/9512
RRD-B30M115/Printed in U. S. A.
54F/74F280 9-Bit Parity Generator/Checker
August 1995
Unit Loading/Fan Out
54F/74F
Pin Names
I0 – I 8
RO
RE
Description
U.L.
HIGH/LOW
Input IIH/IIL
Output IOH/IOL
Data Inputs
Odd Parity Output
Even Parity Output
1.0/1.0
50/33.3
50/33.3
20 mA/b0.6 mA
b 1 mA/20 mA
b 1 mA/20 mA
Truth Table
Number of
HIGH Inputs
I0 – I8
Outputs
R Even
R Odd
H
L
L
H
0, 2, 4, 6, 8
1, 3, 5, 7, 9
H e HIGH Voltage Level
L e LOW Voltage Level
Logic Diagram
TL/F/9512 – 4
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
2
Absolute Maximum Ratings (Note 1)
Recommended Operating
Conditions
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales
Office/Distributors for availability and specifications.
Storage Temperature
b 65§ C to a 150§ C
Ambient Temperature under Bias
Junction Temperature under Bias
Plastic
b 55§ C to a 125§ C
Free Air Ambient Temperature
Military
Commercial
b 55§ C to a 125§ C
0§ C to a 70§ C
Supply Voltage
Military
Commercial
b 55§ C to a 175§ C
b 55§ C to a 150§ C
a 4.5V to a 5.5V
a 4.5V to a 5.5V
VCC Pin Potential to
Ground Pin
b 0.5V to a 7.0V
b 0.5V to a 7.0V
Input Voltage (Note 2)
b 30 mA to a 5.0 mA
Input Current (Note 2)
Voltage Applied to Output
in HIGH State (with VCC e 0V)
b 0.5V to VCC
Standard Output
b 0.5V to a 5.5V
TRI-STATEÉ Output
Current Applied to Output
in LOW State (Max)
twice the rated IOL (mA)
ESD Last Passing Voltage (Min)
4000V
Note 1: Absolute maximum ratings are values beyond which the device may
be damaged or have its useful life impaired. Functional operation under
these conditions is not implied.
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
54F/74F
Parameter
Min
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VCD
Input Clamp Diode Voltage
VOH
Output HIGH
Voltage
54F 10% VCC
74F 10% VCC
74F 5% VCC
VOL
Output LOW
Voltage
54F 10% VCC
74F 10% VCC
IIH
Input HIGH Current
IBVI
Typ
Units
VCC
Conditions
Max
2.0
V
Recognized as a HIGH Signal
0.8
V
b 1.2
V
Min
IIN e b18 mA
V
Min
IOH e b1 mA
IOH e b1 mA
IOH e b1 mA
0.5
0.5
V
Min
IOL e 20 mA
IOL e 20 mA
54F
74F
20.0
5.0
mA
Max
VIN e 2.7V
Input HIGH Current
Breakdown Test
54F
74F
100
7.0
mA
Max
VIN e 7.0V
ICEX
Output HIGH
Leakage Current
54F
74F
250
50
mA
Max
VOUT e VCC
VID
Input Leakage Test
V
0.0
IID e 1.9 mA
All Other Pins Grounded
IOD
Output Leakage
Circuit Current
3.75
mA
0.0
VIOD e 150 mV
All Other Pins Grounded
IIL
Input LOW Current
IOS
Output Short-Circuit Current
ICCH
Power Supply Current
74F
2.5
2.5
2.7
4.75
74F
b 60
25
3
Recognized as a LOW Signal
b 0.6
mA
Max
VIN e 0.5V
b 150
mA
Max
VOUT e 0V
38
mA
Max
VO e HIGH
AC Electrical Characteristics
Symbol
Parameter
74F
54F
74F
TA e a 25§ C
VCC e a 5.0V
CL e 50 pF
TA, VCC e Mil
CL e 50 pF
TA, VCC e Com
CL e 50 pF
Units
Min
Typ
Max
Min
Max
Min
Max
tPLH
tPHL
Propagation Delay
In to RE
6.5
6.5
10.0
11.0
15.0
16.0
6.5
6.5
20.0
21.0
6.5
6.5
16.0
17.0
ns
tPLH
tPHL
Propagation Delay
In to RO
6.0
6.5
10.0
11.0
15.0
16.0
5.0
6.5
20.0
21.0
6.0
6.5
16.0
17.0
ns
Ordering Information
The device number is used to form part of a simplified purchasing code where the package type and temperature range are
defined as follows:
74F
280
S
Temperature Range Family
74F e Commercial
54F e Military
C
X
Special Variations
QB e Military grade device with
environmental and burn-in
processing
X e Devices shipped in 13× reel
Device Type
Package Code
P e Plastic DIP
D e Ceramic DIP
F e Flatpak
L e Leadless Chip Carrier (LCC)
S e Small Outline SOIC JEDEC
SJ e Small Outline SOIC EIAJ
Temperature Range
C e Commercial (0§ C to a 70§ C)
M e Military (b55§ C to a 125§ C)
4
Physical Dimensions inches (millimeters)
20-Lead Ceramic Leadless Chip Carrier (L)
NS Package Number E20A
5
Physical Dimensions inches (millimeters) (Continued)
14-Lead Ceramic Dual-In-Line Package (D)
NS Package Number J14A
14-Lead (0.150× Wide) Molded Small Outline Package, JEDEC (S)
NS Package Number M14A
6
Physical Dimensions inches (millimeters) (Continued)
14-Lead (0.300× Wide) Molded Small Outline Package, EIAJ (SJ)
NS Package Number M14D
14-Lead (0.300× Wide) Molded Dual-In-Line Package (P)
NS Package Number N14A
7
54F/74F280 9-Bit Parity Generator/Checker
Physical Dimensions inches (millimeters) (Continued)
14-Lead Ceramic Flatpak (F)
NS Package Number W14B
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