KERSEMI SIHFB16N60L-E3

IRFB16N60L, SiHFB16N60L
Power MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
• Super Fast Body Diode Eliminates the Need for
External Diodes in ZVS Applications
600
RDS(on) (Ω)
VGS = 10 V
0.385
• Lower Gate Charge Results in Simpler Drive
Requirements
Available
RoHS*
COMPLIANT
Qg (Max.) (nC)
100
Qgs (nC)
30
Qgd (nC)
46
• Enhanced dV/dt Capabilities Offer Improved Ruggedness
Single
• Higher Gate Voltage Threshold Offers Improved Noise
Immunity
Configuration
D
• Lead (Pb)-free Available
TO-220
APPLICATIONS
G
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
S
G
D
S
• Uninterruptible Power Supplies
N-Channel MOSFET
• Motor Control Applications
ORDERING INFORMATION
Package
TO-220
IRFB16N60LPbF
SiHFB16N60L-E3
IRFB16N60L
SiHFB16N60L
Lead (Pb)-free
SnPb
ABSOLUTE MAXIMUM RATINGS TC = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
LIMIT
VDS
VGS
600
± 30
16
10
60
2.5
310
16
31
310
10
- 55 to + 150
300d
10
1.1
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
VGS at 10 V
Pulsed Drain Currenta
Linear Derating Factor
Single Pulse Avalanche Energyb
Avalanche Currenta
Repetitive Avalanche Energya
Maximum Power Dissipation
Peak Diode Recovery dV/dtc
Operating Junction and Storage Temperature Range
Soldering Recommendations (Peak Temperature)
Mounting Torque
TC = 25 °C
TC = 100 °C
ID
IDM
TC = 25 °C
EAS
IAR
EAR
PD
dV/dt
TJ, Tstg
for 10 s
6-32 or M3 screw
UNIT
V
A
W/°C
mJ
A
mJ
W
V/ns
°C
lbf · in
N·m
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Starting TJ = 25 °C, L = 2.5 mH, RG = 25 Ω, IAS =16 A, dV/dt = 10 V/ns (see fig. 12a).
c. ISD ≤ 16 A, dI/dt ≤ 340 A/µs, VDD ≤ VDS, TJ ≤ 150 °C.
d. 1.6 mm from case.
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IRFB16N60L, SiHFB16N60L
THERMAL RESISTANCE RATINGS
PARAMETER
SYMBOL
TYP.
MAX.
Maximum Junction-to-Ambient
RthJA
-
62
Maximum Junction-to-Case (Drain)
RthJC
-
0.4
UNIT
°C/W
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
Static
Drain-Source Breakdown Voltage
VDS Temperature Coefficient
Gate-Source Threshold Voltage
VDS
VGS = 0 V, ID = 250 µA
600
-
-
V
ΔVDS/TJ
Reference to 25 °C, ID = 1 mA
-
0.39
-
V/°C
VGS(th)
VDS = VGS, ID = 250 µA
3.0
-
5.0
V
Gate-Source Leakage
IGSS
VGS = ± 30 V
-
-
± 100
nA
Zero Gate Voltage Drain Current
IDSS
VDS = 600 V, VGS = 0 V
-
-
50
µA
VDS = 480 V, VGS = 0 V, TJ = 125 °C
-
-
2.0
mA
-
0.385
0.460
Ω
VDS = 50 V, ID = 9.0 A
8.3
-
-
S
VGS = 0 V,
VDS = 25 V,
f = 1.0 MHz, see fig. 5
-
2720
-
-
26
-
-
20
-
-
120
-
-
100
-
-
-
100
-
-
30
-
-
46
-
20
-
-
44
-
-
28
-
-
5.5
-
-
-
16
-
-
60
Drain-Source On-State Resistance
RDS(on)
Forward Transconductance
gfs
ID = 9.0 Ab
VGS = 10 V
Dynamic
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
Effective Output Capacitance
Coss eff.
Effective Output Capacitance
(Energy Related)
Coss eff. (ER)
Total Gate Charge
VGS = 0 V
VDS = 0 V to 480 Vc
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Turn-On Delay Time
td(on)
Rise Time
tr
Turn-Off Delay Time
td(off)
Fall Time
ID = 16 A, VDS = 480 V,
see fig. 7 and 15b
VGS = 10 V
VDD = 300 V, ID = 16 A,
RG = 1.8 Ω,
see fig. 11a and 11bb
tf
pF
nC
ns
Drain-Source Body Diode Characteristics
Continuous Source-Drain Diode Current
Pulsed Diode Forward Currenta
Body Diode Voltage
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
Body Diode Reverse Recovery Charge
Body Diode Reverse Recovery Current
Forward Turn-On Time
IS
ISM
VSD
MOSFET symbol
showing the
integral reverse
p - n junction diode
D
A
G
TJ = 25 °C, IS = 16 A, VGS = 0
S
Vb
-
-
1.5
-
130
200
-
240
360
trr
TJ = 25 °C, IF = 16 A,
TJ = 125 °C, dI/dt = 100 A/µsb
Qrr
TJ = 25 °C, IS = 16 A,
TJ = 125 °C, dI/dt = 100 A/µsb
-
450
670
-
1080
1620
TJ = 25 °C
-
5.8
8.7
IRRM
ton
Intrinsic turn-on time is negligible (turn-on is dominated by LS and LD)
Notes
a. Repetitive rating; pulse width limited by maximum junction temperature (see fig. 11).
b. Pulse width ≤ 300 µs; duty cycle ≤ 2 %.
c. Coss eff. is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80 % VDS.
Coss eff. (ER) is a fixed capacitance that stores the same energy as Coss whil VDS is rising from 0 to 80 % VDS.
2
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V
ns
nC
A
IRFB16N60L, SiHFB16N60L
TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
1000
1000
10
BOTTOM
ID, Drain-to-Source Current (Α)
ID, Drain-to-Source Current (A)
TOP
100
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
5.0V
1
5.0V
0.1
0.01
100
T J = 150°C
10
1
T J = 25°C
0.1
VDS = 50V
20μs PULSE WIDTH
20μs PULSE WIDTH
Tj = 25°C
0.001
0.01
0.1
1
10
100
4
VDS, Drain-to-Source Voltage (V)
Fig. 1 - Typical Output Characteristics
8
10
12
14
16
VGS , Gate-to-Source Voltage (V)
Fig. 3 - Typical Transfer Characteristics
3.0
10
BOTTOM
5.0V
1
0.1
20μs PULSE WIDTH
Tj = 150°C
ID = 15A
2.5
VGS = 10V
2.0
(Normalized)
TOP
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
5.0V
RDS(on) , Drain-to-Source On Resistance
100
ID, Drain-to-Source Current (A)
6
1.5
1.0
0.5
0.0
0.01
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig. 2 - Typical Output Characteristics
-60 -40 -20
0
20
40
60
80 100 120 140 160
T J , Junction Temperature (°C)
Fig. 4 - Normalized On-Resistance vs. Temperature
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IRFB16N60L, SiHFB16N60L
100000
12.0
VGS = 0V,
f = 1 MHZ
Ciss = C gs + Cgd, C ds SHORTED
Crss = Cgd
VGS , Gate-to-Source Voltage (V)
10000
ID= 15A
Coss = Cds + Cgd
C, Capacitance(pF)
Ciss
1000
Coss
100
Crss
10
10.0
VDS= 120V
8.0
6.0
4.0
2.0
0.0
1
1
10
100
0
1000
10
20
30
40
50
60
70
VDS, Drain-to-Source Voltage (V)
Q G Total Gate Charge (nC)
Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage
Fig. 7 - Typical Source-Drain Diode Forward Voltage
25
100.00
ISD, Reverse Drain Current (A)
Energy (μJ)
20
15
10
5
T J = 150°C
10.00
T J = 25°C
1.00
VGS = 0V
0
0.10
0
100
200
300
400
500
600
700
VDS, Drain-to-Source Voltage (V)
Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage
4
VDS= 480V
VDS= 300V
0.2
0.4
0.6
0.8
1.0
1.2
1.4
VSD, Source-to-Drain Voltage (V)
Fig. 8 - Maximum Safe Operating Area
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1.6
IRFB16N60L, SiHFB16N60L
18
ID, Drain-to-Source Current (A)
1000
OPERATION IN THIS AREA
LIMITED BY R DS(on)
16
14
ID, Drain Current (A)
100
10
100μsec
1msec
1
12
10
8
6
4
Tc = 25°C
Tj = 150°C
Single Pulse
2
10msec
0
0.1
1
10
100
1000
10000
25
VDS, Drain-to-Source Voltage (V)
Fig. 9 - Maximum Safe Operating Area
VDS
50
75
100
125
150
T C , Case Temperature (°C)
Fig. 10 - Maximum Darin Current vs. Case Temperature
RD
VDS
90 %
VGS
D.U.T.
RG
+
- VDD
10 %
VGS
10 V
Pulse width ≤ 1 µs
Duty factor ≤ 0.1 %
td(on)
Fig. 11a - Switching Time Test Circuit
td(off) tf
tr
Fig. 11b - Switching Time Waveforms
Thermal Response ( Z thJC )
1
D = 0.50
0.1
0.20
0.10
0.05
P DM
0.01
0.02
0.01
t1
t2
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty factor D =
2. Peak T
t1/ t 2
J = P DM x Z thJC
+T C
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig. 12 - Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFB16N60L, SiHFB16N60L
15 V
VGS(th) Gate threshold Voltage (V)
5.0
4.5
4.0
Driver
L
VDS
D.U.T.
RG
+
A
- VDD
IAS
3.5
20 V
tp
ID = 250μA
0.01 Ω
Fig. 14b - Unclamped Inductive Test Circuit
3.0
VDS
2.5
tp
2.0
-75
-50 -25
0
25
50
75
100 125 150 175
T J , Temperature ( °C )
Fig. 13 - Threshold Voltage vs. Temperature
IAS
Fig. 14c - Unclamped Inductive Waveforms
QG
VGS
EAS , Single Pulse Avalanche Energy (mJ)
600
QGS
ID
TOP
7.2A
10A
BOTTOM 16A
500
QGD
VG
400
Charge
Fig. 15a - Basic Gate Charge Waveform
300
Current regulator
Same type as D.U.T.
200
50 kΩ
100
12 V
0.2 µF
0.3 µF
+
0
D.U.T.
25
50
75
100
125
-
VDS
150
Starting T J , Junction Temperature (°C)
VGS
3 mA
IG
ID
Current sampling resistors
Fig. 14a - Maximum Avalanche Energy vs. Drain Current
6
Fig. 15b - Gate Charge Test Circuit
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IRFB16N60L, SiHFB16N60L
Peak Diode Recovery dV/dt Test Circuit
+
D.U.T.
Circuit layout considerations
• Low stray inductance
• Ground plane
• Low leakage inductance
current transformer
+
-
-
RG
•
•
•
•
dV/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by duty factor "D"
D.U.T. - device under test
Driver gate drive
P.W.
+
Period
D=
+
-
VDD
P.W.
Period
VGS = 10 V*
D.U.T. ISD waveform
Reverse
recovery
current
Body diode forward
current
dI/dt
D.U.T. VDS waveform
Diode recovery
dV/dt
Re-applied
voltage
VDD
Body diode forward drop
Inductor current
Ripple ≤ 5 %
ISD
* VGS = 5 V for logic level devices
Fig. 16 - For N-Channel
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