TGA4803 DC to >50 GHz MPA with AGC Key Features and Performance • • • • 0.15um pHEMT Technology DC to >50GHz Linear BW 8dB Gain, 14dBm @ P1dB Group Delay Ripple +/- 6ps to 50 GHz • <10ps Edge Rates (20/80) • • • 3.5Vpp 43Gb/s NRZ PRBS Bias: Vd=6.5V, 100mA Chip Size: 1.90 x 1.09 x 0.10 mm Primary Applications • Test Equipment Description • Ultra Wideband The TriQuint TGA4803 is a medium power wideband AGC amplifier that typically provides 8dB small signal gain with 3dB AGC range. Typical input and output return loss is >10dB. Typical Noise Figure is 5dB at 3GHz. Typical saturated output power is 17dBm. Small signal 3dB BW is >50GHz. RF ports are DC coupled enabling the user to customize system corner frequencies. • 43Gb/s OC768 EAM Driver Drain bias may be applied through the output port for best efficiency or through the on-chip drain termination. Three stages in cascade demonstrated 3.8Vpp output voltage swing with 350mV at the input when stimulated with 43Gb/s 2^31-1prbs NRZ data. 43Gb/s OC768 Gain Stage: 15 10 S-parameter (dB) The TGA4803 is an excellent choice for 43Gb/s NRZ applications. The TGA4803 is capable of driving a single Electro-Absorptive optical Modulator (EAM) with electrical Non-Return to Zero (NRZ) data. In addition, the TGA4803 may also be used as a transmit predriver or a receive gain block. • 5 S11 0 S22 -5 S21 -10 -15 -20 -25 -30 0 10 20 30 40 50 60 70 80 Frequency (GHz) Measured Performance 40Gb/s NRZ 2^31-1 PRBS Single Stage 40 Gb/s Data Eye: 3.7V(amp) ** The TGA4803 requires off-chip decoupling and blocking components. Each device is 100% DC and RF tested on-wafer to ensure performance compliance. The device is available in die form. Lead-free and RoHS compliant ** Input 40Gb/s data stream generated using an Anritsu MUX. Vin=1.8Vpp. Datasheet subject to change without notice TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 1 TGA4803 MAXIMUM RATINGS 7/ SYMBOL PARAMETER 6/ VALUE NOTES Biased thru On-chip Drain Termination 10 V 1/ Biased thru the RF Output Port using a Bias Tee 8V POSITIVE SUPPLY VOLTAGE + V Vd(fet) 1/ POSITIVE SUPPLY CURRENT + I Biased thru On-chip Drain Termination 125 mA Id Biased thru the RF Output Port using a Bias Tee 125 mA PD POWER DISSIPATION 1.5 W 2/ NEGATIVE GATE Vg Voltage Ig Gate Current +1V to -3V 5 mA CONTROL GATE Vctl Voltage Ictl Gate Current Vd/2 to -3V 3/ 5 mA RF INPUT PIN Sinusoidal Continuous Wave Power Vin 43Gb/s PRBS Input Voltage Peak to Peak TCH TSTG 18 dBm 4 Vpp OPERATING CHANNEL TEMPERATURE 200 °C MOUNTING TEMPERATURE (30 SECONDS) 320 °C STORAGE TEMPERATURE -65 to 150 °C 4/ 5/ Notes: 1/ Assure Vd - Vctl <6V. Compute Vd as follows, Vd=V+ - Id*25. 2/ Assure the combination of Vd and Id does not exceed maximum power dissipation rating. 3/ When operated at this bias condition with a base plate temperature of 70 °C, the median life is 1.4E4 hours 4/ Assure Vctl never exceeds Vd during bias up and down sequences. Also, assure Vctl never exceeds 4V during normal operation. 5/ These ratings apply to each individual FET. 6/ Junction operating temperature will directly affect the device median time to failure (Tm). For maximum life, it is recommended that junction temperatures be maintained at the lowest possible levels. 7/ These ratings represent the maximum operable values for the device. TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 2 TGA4803 RF SPECIFICATIONS (TA = 25°C + 5°C) NOTE TEST MEASUREMENT CONDITIONS VALUE MIN SMALL SIGNAL BW TYP UNITS MAX >50 GHz SMALL-SIGNAL GAIN MAGNITUDE 2.5GHz 8 dB AGC RANGE Midband 3 dB NOISE FIGURE 14 GHz 6 dB SATURATED OUTPUT VOLTAGE (EYE AMPLITUDE) 43Gb/s with Vin=2Vpp 3.5 V 1/ P1dB DC-20GHz TBD dBm 1/ INPUT RETURN LOSS MAGNITUDE DC-50GHz -10 dB 1/ OUTPUT RETURN LOSS MAGNITUDE DC-50GHz -10 dB GROUP DELAY DC-50GHz +/- 20 ps 20/80% 10 ps 1/ RISE TIME Notes: 1/ Verified at RF on-wafer probe. TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 3 TGA4803 THERMAL INFORMATION Parameter Test Condition TCH (°C) θJC (°C/W) Tm (HRS) θJC Thermal Resistance (channel to backside of carrier) Vd = 6V, Vctrl = 3 V, ID = 100mA 109 65 2.3E6 Note: Assumes eutectic attach using 1.5 mil 80/20 AuSn mounted to a 20 mil CuMo Carrier at 70°C baseplate temperature. Worst case condition with no RF applied, 100% of DC power is dissipated. Median Lifetime (Tm) vs. Channel Temperature TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 4 TGA4803 Measured Performance Bias Conditions: Vd = 10 V, Idq = 82 mA, Vg2=3-3.2V @ Room Temperature 15 S-parameter (dB) 10 5 S11 0 S22 -5 S21 -10 -15 -20 -25 -30 0 10 20 30 40 50 60 70 80 Frequency (GHz) TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 5 TGA4803 Mechanical Drawing TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 6 TGA4803 1800pF 0.01uF 0.1uF (2pl) V+ 3 Vctl 2 RFout and Vd RF in 1 TGA4803 Vtee 4 Note: Drain bias should be applied at Vd (pin 5) thru broadband bias tee for best efficiency. 5 Bypass caps must remain on Pin 4 1800pF 0.1uF (2pl) Vg Bias Procedure A. For applying drain bias thru Vd 1. Make sure no RF power is applied to the device before continuing. 2. Set Vg=0 Set Vctl=0. 3. Raise Vd to 6V while monitoring drain current. Id should be near 20mA. 4. Raise Vctl to +2.5V (no greater than 3.5V). 5. Adjust Vg more positive until drain current reaches 100mA. 6. Apply Vin=1.8V(amplitude) NRZ 40Gb/s B. For applying drain bias thru V+ 1. Make sure no RF power is applied to the device before continuing. 2. Set Vg=0 Set Vctl=0. 3. Raise V+ to 5V while monitoring drain current. I+ should be near 20mA. 4. Raise Vctl to 2.5V (no greater than 3.5V) 5. Raise Vg more positive until drain current is 80mA 6. Raise V+ to 8V 7. Adjust Vg for Id=100mA 8. Apply Vin=1.8V(amplitude) NRZ 40Gb/s CAUTION: 1. Assure Vd - Vctl < 6V. When biasing thru V+, compute Vd as follows, Vd=V+ - Id*30. 2. Assure Vctl never exceeds Vd during bias up and down sequences. Also, assure Vctl never exceeds 4V during normal operation. TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 7 TGA4803 Recommend additional 0.01uF bypass cap located on Vctrl supply line on test fixture 0.01uF Reflow process assembly notes: • • • • • AuSn (80/20) solder with limited exposure to temperatures at or above 300ºC alloy station or conveyor furnace with reducing atmosphere no fluxes should be utilized coefficient of thermal expansion matching is critical for long-term reliability storage in dry nitrogen atmosphere Component placement and adhesive attachment assembly notes: • • • • • • • vacuum pencils and/or vacuum collets preferred method of pick up avoidance of air bridges during placement force impact critical during auto placement organic attachment can be used in low-power applications curing should be done in a convection oven; proper exhaust is a safety concern microwave or radiant curing should not be used because of differential heating coefficient of thermal expansion matching is critical Interconnect process assembly notes: • • • • • thermosonic ball bonding is the preferred interconnect technique force, time, and ultrasonics are critical parameters aluminum wire should not be used discrete FET devices with small pad sizes should be bonded with 0.0007inch wire maximum stage temperature: 200ºC GaAs MMIC devices are susceptible to damage from Electrostatic Discharge. Proper precautions should be observed during handling, assembly and test. TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 8 TGA4803 Assembly Process Notes Reflow process assembly notes: • • • • • 0 Use AuSn (80/20) solder with limited exposure to temperatures at or above 300 C (30 seconds max). An alloy station or conveyor furnace with reducing atmosphere should be used. No fluxes should be utilized. Coefficient of thermal expansion matching is critical for long-term reliability. Devices must be stored in a dry nitrogen atmosphere. Component placement and adhesive attachment assembly notes: • • • • • • • Vacuum pencils and/or vacuum collets are the preferred method of pick up. Air bridges must be avoided during placement. The force impact is critical during auto placement. Organic attachment can be used in low-power applications. Curing should be done in a convection oven; proper exhaust is a safety concern. Microwave or radiant curing should not be used because of differential heating. Coefficient of thermal expansion matching is critical. Interconnect process assembly notes: • • • • Thermosonic ball bonding is the preferred interconnect technique. Force, time, and ultrasonics are critical parameters. Aluminum wire should not be used. 0 Maximum stage temperature is 200 C. TriQuint Semiconductor: www. triquint.com (972)994-8465 Fax (972)994-8504 [email protected] May 2009 © Rev - 9