TYSEMI NDS355AN

SMD Type
Product specification
NDS355AN
General Description
Features
SuperSOTTM-3 N-Channel logic level enhancement mode
power field effect transistors are produced using Fairchild's
proprietary, high cell density, DMOS technology. This very high
density process is especially tailored to minimize on-state
resistance. These devices are particularly suited for low voltage
applications in notebook computers, portable phones, PCMCIA
cards, and
other battery powered circuits where fast
switching, and low in-line power loss are needed in a very small
outline surface mount package.
1.7A, 30 V, RDS(ON) = 0.125 Ω @ VGS = 4.5 V
RDS(ON) = 0.085 Ω @ VGS = 10 V.
Industry standard outline SOT-23 surface mount package
using proprietary SuperSOTTM-3 design for superior
thermal and electrical capabilities.
High density cell design for extremely low RDS(ON).
Exceptional on-resistance and maximum DC current
capability.
Compact industry standard SOT-23 surface mount
package.
_______________________________________________________________________________
D
S
G
Absolute Maximum Ratings
T A = 25°C unless otherwise noted
Symbol
Parameter
NDS355AN
Units
VDSS
VGSS
Drain-Source Voltage
30
V
Gate-Source Voltage - Continuous
±20
V
ID
Maximum Drain Current - Continuous
1.7
A
(Note 1a)
- Pulsed
PD
Maximum Power Dissipation
10
(Note 1a)
(Note 1b)
TJ,TSTG
Operating and Storage Temperature Range
0.5
W
0.46
-55 to 150
°C
250
°C/W
75
°C/W
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
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SMD Type
Product specification
NDS355AN
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
1
µA
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = 250 µA
IDSS
Zero Gate Voltage Drain Current
VDS = 24 V, VGS = 0 V
30
V
10
µA
IGSSF
Gate - Body Leakage, Forward
VGS = 20 VDS = 0 V
100
nA
IGSSR
Gate - Body Leakage, Reverse
VGS = -20 V, VDS = 0 V
-100
nA
V
TJ =125°C
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = 250 µA
TJ =125°C
RDS(ON)
Static Drain-Source On-Resistance
1
1.6
2
0.5
1.2
1.5
0.105
0.125
0.16
0.23
0.065
0.085
VGS = 4.5 V, ID = 1.7 A
TJ =125°C
VGS = 10 V, ID = 1.9 A
6
Ω
ID(ON)
On-State Drain Current
VGS = 4.5 V, VDS = 5 V
A
gFS
Forward Transconductance
VDS = 5 V, ID= 1.7 A
3.5
S
VDS = 15 V, VGS = 0 V,
f = 1.0 MHz
195
pF
135
pF
48
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS
td(on)
Turn - On Delay Time
tr
Turn - On Rise Time
td(off)
Turn - Off Delay Time
tf
Turn - Off Fall Time
td(on)
Turn - On Delay Time
tr
Turn - On Rise Time
td(off)
Turn - Off Delay Time
tf
Turn - Off Fall Time
Qg
Total Gate Charge
Q gs
Gate-Source Charge
Q gd
Gate-Drain Charge
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(Note 2)
VDD = 10 V, ID = 1 A,
VGS = 10 V, RGEN = 6 Ω
VDD = 5 V, ID = 1 A,
VGS = 4.5 V, RGEN = 6 Ω
VDS = 10 V, ID = 1.7 A,
VGS = 5 V
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10
20
ns
13
25
ns
13
25
ns
4
10
ns
10
20
ns
32
60
ns
10
20
ns
5
10
ns
3.5
5
nC
0.8
nC
1.7
nC
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SMD Type
Product specification
NDS355AN
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.42
A
10
A
1.2
V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
ISM
Maximum Pulsed Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS =0.42 A (Note 2)
0.8
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.
PD (t ) =
T J−TA
R θJ A(t )
=
T J−TA
R θJ C+RθCA(t )
= I 2D (t ) × RDS (ON )
TJ
Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 250oC/W when mounted on a 0.02 in2 pad of 2oz copper.
b. 270oC/W when mounted on a 0.001 in2 pad of 2oz copper.
1a
1b
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
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[email protected]
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