54FCT573 Octal D-Type Latch with TRI-STATE ® Outputs General Description Features The ’FCT573 is an octal latch with buffered common Latch Enable (LE) and buffered common Output Enable (OE) inputs. This device is functionally identical to the ’FCT373 but has different pinouts. n Inputs and outputs on opposite sides of package allow easy interface with microprocessors n Useful as input or output port for microprocessors n TTL input and output level compatible n CMOS power consumption n Functionally identical to ’FCT373 n TRI-STATE outputs for bus interfacing n Output sink capability of 32 mA, source capability of 12 mA n Standard Microcircuit Drawing (SMD) 5962-8863901 Ordering Code Military Package Package Description Number 54FCT573DMQB J20A 20-Lead Ceramic Dual-In-Line 54FCT573FMQB W20A 20-Lead Cerpack 54FCT573LMQB E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Connection Diagram Pin Assignment for LCC Pin Assignment for DIP and Cerpack DS100951-39 DS100951-1 Pin Names D0–D7 Description Data Inputs LE Latch Enable Input (Active HIGH) OE TRI-STATE Output Enable Input (Active LOW) O0–O7 TRI-STATE Latch Outputs TRI-STATE ® is a registered trademark of National Semiconductor Corporation. © 1999 National Semiconductor Corporation DS100951 www.national.com 54FCT573 Octal D-Type Latch with TRI-STATE Outputs August 1998 54FCT573 Function Table Functional Description Inputs The ’FCT573 contains eight D-type latches with TRI-STATE output buffers. When the Latch Enable (LE) input is HIGH, data on the Dn inputs enters the latches. In this condition the latches are transparent, i.e., a latch output will change state each time its D input changes. When LE is LOW the latches store the information that was present on the D inputs a setup time preceding the HIGH-to-LOW transition of LE. The TRI-STATE buffers are controlled by the Output Enable (OE) input. When OE is LOW, the buffers are in the bi-state mode. When OE is HIGH the buffers are in the high impedance mode but this does not interfere with entering new data into the latches. Outputs OE LE D O L H H H L H L L L L X O0 H X X Z H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial O0 = Value stored from previous clock cycle Logic Diagram DS100951-3 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.national.com 2 in LOW State (Max) DC Latchup Source Current Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias Ceramic VCC Pin Potential to Ground Pin Input Voltage (Note 2) Input Current (Note 2) Voltage Applied to Any Output in the Disabled or Power-Off State in the HIGH State Current Applied to Output Twice the rated IOL (mA) −500 mA Recommended Operating Conditions −65˚C to +150˚C −55˚C to +125˚C Free Air Ambient Temperature Military Supply Voltage Military Minimum Input Edge Rate Data Input Enable Input −55˚C to +175˚C −0.5V to +7.0V −0.5V to +7.0V −30 mA to +5.0 mA −55˚C to +125˚C +4.5V to +5.5V (∆V/∆t) 50 mV/ns 20 mV/ns Note 1: Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. −0.5V to +5.5V −0.5V to VCC Note 2: Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol Parameter FCT573 Min VIH Input HIGH Voltage VIL Input LOW Voltage Typ Units VCC 2.0 V Recognized HIGH Signal 0.8 V −1.2 V Min Recognized LOW Signal IIN = −18 mA V Min V Min IOH = −12 mA IOL = 300 µA IOL = 32 mA VIN = VCC VCD Input Clamp Diode Voltage VOH Output HIGH Voltage VOL Output LOW Voltage IIH Input HIGH Current 5 µA Max 54FCT 4.3 54FCT 2.4 Conditions Max 54FCT 0.2 54FCT 0.5 IIL Input LOW Current −5 µA Max IOZH Output Leakage Current 50 µA 0− 5.5V IOZL Output Leakage Current −50 µA 0− 5.5V IOH = −300 µA VIN = 0.0V VOUT = 2.7V; OE = 2.0V VOUT = 0.5V; OE = 2.0V IOS Output Short-Circuit Current -60 mA Max VOUT = 0.0V ICCQ Quiescent Power Supply Current 1.5 mA Max ∆ICC Quiescent Power Supply Current 2.0 mA Max VIN < 0.2V or VIN 5.3V, VCC = 5.5V VI = 3.4V, VCC = 5.5V ICCD Dynamic ICC 0.4 mA/ MHz Max Outputs Open, VCC = 5.5V, VIN 5.3V or VIN < 0.2V, One Bit Toggling, 50% Duty Cycle, OE = GND, LE = VCC ICC Total Power Supply Current 6.0 mA Max Outputs Open, fCP = 10 MHz, VCC = 5.5V, VIN 5.3V or VIN < 0.2V, One Bit Toggling, 50% Duty Cycle, OE = GND, LE = VCC 3 www.national.com 54FCT573 Absolute Maximum Ratings (Note 1) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. 54FCT573 AC Electrical Characteristics Symbol Parameter 54FCT TA = −55˚C to +125˚C VCC = 4.5V to 5.5V Units Fig. No. ns Figure 4 ns Figure 4 ns Figure 6 ns Figure 6 Units Fig. No. ns Figure 7 ns Figure 7 ns Figure 5 CL = 50 pF Min Max tPLH Propagation Delay 1.0 8.5 tPHL Dn to On 1.0 8.5 tPLH Propagation Delay 1.0 15.0 tPHL LE to On 1.0 15.0 tPZH Output Enable Time tPZL 1.0 13.5 1.0 13.5 tPHZ Output Disable Time 1.0 10.0 tPLZ Time 1.0 10.0 AC Operating Requirements Symbol Parameter 54FCT TA = −55˚C to +125˚C VCC = 4.5V to 5.5V CL = 50 pF Min ts(H) Set Time, HIGH 2.0 ts(L) or LOW Dn to LE 2.0 th(H) Hold Time, HIGH 1.5 th(L) or LOW Dn to LE 1.5 tw(H) Pulse Width, 6.0 Max LE HIGH Capacitance Symbol Parameter Max Units CIN Input Capacitance 10 pF Conditions (TA = 25˚C) VCC = 0V COUT (Note 3) Output Capacitance 12 pF VCC = 5.0V Note 3: COUT is measured at frequency f = 1 MHz per MIL-STD-883B, Method 3012. www.national.com 4 54FCT573 AC Loading DS100951-4 *Includes jig and probe capacitance DS100951-5 FIGURE 1. Test Load FIGURE 5. Propagation Delay, Pulse Width Waveforms DS100951-7 DS100951-6 FIGURE 6. TRI-STATE Output HIGH and LOW Enable and Disable Times FIGURE 2. Test Input Signal Levels Amplitude Rep. Rate tw tr tf 3.0V 1 MHz 500 ns 2.5 ns 2.5 ns FIGURE 3. Test Input Signal Requirements DS100951-9 FIGURE 7. Setup Time, Hold Time and Recovery Time Waveforms DS100951-8 FIGURE 4. Propagation Delay Waveforms for Inverting and Non-Inverting Functions 5 www.national.com 54FCT573 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Ceramic Leadless Chip Carrier NS Package Number E20A 20-Lead Ceramic Dual-In-Line NS Package Number J20A www.national.com 6 54FCT573 Octal D-Type Latch with TRI-STATE Outputs Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Ceramic Flatpack NS Package Number W20A LIFE SUPPORT POLICY NATIONAL’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. 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