ANPEC APA2606

APA2606
2.8W Stereo Class-D Audio Power Amplifier and Class AB Headphone
Driver (DC Volume Control, UVP, AGC Function)
Features
•
•
General Description
Operating Voltage: 3.3V-5.5V
The APA2606 is a stereo, high efficiency, filter-free Class-
•
•
High Efficiency 85% at PO=2.8W, 4Ω Speaker,
VDD=5V
D audio amplifier available in SSOP-24 and SSOP-24P
packages.
Filter-Free Class-D Amplifier
Low Shutdown Current
The APA2606 provides the precise DC volume control,
and the gain range is from -80dB (VVOLUME=0V) to +20dB
•
- IDD=1µA at VDD=5V
64 Steps Volume Adjustable from -80dB to +20dB
(VVOLUME =5V) with 64 steps precise control. It’s easy to get
the suitable amplifier’s gain with the 64 steps gain setting.
by DC Voltage with Hysteresis
AGC (Non-Clip) Function
The filter-free architecture eliminates the output filters
compared to the traditional Class-D audio amplifier, and
Under-Voltage Protection Function
Output Power at THD+N=1%
BTL Mode
- 2.25W at VDD=5V, RL=4Ω
- 1.3W at VDD=5V, RL=8Ω
SE Mode
- 68mW at VDD=5V, RL=32Ω
Output Power at THD+N=10%
- 2.8W at VDD=5V, RL=4Ω
reduces the external component counts and the components high, it could save the PCB space, system cost,
•
•
•
•
•
•
•
•
simplifies the design and the power loss at filter.
APA2606 provides an AGC (Non-Clip) function, and this
function can low down the dynamic range for large input
signal. APA2606 can provide from 20dB to -80dB with 64
steps gain decrease for non-clipping function, and this
function can avoid output signal clipping.
The APA2606 also integrates the de-pop circuitry that reduces the pops and click noises during power on/off or
- 1.6W at VDD=5V, RL=8Ω
Less External Components Required
shutdown enable process.
The APA2606 has build-in over-current and thermal pro-
Two Output Modes Allowable with BTL and SE
Modes Selected by SE/BTL Pin
tection that prevent the chip being destroyed by shortcircuit or over-temperature situation.
Thermal and Over-Current Protections with AutoRecovery
APA2606 combines a stereo bridge-tied loads (BTL)
mode for speaker drive and a stereo single-end (SE)
Pow er Enhanced Packages SSOP-24 and
SSOP-24P
mode for headphone drive into a single chip, where both
modes are easily switched by the SE/BTL input control
Lead Free and Green Devices Available
(RoHS Compliant)
pin signal.
APA2606 is capable of driving 2.8W at 5V into 4Ω speaker.
The efficiency can archived 85% at R L =4Ω when
PO=2.8W at VDD=5V.
Applications
•
•
•
APA2606 is capable of driving 60mW at 5V into 32Ω
headphone.
LCD TVs
DVD Player
Active Speakers
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
1
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APA2606
Simplified Application Circuit
HP_ROUTP
RINN
Stereo Input
Signals
ROUTP
LINN
ROUTN
VDD
APA2606
SE/BTL
Signal
VOLUME
LOUTN
LOUTP
SE/BTL
HP_LOUTP
Pin Configuration
LOUTP 1
GND 2
GND 3
LOUTN 4
PVDD 5
MUTE 6
VDD 7
LINN 8
UVP 9
VDC 10
VOLUME 11
HP_LOUT 12
APA2606
Top View
24 ROUTP
23 GND
22 GND
21 ROUTN
20 PVDD
19 SD
18 GND
17 RINN
16 AGC
15 SE/BTL
14 BYPASS
13 HP_ROUT
SSOP-24
LOUTP 1
GND 2
GND 3
LOUTN 4
PVDD 5
MUTE 6
VDD 7
LINN 8
UVP 9
VDC10
VOLUME 11
HP_LOUT 12
APA2606
APA2606
Top View
24 ROUTP
23 GND
22 GND
21 ROUTN
20 PVDD
19 SD
18 GND
17 RINN
16 AGC
15 SE/BTL
14 BYPASS
13 HP_ROUT
SSOP-24P
= Thermal Pad (connected the Thermal Pad to
GND plane for better dissipation
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
2
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APA2606
Ordering and Marking Information
APA2606
Package Code
N : SSOP-24 NA : SSOP-24P
Operating Ambient Temperature Range
I : -40 to 85 oC
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
Assembly Material
Handling Code
Temperature Range
Package Code
APA2606 N:
APA2606
XXXXX
XXXXX - Date Code
APA2606 NA:
APA2606
XXXXXX
XXXXX - Date Code
Note : ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings (Note 1)
Parameter
Symbol
VDD
TJ
Rating
Supply Voltage (VDD, PVDD, VDC to GND)
-0.3 to 6
Input Voltage (LINN, RINN to GND)
-0.3 to VDD+0.3
Input Voltage (SD, MUTE, AGC, VDC, VOLUME and SE/BTL, BYPASS
to GND)
-0.3 to VDD+0.3
Maximum Junction Temperature
V
150
TSTG
Storage Temperature Range
TSDR
Maximum Soldering Temperature Range, 10 Seconds
PD
Unit
ο
-65 to +150
C
260
Power Dissipation
Internally Limited
W
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Thermal Characteristics
Symbol
θJA
θJC
Parameter
Typical Value
Thermal Resistance -Junction to Ambient (Note 2)
SSOP-24
SSOP-24P
96
45
SSOP-24
SSOP-24P
18
11
Unit
ο
C/W
Thermal Resistance -Junction to Case (Note 3)
ο
C/W
Note 2: Please refer to “ Layout Recommendation”, the PGND PIN on the central of the IC should connect to the ground plan, and the
PCB is a 2-layer, 5-inch square area with 2oz copper thickness.
Note 3: The case temperature is measured at the center of the PGND PIN on the underside of the SSOP-24 package.
Recommended Operating Conditions
Symbol
VDD
Parameter
Supply Voltage
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
3
Range
Unit
3.3 ~ 5.5
V
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APA2606
Recommended Operating Conditions (Cont.)
Symbol
Parameter
Range
SD, MUTE
Unit
2 ~ VDD
VIH
High Level Threshold Voltage
VIL
Low Level Threshold Voltage
VICM
Common Mode Input Voltage
1 ~ VDD-1
TA
Ambient Temperature Range
-40 ~ 85
TJ
Junction Temperature Range
-40 ~ 125
RL
Speaker Resistance
SE/ BTL
V
0.8 VDD ~ VDD
SD, MUTE
0 ~ 0.8
SE/BTL
0 ~ 1.0
V
V
ο
C
Ω
3.5 ~
Electrical Characteristics
VDD=5V, VGND=0V, TA= 25οC, Gain=20dB (unless otherwise noted).
Symbol
VBYPASS
Parameter
Test Conditions
APA2606
Unit
Min.
Typ.
Max.
0.49x
VDD
0.5x
VDD
0.51x
VDD
V
VMUTE=0V, V/SD=5V, No Load
-
5
12
mA
mA
Bypass Pin Voltage
IDD
Supply Current (BTL)
IDD
Supply Current (SE)
VMUTE=0V, V/SD=5V, No Load
-
2
6
ISD
Supply Current
VMUTE=0V, V/SD=0V, No Load
-
-
1
Input Current
SD, MUTE, VOLUME
-
-
1
Oscillator Frequency
(VDD=3.3~5.5V, TA= -40~85οC)
400
500
600
kHz
Ri
Input Resistance (BTL)
Gain=20dB
31
36
42
kΩ
Ri
Input Resistance (SE)
Gain=3.5dB
51
59
68
kΩ
VDD=5.5V,
IL=0.8A
-
690
-
VDD=4.5V,
IL=0.6A
-
720
-
VDD=3.6V,
IL=0.4A
-
760
-
-
1.2
-
Ii
FOSC
RDSON
TSTART-UP
Static Drain-Source On-State
Resistance
Start-Up Time from Shutdown
Power MOSFET (P+N)
Bypass Capacitor, CB=2.2µF.
µA
mΩ
s
Operating Characteristics, BTL Mode
Symbol
Parameter
Test Conditions
APA2606
Min.
Typ.
Max.
Unit
VDD=5V, TA=25°
C, GAIN=6dB
PO
η
THD+N
Crosstalk
THD+N=1%
fin=1kHz
RL=4Ω
2.1
2.25
-
RL=8Ω
1.0
1.3
-
THD+N=10%
fin=1kHz
RL=4Ω
-
2.8
-
Output Power
Efficiency
Total Harmonic Distortion Plus
Noise
Channel Separation
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
-
1.6
80
85
-
RL=4Ω, PO=1.6W
-
0.06
0.3
RL=8Ω, PO=0.8W
-
0.05
0.2
-
-85
-
RL=8Ω
RL=4Ω, PO=2.8W
fin=1kHz
PO=0.2W, RL=4Ω, fin=1kHz
4
W
%
dB
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APA2606
Electrical Characteristics (Cont.)
VDD=5V, VGND=0V, TA= 25οC, Gain=20dB (unless otherwise noted).
Operating Characteristics, BTL Mode (CONT.)
Symbol
Parameter
APA2606
Test Conditions
Unit
Min.
Typ.
Max.
fin=100Hz
-
-50
-
fin=1kHz
-
-60
-
-75
-78
-
VDD=5V, TA=25°
C, GAIN=6dB (CONT.)
PSRR
Power Supply Rejection Ratio
RL=4Ω, Input
AC-Ground
dB
SNR
Signal to Noise Ratio
With A-weighting Filter
VO=1Vrms, RL=8Ω
AttMute
Mute Attenuation
fin=1kHz, RL=8Ω, Vin=1Vrms
-
-85
-
Shutdown Attenuation
fin=1kHz, RL=8Ω, Vin=1Vrms
-
-110
-
Vn
Output Noise
With A-weighting Filter
-
80
120
µVrms
VOS
Output Offset Voltage
RL=4Ω (Gain=20dB)
-
20
30
mV
Attshutdown
dB
dB
Operating Characteristics, SE mode
Symbol
Parameter
APA2606
Test Conditions
Unit
Min.
Typ.
Max.
VDD=5V, TA=25°
C, GAIN=3.5dB
PO
THD+N
Crosstalk
PSRR
Output Power
THD+N=1%
fin=1kHz
RL=32Ω
50
68
-
THD+N=10%
fin=1kHz
RL=32Ω
-
88
-
RL=32Ω
PO=42.5mW
-
0.02
-
Total Harmonic Distortion Plus Noise fin=1kHz
Channel separation
Power Supply Rejection Ratio
mW
PO=6mW, RL=32Ω, fin=1kHz
-
-90
-
fin=100Hz
-
-60
-
fin=1kHz
-
-70
-
RL=32Ω, Input
AC-Ground
Signal to Noise Ratio
With A-weighting Filter
VO=1Vrms, RL=32Ω.
-85
-88
-
Vn
Output Noise
With A-weighting Filter
(Gain=3.5dB)
-
20
45
VOS
Output Offset Voltage
RL=32Ω, (Gain=3.5dB)
-
5
10
SNR
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
5
%
dB
µVrms
mV
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APA2606
Typical Operating Characteristics
Efficiency vs. Output Power
90.0
90.0
80.0
80.0
70.0
70.0
60.0
50.0
40.0
RL=4Ω+33µH
fin=1kHz
THD+N≦10%
AV=20dB
AUX-0025
AES-17(20kHz)
30.0
20.0
10.0
0.0
0.0
0.5
1.0
Efficiency vs. Output Power
100.0
Efficiency (%)
Efficiency (%)
100.0
60.0
50.0
40.0
RL=8Ω+33µH
fin=1kHz
THD+N≦10%
AV=20dB
AUX-0025
AES-17(20kHz)
30.0
20.0
10.0
1.5
2.0
2.5
0.0
0.0
3.0
0.3
Output Power (W)
THD+N vs. Output Power
20
VDD=3.3V
VDD=3.6V
VDD=5V
0.1
VDD=5.0V
fin=1kHz
RL=4Ω
AUX-0025
AES-17(20kHz)
SSOP-24
1
THD+N (%)
THD+N (%)
1
1.5
THD+N vs. Output Power
20
fin=1kHz
RL=4Ω
AV=20dB
AUX-0025
AES-17(20kHz)
SSOP-24
0.6
0.9
1.2
Output Power (W)
AV=20dB
0.1
AV=12dB
AV=6dB
VDD=5.5V
0.01
0.03
0.01
0.5
1
Output Power (W)
2
4
0.06
THD+N vs. Output Power
1
2
3 4
THD+N vs. Output Power
20
fin=1kHz
RL=8Ω
AV=20dB
AUX-0025
AES-17(20kHz)
SSOP-24
VDD=3.3V
THD+N (%)
THD+N (%)
0.5
Output Power (W)
20
1
0.2
VDD=3.6V
0.1
1
VDD=5.0V
fin=1kHz
RL=8Ω
AUX-0025
AES-17(20kHz)
SSOP-24
AV=12dB
0.1
AV=20dB
VDD=5V
VDD=5.5V
0.01
0.06
0.5
0.7 1
AV=6dB
0.01
0.03
2
Output Power (W)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
0.1
0.3
1
2
Output Power (W)
6
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APA2606
Typical Operating Characteristics (Cont.)
THD+N vs. Output Power
THD+N vs. Output Power
20
fin=1kHz
RL=16Ω
AV=3.5dB
AES-17(20kHz)
SSOP-24
VDD=5.0V
fin=1kHz
RL=16Ω
AES-17(20kHz)
SSOP-24
1
THD+N (%)
THD+N (%)
20
VDD=3.3V
VDD=3.6V
VDD=5V
0.1
1
AV=0dB
0.1
AV=3.5dB
VDD=5.5V
0.01
0.01
0.03 0.05
0.1
Output Power (W)
0.01
10m
0.2
THD+N vs. Output Power
fin=1kHz
RL=32Ω
AV=3.5dB
THD+N (%)
VDD=3.6V
0.1
1
0.1
AV=3.5dB
VDD=5V
VDD=5.5V
0.01
0.02
0.04
0.06
0.08
0.01
0.1
0
0.02
Output Power (W)
1
AV=20dB,
VDD=3.3V, Po=0.7W
20
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
0.1
0.12
AV=20dB
0.1
0.01
AV=20dB,
VDD=5.5V, Po=1.95W
200
1k
Frequency (Hz)
0.08
VDD=5.0V
PO=1.63W
RL=4Ω
AUX-0025
AES-17(20kHz)
SSOP-24
1
0.1
AV=20dB,
VDD=5.0V, Po=1.63W
0.06
THD+N vs. Frequency
10
THD+N (%)
VDD=3.3/5.0/5.5V
PO=0.7/1.63/1.95W
RL=4Ω
AUX-0025
AES-17(20kHz)
SSOP-24
0.04
AV=0dB
Output Power (W)
THD+N vs. Frequency
10
THD+N (%)
200m
VDD=5.0V
fin=1kHz
RL=32Ω
AES-17(20kHz)
SSOP-24
AES17(20kHz)
SSOP-24
VDD=3.3V
0.001
100m
THD+N vs. Output Power
1
0.01
50m
20
20
THD+N (%)
30m
Output Power (W)
AV=12dB
AV=6dB
0.001
10k 20k
7
20
100
1k
Frequency (Hz)
10k 20k
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APA2606
Typical Operating Characteristics (Cont.)
THD+N vs. Frequency
THD+N vs. Frequency
VDD=3.3/5.0/5.5V
PO=0.41/0.96/1.17W
RL=8Ω
AUX-0025
AES-17(20kHz)
SSOP-24
THD+N (%)
1
10
AV=20dB,
VDD=3.3V, Po=0.41W
0.1
0.01
AV=20dB,
VDD=5.0V, Po=0.96W
0.001
20
100
AV=6dB
0.001
20
10k 20k
THD+N vs. Frequency
1
THD+N (%)
THD+N (%)
1k
Frequency (Hz)
10k 20k
THD+N vs. Frequency
VDD=3.3/5.0/5.5V
PO=20/48/60mW
RL=32Ω
AES-17(20kHz)
SSOP-24
1
AV=3.5dB,
VDD=3.3V, Po=20mW
0.1
VDD=5.0V
PO=48mW
RL=32Ω
AES-17(20kHz)
SSOP-24
0.1
AV=3.5dB
0.01
0.01
AV=3.5dB,
VDD=5.0V, Po=48mW
0.001
20
100
AV=0dB
AV=3.5dB,
VDD=5.5V, Po=60mW
1k
Frequency (Hz)
0.001
20
10k 20k
-70
-75
VDD=3.6V,
R-ch to L-ch
VDD=3.6V,
L-ch to R-ch
Crosstalk (dB)
VDD=3.6/5.0V
Vo=1V
RL=4Ω
AUX-0025
AES-17(20kHz)
SSOP-24
-80
-85
-90
VDD=5.0V,
L-ch to R-ch
-95
10
100
1k
Frequency (Hz)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
1k
10k 20k
Crosstalk vs. Frequency
Crosstalk vs. Frequency
-65
100
Frequency (Hz)
-60
Crosstalk (dB)
100
10
10
-100
AV=20dB
AV=12dB
0.1
0.01
AV=20dB,
VDD=5.5V, Po=1.17W
1k
Frequency (Hz)
VDD=5.0V
PO=0.96W
RL=8Ω
AUX-0025
AES-17(20kHz)
SSOP-24
1
THD+N (%)
10
VDD=5.0V,
R-ch to L-ch
-60
-65
-70
-75
-80
-85
VDD=5.0V
Vo=1.0V
RL=32Ω
AES-17(20kHz)
SSOP-24
-90
-95
-100
-105
-110
-115
-120
10k 20k
8
AV=3.5dB,
AV=3.5dB, R-ch to L-ch
L-ch to R-ch
AV=0dB,
L-ch to R-ch
AV=0dB,
R-ch to L-ch
10
100
1k
Frequency (Hz)
10k 20k
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APA2606
Typical Operating Characteristics (Cont.)
AGC Function
Output Power vs. Input AC
1.6
1.4
1.4
1.2
1.2
Output Power (W)
Output Power (W)
1.6
AGC Function
Output Power vs. Input AC
1
0.8
VDD=5.0V
RL=8Ω
AES-17(20kHz)
SSOP-24
VAGC to GND
0.6
0.4
1
0.8
0.4
0.2
0.2
0.2
0.4
0.6
0.8
1
Input AC (Vrms)
1.2
0.2
1.4
VDD=5.0V
RL=4Ω
Input AC Ground
AUX-0025
AES-17(20kHz)
SSOP-24
AV=20dB
200µ
175µ
150µ
AV=10dB
125µ
AV=6dB
100µ
75µ
AV=0dB
50µ
80µ
70µ
60µ
50µ
AV=3.5dB
40µ
30µ
AV=0dB
20µ
AV=-6dB
25µ
10
100
1k
Frequency (Hz)
10µ
10k 20k
Phase, AV=20dB
+12
+10
+8
+6
+4
+2
10
AUX-0025
SSOP-24
Phase, AV=10dB
Amplitude,AV=5dB
100
1k
10k
Frequency (Hz)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
100
1k
Frequency (Hz)
10k 20k
200k
+4
+2
-0
-2
-4
-6
-8
-10
-12
-14
-16
-18
-20
9
TT
Amplitude,AV=3.5dB
Amplitude,AV=0dB
Phase, AV=-10dB
VDD=5.0V
RL=16Ω
SSOP-24
10
100
1k
10k
Frequency (Hz)
200k
+350
+325
+300
+275
+250
+225
+200
+175
+150
+125
+100
+75
+50
+25
+0
Phase (Deg)
Amplitude,AV=15dB
+14
Phase (Deg)
Gain (dB)
VDD=5.0V
RL=4Ω
+200
+175
+150
+125
+100
+75
+50
+25
+0
-25
-50
-75
-100
-125
-150
-175
-200
Gain (dB)
T
+20
10
Frequency Response
Frequency Response
+22
+16
1.4
VDD=5.0V
RL=32Ω
Input AC Ground
AES-17(20kHz)
SSOP-24
90µ
225µ
+18
1.2
100µ
Output Noise Voltage (Vrms)
250µ
0.4
0.6
0.8
1
Input AC (Vrms)
Output Noise Voltage vs. Frequency
Output Noise Voltage vs. Frequency
300µ
275µ
Output Noise Voltage (Vrms)
VDD=5.0V
RL=8Ω
AES-17(20kHz)
SSOP-24
VAGC to GND
0.6
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APA2606
Typical Operating Characteristics (Cont.)
Shutdown Attenuation vs. Frequency
Mute Attenuation vs. Frequency
-60
-60
-70
-70
-80
Left Channel
Right Channel
VDD=5.0V
RL=4Ω
AV=20dB
VO=1Vrms
AUX-0025
AES-17(20kHz)
SSOP-24
-90
-100
-110
Gain (dB)
Gain (dB)
-80
-90
-100
Left Channel
-110
-120
-120
-130
VDD=5.0V
RL=4Ω
AV=20dB
VO=1Vrms
AUX-0025
AES-17(20kHz)
SSOP-24
20
100
1k
Frequency (Hz)
-130
10k 20k
Right Channel
20
PSRR (dB)
-30
-40
-50
10
-20
-30
-40
-70
-50
-80
-60
-90
-70
20
Gain Up
-10
-60
-100
Gain Down
0
Gain (dB)
-20
100
1k
10k
-80
20k
VDD=5.0V
No Load
AUX-0025
AES-17(20kHz)
0.0
Frequency (Hz)
2.0
3.0
4.0
DC Volume Voltage (V)
5.0
0.8
0.7
No Load
5
Shutdown Current (µA)
Shutdown Current (mA)
1.0
Shutdown Current vs. Supply Voltage
Supply Current vs. Supply Voltage
6
4
BTL Mode
3
SE Mode
2
1
0
10k 20k
20
VDD=5.0V
RL=8Ω
AV=20dB
Vrr=0.2Vrms
Input floating
AUX-0025
AES-17(20kHz)
SSOP-24
-10
1k
Frequency (Hz)
Gain vs. Volume Voltage
PSRR vs. Frequency
+0
100
0.6
0.5
0.4
0.3
0.2
0.1
0.0
2.0
4.0
0.0
6.0
Voltage (V)
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
10
0.0
2.0
4.0
Voltage (V)
6.0
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APA2606
Typical Operating Characteristics (Cont.)
0.4
Power Dissipation vs. Output Power
Power Dissipation (W)
Rl=4ohm
Rl=8ohm
0.3
0.2
0.1
0.0
0.0
0.5
1.0
1.5
2.0
Output Power (W)
Copyright  ANPEC Electronics Corp.
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APA2606
Pin Description
PIN
I/O/P
NO.
NAME
1
LOUTP
FUNCTION
O
Positive output of left channel power amplifier.
2, 3, 22, 23
PGND
P
Power amplifier’s ground.
4
LOUTN
O
Negative output of left channel power amplifier.
5,20
PVDD
P
Power amplifier’s power supply.
6
MUTE
I
Mute control signal input. Place entire IC in mute mode when held low cannot float.
7
VDD
P
Control and bias block’s power supply.
8
LINN
I
Negative input of left channel power amplifier.
9
UVP
I
Under-voltage protection input. Floating or pull “H” disable this function.
10
VDC
P
Volume control block’s power supply.
11
VOLUME
I
Internal gain setting input.
12
HP_LOUT
O
Headphone output of left channel power amplifier.
13
HP_ROUT
O
Headphone output of right channel power amplifier.
14
BYPASS
P
Bias voltage for power amplifiers.
15
HP/BTL
I
Output mode control input, high for HP output mode and low for BTL mode cannot float.
16
AGC
I
Maximum output power setting input. When held high disable AGC function.
17
RINN
I
Negative input of right channel power amplifier.
18
GND
P
Control and bias block’s ground.
19
SD
I
Shutdown mode control input. Place entire IC in shutdown mode when held low cannot float.
21
ROUTN
O
Negative output of right channel power amplifier.
24
ROUTP
O
Positive output of right channel power amplifier.
Copyright  ANPEC Electronics Corp.
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APA2606
Block Diagram
HP_ROUT
PGND
Gate
Drive
RINN
ROUTP
PVDD
Gate
Drive
BYPASS
AGC
BYPASS
AGC
Control
VDC
MUTE
VOLUME
ROUTN
Under-Voltage
Detection Circuit
Biases &
Reference
Protection
Function
GND
Volume
Control
Shutdown
Control
SD
UVP
Oscillator
VDD
Gate
Drive
LINN
LOUTP
PVDD
Gate
Drive
LOUTN
PGND
SE/BTL
SE/BTL
HP_LOUT
Copyright  ANPEC Electronics Corp.
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APA2606
Typical Application Circuit
PVDD
CS1
10µF
CS2 0.1µF
4Ω
1 LOUTP
ROUTP 24
2 PGND
PGND 23
3 PGND
PGND 22
5 PVDD
Vsystem
R1
Left Channel
Input Signal
R3
1µF
VDD
R2
CS4
1µF
APA2606
(Top View)
6 MUTE
Ci2
R1
50kΩ
CS3
4Ω
ROUTN 21
4 LOUTN
Mute Control
0.1µF
PVDD 20
SD 19
7 VDD
GND 18
8 LINN
RINN 17
9 UVP
AGC 16
SE/BTL 15
10 VDC
11 VOLUME
BYPASS 14
12 HP_LOUT
HP_ROUT 13
Shutdown Control
Ci2
1µF
CB 2.2µF
VDD
Left Channel
Input Signal
SE/BTL
Control
CS5
1µF
R4
R5
220µF
1kΩ
SE/BTL
Signal
220µF
1kΩ
Headphone Jack
VDD=5V
RL (Ω)
4
8
R4 (kΩ)
R5 (kΩ)
PO (W)
VAGC (V)
29.4
12.0
2.20
1.450
21.7
12.0
1.70
1.575
30.9
12.0
1.20
1.400
Note 4 :The resistance must use 1%.
Copyright  ANPEC Electronics Corp.
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APA2606
DC Volume Control Table
Step
Gain(BTL)
Gain(SE)
Low (%)
High (%)
Recom(%)
Low (5V)
High(5V)
Recom(5V)
1
-80.0
-80.0
0.00
1.86
0.00
0.000
0.093
0.00
2
-41.0
-55.3
2.35
3.37
2.86
0.118
0.169
0.14
3
-35.0
-49.3
3.77
4.91
4.34
0.188
0.246
0.22
4
-29.0
-43.0
5.32
6.45
5.89
0.266
0.322
0.29
5
-23.0
-36.9
6.84
8.00
7.42
0.342
0.400
0.37
6
-17.0
-30.7
8.41
9.54
8.98
0.421
0.477
0.45
7
-11.0
-24.7
9.97
11.10
10.53
0.498
0.555
0.53
8
-9.0
-22.7
11.53
12.65
12.09
0.576
0.633
0.60
9
-7.0
-20.7
13.08
14.19
13.64
0.654
0.710
0.68
10
-5.0
-18.8
14.64
15.73
15.19
0.732
0.787
0.76
11
-3.0
-16.8
16.18
17.26
16.72
0.809
0.863
0.84
12
-2.0
-15.8
17.71
18.84
18.28
0.886
0.942
0.91
13
-1.0
-14.9
19.25
20.37
19.81
0.963
1.019
0.99
14
0.0
-13.9
20.81
21.91
21.36
1.040
1.096
1.07
15
0.4
-13.5
22.36
23.49
22.93
1.118
1.175
1.15
16
0.8
-13.1
23.92
25.07
24.50
1.196
1.253
1.22
17
1.2
-12.8
25.48
26.59
26.03
1.274
1.329
1.30
18
1.6
-12.4
27.04
28.12
27.58
1.352
1.406
1.38
19
2.0
-12.0
28.55
29.67
29.11
1.427
1.484
1.46
20
2.4
-11.6
30.11
31.21
30.66
1.505
1.561
1.53
21
2.8
-11.3
31.64
32.75
32.19
1.582
1.638
1.61
22
3.2
-10.9
33.20
34.31
33.75
1.660
1.715
1.69
23
3.6
-10.5
34.74
35.84
35.29
1.737
1.792
1.76
24
4.0
-10.1
36.29
37.40
36.85
1.815
1.870
1.84
25
4.4
-9.8
37.83
38.98
38.40
1.891
1.949
1.92
26
4.8
-9.4
39.38
40.51
39.95
1.969
2.026
2.00
27
5.2
-9.0
40.94
42.05
41.50
2.047
2.102
2.07
28
5.6
-8.6
42.48
43.61
43.04
2.124
2.180
2.15
29
6.0
-8.3
44.03
45.15
44.59
2.202
2.257
2.23
30
6.4
-7.9
45.57
46.68
46.12
2.279
2.334
2.31
31
6.8
-7.5
47.11
48.24
47.67
2.356
2.412
2.38
32
7.2
-7.2
48.67
49.79
49.23
2.433
2.490
2.46
Copyright  ANPEC Electronics Corp.
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APA2606
DC Volume Control Table (Cont.)
Step
Gain(BTL)
Gain(SE)
Low (%)
High (%)
Recom(%)
Low (5V)
High(5V)
Recom(5V)
33
7.6
-6.8
50.22
51.35
34
8.0
-6.4
51.76
52.91
50.79
2.511
2.568
2.54
52.33
2.588
2.645
2.62
35
8.4
-6.1
53.31
54.42
53.87
2.666
2.721
2.69
36
8.8
-5.7
37
9.2
-5.4
54.85
55.98
55.42
2.743
2.799
2.77
56.41
57.54
56.97
2.820
2.877
2.85
38
9.6
-5.0
57.95
59.09
58.52
2.897
2.955
2.93
39
10.0
-4.6
59.50
60.65
60.08
2.975
3.033
3.00
40
10.4
-4.3
61.06
62.17
61.61
3.053
3.108
3.08
41
10.8
-3.9
62.60
63.70
63.15
3.130
3.185
3.16
42
11.2
-3.6
64.13
65.26
64.70
3.207
3.263
3.23
43
11.6
-3.2
65.69
66.84
66.26
3.284
3.342
3.31
44
12.0
-2.9
67.25
68.42
67.83
3.362
3.421
3.39
45
12.4
-2.5
68.80
69.95
69.38
3.440
3.498
3.47
46
12.8
-2.2
70.34
71.49
70.91
3.517
3.574
3.55
47
13.2
-1.8
71.90
73.04
72.47
3.595
3.652
3.62
48
13.6
-1.5
73.45
74.60
74.03
3.673
3.730
3.70
49
14.0
-1.2
75.01
76.14
75.57
3.750
3.807
3.78
50
14.4
-0.8
76.56
77.69
77.13
3.828
3.885
3.86
51
14.8
-0.5
78.10
79.25
78.67
3.905
3.963
3.93
52
15.2
-0.2
79.64
80.78
80.21
3.982
4.039
4.01
53
15.6
0.2
81.20
82.32
81.76
4.060
4.116
4.09
54
16.0
0.5
82.75
83.88
83.31
4.138
4.194
4.17
55
16.4
0.8
84.29
85.46
84.87
4.214
4.273
4.24
56
16.8
1.1
85.82
87.00
86.41
4.291
4.350
4.32
57
17.2
1.4
87.36
88.55
87.95
4.368
4.428
4.40
58
17.6
1.7
88.90
90.11
89.50
4.445
4.506
4.48
59
18.0
2.0
90.47
91.65
91.06
4.524
4.582
4.55
60
18.4
2.3
92.01
93.20
92.61
4.601
4.660
4.63
61
18.8
2.6
93.57
94.74
94.15
4.678
4.737
4.71
62
19.2
2.9
95.13
96.32
95.72
4.756
4.816
4.79
63
19.6
3.2
96.66
97.86
97.26
4.833
4.893
4.86
64
20.0
3.5
98.22
100
100.00
4.911
5.000
5.00
Copyright  ANPEC Electronics Corp.
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APA2606
Function Description
Class-D Operation
Bypass Voltage
Output = 0V
The bypass voltage is equal to VDD/2, this voltage is for
bias the internal preamplifier stages. The external ca-
VOUTP
pacitor for this reference (CB) is a critical component and
serves several important functions.
VOUTN
VOUT
(VOUTP-VOUTN)
DC Volume Control Function
The APA2606 has an internal stereo volume control whose
setting is the function of the DC voltage applied to the
IOUT
Output > 0V
VOLUME input pin. The APA2606 volume control consists
of 64 steps that are individually selected by a variable DC
VOUTP
voltage level on the VOLUME control pin. The range of the
steps controlled by the DC voltage are from +20dB to
VOUTN
VOUT
(VOUTP-VOUTN)
-80dB. Each gain step corresponds to a specific input
voltage range, as shown in the table. To minimize the
IOUT
effect of noise on the volume control pin, which can affect
the selected gain level, hysteresis and clock delay are
Output < 0V
VOUTP
implemented. The amount of hysteresis corresponds to
half of the step width, as shown in the “DC Volume Con-
VOUTN
trol Table”.
For the highest accuracy, the voltage shown in the “rec-
VOUT
(VOUTP-VOUTN)
ommended voltage” column of the table is used to select
a desired gain. This recommended voltage is exactly half-
IOUT
way between the two nearest transitions. The gains level
have are 0.4dB/step from 20dB to 0dB; 1dB/step from
0dB to -3dB; 2dB/step from -3dB to -11dB and 6dB/step
from -11dB to -41dB and the last step at -80dB as mute
Figure1. The APA2606 Output Waveform (Voltage&
Current)
mode.
The APA2606 power amplifier modulation scheme is
shown in figure 1; the outputs VOUTP and VOUTN are in phase
AGC (Non-Clipping) Function
with each other when no input signals. When output > 0V,
the duty cycle of VOUTP is greater than 50% and VOUTN is
The APA2606 provides the 64 steps non-clipping control,
and the range is from 20dB to -80dB. When the output
reaches the maximum power setting value, the internal
less than 50%; when Output <0V, the duty cycle of VOUTP is
less than 50% and VOUTN is greater than 50%. This method
Programmable Gain Amplifier (PGA) will decrease the gain
for prevent the output waveform clipping. This feature pre-
reduces the switching current across the load, and reduces the I 2R losses in the load that improve the
vents speaker damage from occurring clipping. Using
the AGC pin to set the non-clipping function and limit the
amplifier’s efficiency.
This modulation scheme has very short pulses across
output power.
the load, this making the small ripple current and very
little loss on the load, and the LC filter can be eliminated
in most applications. Added the LC filter can increase the
efficiency by filter the ripple current.
Copyright  ANPEC Electronics Corp.
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APA2606
Function Description (Cont.)
Under-Voltage Protection
Table 1: AGC Setting Threshold v.s Output Power
AGC Function
Output Power
VDD~0.45VDD
Disable AGC Function
External under voltage detection can be used to shutdown the APA2606 before an input device can generate a
8(½ VDD - VAGC )2
RL
pop. The shutdown threshold at the UVP pin is 1.2V. The
user selects a resistor divider to obtain the shutdown
Po =
0.45VDD~0.27VDD
0.27VDD~GND
threshold and hysteresis for the specific application. The
thresholds can be determined as below:
(Max Output Power 4Ω) Po=2.513W
(Max Output Power 8Ω) Po= 1.26W
VUVP=[1.2-(5.7µAxR3)]x(R1+R2)/R2
Hysteresis=4.6µA x R3 x (R1+R2)/R2
Shutdown Operation
In order to reduce power consumption while not in use,
With the condition: R3 >> R1// R2
For example, to obtain VUVP=3.7V and 0.9V hysteresis,
the APA2606 contains a shutdown function to externally
turn off the amplifier bias circuitry. This shutdown feature
R1=3kΩ, R2=1kΩ and R3=50kΩ.
turns the amplifier off when logic low is placed on the SD
pin for APA2606. The trigger point between a logic high
Vsystem
and logic low level is typically 0.65V. It is the best to switch
between ground and the supply voltage VDD to provide
R1
3kΩ
maximum device performance. By switching the SD pin
to a low level, the amplifier enters a low-consumptioncurrent state, IDD for APA2606 is in shutdown mode. On
normal operating, APA2606’s SD pin should pull to a high
R2
1kΩ
level to keep the IC out of the shutdown mode. The SD pin
should be tied to a definite voltage to avoid unwanted
R3
50kΩ
UVP Pin
1.2V
5.7µA
state changes.
Over-Current Protection
Figure 2. Under-Voltage Protection
The APA2606 monitors the output current, and when the
current exceeds the current-limit threshold, the APA2606
turn-off the output stage to prevent the output device from
damages in over-current or short-circuit condition. The IC
will turn-on the output buffer after 1ms, but if the overcurrent or short-circuits condition is still remain, it enters
the over-current protection again. The situation will circulate until the over-current or short-circuits has be removed.
Thermal Protection
The over-temperature circuit limits the junction temperature of the APA2606. When the junction temperature exceeds TJ=+150oC, a thermal sensor turns off the output
buffer, allowing the devices to cool. The thermal sensor
allows the amplifier to start-up after the junction temperature down about 125 oC. The thermal protection is designed with a 25 oC hysteresis to lower the average TJ
during continuous thermal overload conditions, increasing lifetime of the IC.
Copyright  ANPEC Electronics Corp.
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APA2606
Application Information
Square Wave into the Speaker
The value of Ci must be considered carefully because it
directly affects the low frequency performance of the circuit.
Apply the square wave into the speaker may cause the
voice coil of speaker jumping out the air gap and defacing
Where Ri is 36kΩ (minimum) and the specification calls
for a flat bass response down to 50Hz. The equation is
the voice coil. However, this depends on the amplitude of
square wave is high enough and the bandwidth of speaker
reconfigured as below:
Ci =
is higher than the square wave’s frequency. For 500kHz
switching frequency, this is not issued for the speaker
1
2πRifc
(2)
because the frequency is beyond the audio band and
can’t significantly move the voice coil, as cone movement
When the input resistance variation is considered, the Ci
is 0.08µF, so a value in the range of 0.01µF to 0.022µF
is proportional to 1/f2 for frequency out of audio band.
would be chosen. A further consideration for this capacitor is the leakage path from the input source through the
Input Resistor, Ri
140
input network (Ri + Rf, Ci) to the load. This leakage current
creates a DC offset voltage at the input to the amplifier
Gain vs. Input Resistance
that reduces useful headroom, especially in high gain
applications. For this reason, a low-leakage tantalum or
130
Input Resistance (kΩ)
120
ceramic capacitor is the best choice. When polarized capacitors are used, the positive side of the capacitor should
110
100
face the amplifiers’ input in most applications because
the DC level of the amplifiers’ inputs are held at VDD/2.
90
80
Please note that it is important to confirm the capacitor
polarity in the application.
70
60
50
40
Effective Bypass Capacitor, CB
30
As with any power amplifier, proper supply bypassing is
critical for low noise performance and high power supply
20
-40 -35 -30 -25 -20 -15 -10 -5 0
Gain (dB)
5
10 15 20
rejection.
The bypass capacitance sffects the startiup time. It is
For achieving the 64 steps gain setting, it varies the input
determined in the following wquation:
resistance network (R i & R f ) of amplifier. The input
resistor’s range form smallest to maximum is about six
TSTART-UP=0.5(sec/µF) x CB + 0.2(sec)
times. Therefore, the input high-pass filter’s low cutoff
frequency will change six times from low to high. The
(3)
The capacitor location on the bypass pin should be as
cutoff frequency can be calculated by equation 1.
close to the device as possible. The effect of a larger half
bypass capacitor is improved PSRR due to increased
Input Capacitor, Ci
In the typical application, an input capacitor, Ci, is required
half-supply stability. The selection of bypass capacitors,
especially CB, is thus dependent upon desired PSRR
to allow the amplifier to bias the input signal to the proper
DC level for optimum operation. In this case, Ci and the
requirements, click and pop performance.To avoid the
start-up pop noise occurred, choose Ci which is not larger
input impedance Ri form a high-pass filter with the corner
frequency determined in the following equation:
than CB.
f C(highpass ) =
1
2πRiCi
Copyright  ANPEC Electronics Corp.
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(1)
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APA2606
Application Information (Cont.)
Ferrite Bead Selection
If the traces form APA2606 to speaker are short, the ferrite
bead filters can reduce the high frequency radiated to
meet the FCC & CE required.
OUTP 36µH
A ferrite that has very low impedance at low frequencies
and high impedance at high frequencies (above 1 MHz)
1µF
is recommended.
OUTN
Output Low-Pass Filter
36µH
8Ω
1µF
If the traces form APA2606 to speaker are short, it doesn’t
require output filter for FCC & CE standard.
A ferrite bead may be needed if it’s failing the test for FCC
Figure 4. LC output filter for 8Ω speaker
or CE tested without the LC filter. The figure 3 is the sample
for added ferrite bead; the ferrite shows choosing high
impedance in high frequency.
OUTP 18µH
VON
2.2µF
Ferrite
Bead
OUTN
1nF
18µH
4Ω
2.2µF
Ferrite
Bead
VOP
4Ω
1nF
Figure 5. LC output filter for 4Ω speaker
Figure 4 and 5’s low pass filter cut-off frequency are 25kHz
(FC).
fC(lowpass) =
Figure 3. Ferrite bead output filter
1
(5)
2π LC
Figure 4 and 5 are examples for added the LC filter
Power-Supply Decoupling Capacitor, CS
(Butterworth), it’s recommended for the situation that the
trace form amplifier to speaker is too long and needs to
The APA2606 is a high-performance CMOS audio amplifier that requires adequate power supply decoupling to
eliminate the radiated emission or EMI.
ensure the output total harmonic distortion (THD) is as
low as possible. Power supply decoupling also prevents
the oscillations being caused by long lead length between the amplifier and the speaker.
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APA2606
Application Information (Cont.)
Power-Supply Decoupling Capacitor, CS (Cont.)
The optimum decoupling is achieved by using two different types of capacitors that target on different types of
noise on the power supply leads. For higher frequency
transients, spikes, or digital hash on the line, a good low
equivalent-series-resistance (ESR) ceramic capacitor,
typically 0.1µF placed as close as possible to the device
VDD pin for works best. For filtering lower frequency noise
signals, a large aluminum electrolytic capacitor of 10µF
or greater placed near the audio power amplifier is
recommended.
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APA2606
Package Information
SSOP-24
D
h x 45o
E
E1
SEE VIEW A
c
0.25
A
GAUGE PLANE
SEATING PLANE
A1
A2
b
L
θ
e
VIEW A
S
Y
M
B
O
L
SSOP-24 (150mil)
MILLIMETERS
MIN.
INCHES
MAX.
A
MIN.
MAX.
1.75
0.069
0.004
0.25
0.010
A1
0.10
A2
1.24
b
0.20
0.30
0.008
0.012
c
0.15
0.25
0.006
0.010
D
8.56
8.76
0.337
0.345
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.158
0.050
e
0.049
0.635 BSC
0.025 BSC
L
0.40
1.27
0.016
h
0.25
0.50
0.010
0.020
θ
0o
8o
0o
8o
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
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APA2606
Package Information
SSOP-24P
D
SEE VIEW A
h X 45o
E
E1
E2
D2
b
c
0.25
A1
NX
A
A2
e
L
GAUGE PLANE
SEATING PLANE
θ
aaa c
VIEW A
S
Y
M
B
O
L
A
SSOP-24P
MILLIMETERS
MIN.
INCHES
MAX.
MIN.
MAX.
0.004
0.010
1.75
A1
0.10
A2
1.24
b
0.20
0.069
0.25
0.049
0.008
0.30
0.012
c
0.15
0.25
0.006
0.010
D
8.56
8.76
0.337
0.345
D2
3.20
4.00
0.126
0.158
E
5.80
6.20
0.228
0.244
E1
3.80
4.00
0.150
0.158
E2
e
2.00
2.80
0.079
0.110
L
0.40
1.27
0.016
0.050
h
0.25
0.50
0.010
0.020
0o
8o
θ
aaa
0.635 BSC
0.025 BSC
0o
0.10
8o
0.004
Note : 1. Rerfence to JEDEC MO-137 AE.
2. Dimension "D" does not include mold flash, protrusions
or gate burrs. Mold flash, protrusion or gate burrs shall not
exceed 6 mil per side.
3. Dimension "E" does not include inter-lead flash or protrusions.
Inter-lead flash and protrusions shall not exceed 10 mil per side.
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
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APA2606
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
SSOP-24
Application
SSOP-24P
A
H
T1
330±2.00
50MIN
24.40+2.00
-0.00
P0
P1
P2
4.0±0.10
12.0±0.10
2.0±0.10
A
H
T1
C
d
D
330.0±2.00
50 MIN.
16.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
P0
P1
P2
D0
2.0±0.10
1.5+0.10
-0.00
4.0±0.10
8.0±0.10
C
13.0+0.50
-0.20
D0
5+0.10
-0.00
d
D
W
E1
F
1.5MIN
20.2MIN
24.0±0.30
1.75±0.10
11.5±0.10
D1
T
A0
B0
K0
13.50±0.10
2.60±0.10
W
E1
F
20.2 MIN.
16.0±0.30
1.75±0.10
7.50±0.10
D1
T
A0
B0
K0
1.5 MIN.
0.6+0.00
-0.40
6.40±0.20
9.00±0.20
2.10±0.20
1.5MIN
0.60+0.00
8.50±0.10
-0.40
(mm)
Devices Per Unit
Package Type
SSOP-24
SSOP-24P
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
Unit
Tape & Reel
Tape & Reel
Quantity
2500
2500
24
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APA2606
Taping Direction Information
SSOP-24
USER DIRECTION OF FEED
SSOP-24P
USER DIRECTION OF FEED
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APA2606
Classification Profile
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3 °C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
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APA2606
Classification Reflow Profiles (Cont.)
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
3
Package
Thickness
<2.5 mm
Volume mm
<350
235 °C
Volume mm
≥350
220 °C
≥2.5 mm
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ Tj=125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.6 - MAr., 2013
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