ANPEC APW7236

APW7236
1.5MHz Step-Up Converter for White LEDs
Features
General Description
•
Wide Input Voltage from 2.7V to 6V
•
Fixed 1.5MHz Switching Frequency
The APW7236 is a current-mode and fixed frequency
boost converter with an integrated N-FET to drive white
•
Reference Voltage : 0.2V
•
PWM Brightness Control with Wide Frequency
LEDs.
The series connection allows the LED current to be identical for uniform brightness. Its low on-resistance of NFET
and low feedback voltage reduce power loss and achieve
Range of 100Hz to 100kHz
•
Build-In Power MOSFET : 0.2Ω
•
Open-LED Protection
•
Under-Voltage Lockout Protection
•
Over-Temperature Protection
•
<1µA Quiescent Current during Shutdown
•
TSOT-23-6A and TDFN2x2-8 Package
•
Halogen and Lead Free Available
high efficiency. Fast switching frequency(1.5MHz typical)
allows using small-size inductor and both of input and
output capacitors. An over voltage protection function,
which monitors the output voltage via OVP pin, stops
switching of the IC if the OVP voltage exceeds the over
voltage threshold. An internal soft-start circuit eliminates
the inrush current during start-up.
The APW7236 also integrates under-voltage lockout, over-
(RoHS Compliant)
temperature protection, and current limit circuits to protect the IC in abnormal conditions. The APW7236 is available in a TSOT-23-6A and TDFN2x2-8 package.
Applications
•
White LED Display Backlighting
•
Cell Phone and Smart Phone
•
PDA, PMP, MP3
•
Digital Camera
Pin Configuration
TSOT-23-6A
Top View
LX 1
GND 2
FB 3
Simplified Application Circuit
VIN
ILED
L1
VOUT
TDFN2x2-8
(Top View)
4.7µH
C1
4.7µF
VIN
LX
C2
4.7µF
GND
VIN
OVP
EN
7~9 strings
GND
OFF ON
EN
6 VIN
5 OVP
4 EN
OVP
FB
1
2
3
4
8
7
GND 6
5
LX
NC
FB
GND
R1
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2012
1
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APW7236
Ordering and Marking Information
Over-Voltage Threshold Code
A: 24V B: 16V
Package Code
CT : 6 Lead TSOT-23
QB: TDFN2x2-8
APW7236
Assembly Material
Handling Code
Operating Ambient Temperature Range
I : -40 to 85oC
Temperature Range
Package Code
Over-Voltage Threshold Code
Handling Code
TR : Tape & Reel
Assembly Material
G : Halogen and Lead Free Device
APW7236CT:
36YX
Y - Over-Voltage Threshold Code
X - Date Code
APW7236QB:
36Y
X
Y - Over-Voltage Threshold Code
X - Date Code
Note: ANPEC lead-free products contain molding compounds/die attach materials and 100% matte tin plate termination finish; which
are fully compliant with RoHS. ANPEC lead-free products meet or exceed the lead-free requirements of IPC/JEDEC J-STD-020D for
MSL classification at lead-free peak reflow temperature. ANPEC defines “Green” to mean lead-free (RoHS compliant) and halogen
free (Br or Cl does not exceed 900ppm by weight in homogeneous material and total of Br and Cl does not exceed 1500ppm by
weight).
Absolute Maximum Ratings
Symbol
VIN
(Note 1)
Parameter
VIN Supply Voltage (VIN to GND)
FB, EN to GND
VLX
LX to GND Voltage
VOVP
OVP to GND
PD
Power Dissipation
TJ
Maximum Junction Temperature
TSTG
Storage Temperature
TSDR
Maximum Lead Soldering Temperature, 10 Seconds
Rating
Unit
-0.3 ~ 7
V
-0.3 ~ VIN
V
-0.3 ~ 27.5
V
-0.3 ~ 27.5
V
Internally Limit
W
150
o
C
-65 ~ 150
o
C
260
o
C
Note1: Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device
reliability
Thermal Characteristics
Symbol
θJA
θJC
Parameter
Junction-to-Ambient Resistance in Free Air
Typical Value
Unit
(Note 2)
TSOT-23-6A
TDFN2x2-6
220
165
o
TSOT-23-6A
TDFN2x2-6
120
20
o
C/W
Junction-to-Case Resistance
C/W
Note 2: θJA is measured with the component mounted on a high effective thermal conductivity test board in free air.
Copyright  ANPEC Electronics Corp.
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APW7236
Recommended Operating Conditions (Note 3)
Symbol
VIN
Parameter
Range
Unit
VIN Supply Voltage (VIN to GND)
2.7 ~ 6
V
VOVP
VOUT to GND
VIN ~ 22
V
CIN
Input Capacitor
4.7~
µF
Output Capacitor
4.7 ~
µF
COUT
L1
Converter Output Inductor
2.2 ~ 10
µH
TA
Ambient Temperature
-40 ~ 85
o
-40 ~ 125
o
TJ
Junction Temperature
C
C
Note 3: Refer to the application circuit.
Electrical Characteristics
Refer to figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA =25°C.
Sym bol
Pa rameter
APW7236
Test Conditions
Min.
Typ.
Max.
Unit
SUPPLY CURRENT
VIN
Input Voltage Range
2.5
-
6
VFB = 0.4V, no switching
-
300
-
µA
VFB = GND, switching
-
2
5
mA
EN=GND
-
-
1
µA
UVLO Threshold Voltage
VIN Rising
2.0
2.2
2.4
V
UVLO Hysteresis Voltage
VIN Falling
50
100
150
mV
VIN=2.7V~6V, TA = 25 C
0.185
0.2
0.215
V
VIN=2.7V~6V, TA = -40 ~ 85 o C
0.18
-
0.22
V
-50
-
50
nA
1.25
1.5
1.75
MHz
IDD 1
IDD 2
Input DC Bias Current
ISD
V
UNDER-VOLTAGE LOCKOUT
REFERENCE AND OUTPUT VOLTAGE
o
VREF
IFB
Regulated Feedback Voltage
APW7236A/B
FB Input Current
INTERNAL POWER SWITCH AND SCHOTTKY DIODE
F SW
Switching Frequency
R ON
Power Switch On Resistance
-
0.2
-
Ω
ILIM
Power Switch Current Limit
-
2
-
A
-1
-
1
µA
92
95
98
%
LX Leakage Curr ent
D MAX
VEN = 0V, V LX = 0V or 6V, VIN = 6V
LX Maximum Duty Cycle
Copyright  ANPEC Electronics Corp.
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APW7236
Electrical Characteristics (Cont.)
Refer to figure 1 in the “Typical Application Circuits”. These specifications apply over VIN = 3.6V, TA =25°C.
Symbol
Parameter
APW7236
Test Conditions
Unit
Min.
Typ.
Max.
APW7236A
22
24
27.5
V
APW7236B
OUTPUT OVER-VOLTAGE PROTECTION
Over Voltage Threshold
VOUT Rising
14.5
16
20
V
Over Voltage Hysteresis
VOVP Falling
-
3
-
V
OVP Leakage
VOVP =20V
-
50
-
µA
Enable Voltage Threshold
VEN Rising
1
-
-
V
Shutdown Voltage Threshold
VEN Falling
-
-
0.4
V
EN Leakage Current
VEN = 0 ~ 6V, VIN = 6V
-2
-
2
µA
EN Minimum On Pluse Width
VEN = 0 ~ 6V, VIN = 6V, PWM Dimmimg
Frequency=100Hz to 100kHz
-
800
-
ns
TJ Rising
-
150
-
o
(Note 4)
Over-Temperature Protection
Hysteresis (Note 4)
TJ Falling
-
40
-
o
ENABLE AND SHUTDOWN
OVER-TEMPERATURE PROTECTION
TOTP
Over-Temperature Protection
C
C
Note 4: Guaranteed by design, not production tested.
Copyright  ANPEC Electronics Corp.
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APW7236
Typical Operating Characteristics
(Refer to the application circuit in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, 6WLEDs unless
otherwise specified )
EN Dimming Duty Cycle vs.
WLED Current
100
250
80
200
L=10uH
L=4.7uH
60
WLED Current (mA)
Efficiency (%)
Supply Voltage vs. Efficiency
40
20
150
100kHz
100
50kHz
50
20kHz
0
2.7
0
3
3.3
3.6
3.9
4.2
4.5
4.8
5.1
0
10
30
40
50
60
70
80
90 100
Supply Voltage vs. Maximum
Duty Cycle
Supply Voltage vs. WLED Current
210
100
Maximum Duty Cycle (%)
WLED Current (mA)
20
EN Dimming Duty Cycle (%)
Supply Voltage (V)
205
200
195
90
80
70
60
50
190
40
2.7
3.2
3.7
4.2
4.7
5.2
2
Supply Voltage (V)
2.5
3
3.5
4
4.5
5
5.5
6
Supply Voltage (V)
Supply Voltage vs. Switch ON Resistance
Switch ON Resistance (° )
0.5
0.4
0.3
0.2
0.1
0
2
2.5
3
3.5
4
4.5
5
5.5
6
Supply Voltage (V)
Copyright  ANPEC Electronics Corp.
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APW7236
Operating Waveforms
(Refer to the application circuit in the section "Typical Application Circuits", VIN=3.6V, TA=25oC, 6WLEDs unless
otherwise specified )
EN Goes High- Enable
EN Goes Low- Shutdown
1
1
2
2
3
3
4
4
CH1: VEN (2V/div)
CH2: VOVP (5V/div)
CH3: VLX (10V/div)
CH4: IIN (500mA/div)
Time: 1ms/div
CH1: VEN (2V/div)
CH2: VOVP (5V/div)
CH3: VLX (10V/div)
CH4: IIN (500mA/div)
Time: 10ms/div
Normal Operation
OPEN-LED Protection
2
2
1
1
3
3
CH1: VOVP (2V/div)
CH2: VLX (10V/div)
CH3: IL (500mA/div)
Time: 2µs/div
CH1: VOVP (5V/div)
CH2: VLX (10V/div)
CH3: IL (500mA/div)
Time: 10ms/div
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APW7236
Pin Description
PIN
NO.
FUNCTION
NAME
TDFN2x2-8
TSOT-23-6A
1, 5
2
GND
Power and signal ground pin.
2
6
VIN
Main Supply Pin. Must be closel y decoupled to GND with a 4.7µF or greater ceramic
capacitor.
3
5
OVP
Converter Output and Over-Voltage Protection Input Pin.
4
4
EN
Enab le Control Input. Forcing this pin above 1.0V enables the device, or forcing this
pin below 0.4V to shut it down. In shutdown, all functions are disabled to decrease
the supply current below 1µA. Do not leave this pin floating.
6
3
FB
Feedback Pin. Connect this pin to cathode of the lowest LED and current-sense
resistor (R1). Calculate resistor value according to R1=VREF /I LED .
7
-
NC
No Internal Connection.
8
1
LX
Switch pin. Connect this pin to inductor/diode here.
Exposed Pad
-
GND
Connecting this pad to GND.
Block Diagram
VIN
OVP
UVLO
LX
EN
Control Logic
Thermal
Shutdown
Σ
Oscillator
ICMP
EAMP
FB
GND
COMP
VREF
Soft-start
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APW7236
Typical Application Circuit
VIN
ILED
L1
VOUT
4.7µH
C1
4.7µF
VIN
GND
OFF ON
C2
4.7µF
LX
up to 6
strings
OVP
FB
EN
R1
VIN
ILED
L1
VOUT
4.7µH
C1
4.7µF
VIN
C2
4.7µF
LX
7~13
strings
GND
OFF ON
EN
OVP
FB
R1
Copyright  ANPEC Electronics Corp.
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APW7236
Function Description
Main Control Loop
Over-Temperature Protection (OTP)
The APW7236 is a constant frequency current-mode
switching regulator. During normal operation, the inter-
The over-temperature circuit limits the junction temperature of the APW7236. When the junction temperature ex-
nal N-channel power MOSFET is turned on each cycle
when the oscillator sets an internal RS latch and turned
ceeds 150 oC, a thermal sensor turns off the power
MOSFET, allowing the device to cool. The thermal sen-
off when an internal comparator (ICMP) resets the latch.
The peak inductor current at which ICMP resets the RS
sor allows the converter to start a soft-start process and
regulate the LEDs current again after the junction tem-
latch is controlled by the voltage on the COMP node, which
is the output of the error amplifier (EAMP). An external
perature cools by 40oC. The OTP is designed with a 40oC
hysteresis to lower the average Junction Temperature
current-sense resistor connected between cathode of the
lowest LED and ground allows the EAMP to receive a
(TJ) during continuous thermal overload conditions, increasing the lifetime of the device.
current feedback voltage VFB at FB pin. When the LEDs
voltage decreases to cause the LEDs current to decrease,
Enable/Shutdown
Driving EN to ground places the APW7236 in shutdown
it causes a slightly decrease in VFB relative to the reference voltage, which in turn causes the COMP voltage to
increase until the LEDs current reaches the set point.
mode. When in shutdown, the internal power MOSFET
turns off, all internal circuitry shuts down and the quies-
VIN Under-Voltage Lockout (UVLO)
cent supply current reduces to 1µA maximum. This pin
also could be used as a digital input allowing brightness
The Under-Voltage Lockout (UVLO) circuit compares the
input voltage at VIN with the UVLO threshold (2.2V rising,
controlled by using a PWM signal with frequency from
100Hz to 100kHz. The 0% duty cycle of PWM signal corre-
typical) to ensure the input voltage is high enough for
reliable operation. The 100mV (typ) hysteresis prevents
sponds to zero LEDs current and 100% corresponds to
full one. Suggestion dimmimg duty range is from 8% to
supply transients from causing a restart. Once the input
voltage exceeds the UVLO rising threshold, startup begins.
100% at 100kHz dimmimg frequency.
When the input voltage falls below the UVLO falling
threshold, the controller turns off the converter.
Open-LED Protection
In driving LED applications, the feedback voltage on FB
Soft-Start
pin falls down if one of the LEDs, in series, is failed.
Meanwhile, the converter unceasingly boosts the output
The APW7236 has a built-in soft-start to control the N
channel MOSFET current raises during start-up. During
voltage like an open-loop operation. Therefore, an overvoltage protection monitoring the output voltage via OVP
soft-start, an internal ramp voltage connected to one of
the inverting inputs of the current limit comparator. The
pin is integrated into the chip to prevent the LX and the
output voltages from exceeding their maximum voltage
inductor current limit is proportional to the voltage. When
the threshold voltage of the internal soft-start comparator
ratings. Once the voltage on the OVP pin rises above the
OVP threshold, the converter stops switching and pre-
is reached, the full current limit is released.
vents the output voltage from rising. The converter can
work again when the OVP voltage falls below the falling
Current-Limit Protection
The APW7236 monitors the inductor current, flowing
through the N-channel MOSFET, and limits the current
of OVP voltage threshold.
peak at current-limit level to prevent loads and the device
from damages in overload conditions.
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APW7236
Application Information
Input Capacitor Selection
The peak inductor current is calculated as the following
equation:
The input capacitor (CIN) reduces the current peaks drawn
from the input supply and reduces noise injection into the
IPEAK = IIN(MAX ) +
IC. The reflected ripple voltage will be smaller with larger
CIN. For reliable operation, it is recommended to select
VIN
the capacitor voltage rating at least 1.2 times higher than
the maximum input voltage. The capacitors should be
IIN
CIN
placed close to the VIN and GND.
1 VIN ⋅ (VOUT − VIN )
⋅
2 VOUT ⋅ L ⋅ FSW
IL
LX
N-FET
IOUT
D1
VOUT
ESR
ISW
COUT
Inductor Selection
IL
For high efficiencies, the inductor should have a low dc
resistance to minimize conduction losses. Especially at
ILIM
high-switching frequencies the core material has a higher
impact on efficiency. When using small chip inductors,
IPEAK
∆IL
the efficiency is reduced mainly due to higher inductor
core losses. This needs to be considered when select-
IIN
ing the appropriate inductor. The inductor value determines the inductor ripple current. The larger the inductor
ISW
value, the smaller the inductor ripple current and the lower
the conduction losses of the converter. Conversely, larger
inductor values cause a slower load transient response.
A reasonable starting point for setting ripple current, ∆IL,
is 30% to 50% of the average inductor current. The rec-
ID
ommended inductor value can be calculated as below:
 V
L ≥  IN
 VOUT
where
IOUT
2

VOUT − VIN
η
 ×
×
 F ×I
 ∆IL 
SW
OUT (MAX )



 IL (AVG ) 


Output Capacitor Selection
The current-mode control scheme of the APW7236 al-
VIN = input voltage
lows the usage of tiny ceramic capacitors. The higher
capacitor value provides good load transient response.
VOUT = output voltage
FSW = switching frequency in MHz
Ceramic capacitors with low ESR values have the lowest
output voltage ripple and are recommended. If required,
IOUT = maximum output current in amp.
tantalum capacitors may be used as well. The output ripple
is the sum of the voltages across the ESR and the ideal
η = Efficiency
∆IL /IL(AVG) = inductor ripple current/average current
output capacitor.
(0.3 to 0.5 typical)
Δ VOUT = ΔVESR + ΔVCOUT
To avoid saturation of the inductor, the inductor should be
rated at least for the maximum input current of the con-
∆VESR ≈ IPEAK × RESR
verter plus the inductor ripple current. The maximum input current is calculated as below:
IIN(MAX ) =
∆VESR ≈ IPEAK × RESR
IOUT (MAX ) × VOUT
where IPEAK is the peak inductor current.
VIN × η
Copyright  ANPEC Electronics Corp.
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APW7236
Application Information (Cont.)
Output Capacitor Selection (Cont.)
For ceramic capacitor application, the output voltage ripple
is dominated by the ∆VCOUT. When choosing the input and
output ceramic capacitors, the X5R or X7R with their
good temperature and voltage characteristics are
recommended.
Setting the LED Current
In figure 1, the converter regulates the voltage on FB pin,
connected with the cathod of the lowest LED and the current-sense resistor R1, at 0.2V (typical). Therefore, the
current (ILED), flowing via the LEDs and the R1, is calculated by the following equation:
ILED =
0 .2 V
R1
Layout Considerations
For all switching power supplies, the layout is an important step in the design; especially at high peak currents
and switching frequencies. If the layout is not carefully
done, the regulator might show noise problems and duty
cycle jitter.
1. The input capacitor should be placed close to the VIN
and GND. Connecting the capacitor with VIN and GND
pins by short and wide tracks without using any via holes
for good filtering and minimizing the voltage ripple.
2. To minimize copper trace connections that can inject
noise into the system, the inductor should be placed
as close as possible to the LX pin to minimize the noise
coupling into other circuits.
3. The feedback network should be routed away from the
inductor. The feedback pin and feedback network
should be shielded with a ground plane or trace to
minimize noise coupling into this circuit.
4. A star ground connection or ground plane minimizes
ground shifts and noise is recommended.
Copyright  ANPEC Electronics Corp.
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APW7236
Package Information
TDFN2x2-8
A
b
E
D
A1
D2
A3
L
E2
Pin 1 Cornar
e
S
Y
M
B
O
L
TDFN2x2-8
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.70
0.80
0.028
0.031
A1
0.00
0.05
0.000
0.002
0.012
A3
0.20 REF
0.008 REF
b
0.18
0.30
0.007
D
1.90
2.10
0.075
0.083
D2
1.00
1.60
0.039
0.063
E
1.90
2.10
0.075
0.083
E2
0.60
1.00
0.024
0.039
e
L
0.50 BSC
0.30
0.020 BSC
0.012
0.45
0.018
Note : 1. Followed from JEDEC MO-229 WCCD-3.
Copyright  ANPEC Electronics Corp.
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APW7236
Package Information
TSOT-23-6A
D
e
E
E1
SEE VIEW A
b
c
0.25
A
GAUGE PLANE
SEATING PLANE
L
A1
A2
e1
VIEW A
S
Y
M
B
O
L
TSOT-23-6A
MILLIMETERS
INCHES
MIN.
MAX.
MIN.
MAX.
A
0.70
1.00
0.028
0.039
A1
0.01
0.10
0.000
0.004
A2
0.70
0.90
0.028
0.035
b
0.30
0.50
0.012
0.020
c
0.08
0.20
0.003
0.008
D
2.70
3.10
0.106
0.122
0.118
0.071
E
2.60
3.00
0.102
E1
1.40
1.80
0.055
e
0.95 BSC
e1
1.90 BSC
L
0
0.037 BSC
0.075 BSC
0.30
0.60
0°
8°
0.012
0.024
0°
8°
Note : Dimension D and E1 do not include mold flash, protrusions or gate
burrs. Mold flash, protrusion or gate burrs shall not exceed 10 mil
per side.
Copyright  ANPEC Electronics Corp.
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APW7236
Carrier Tape & Reel Dimensions
P0
P2
P1
A
B0
W
F
E1
OD0
K0
A0
A
OD1 B
B
T
SECTION A-A
SECTION B-B
H
A
d
T1
Application
TDFN2x2-8
Application
TSOT-23-6A
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.20
1.75±0.10
3.50±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
1.5 MIN.
0.6+0.00
-0.4
3.35 MIN
3.35 MIN
1.30±0.20
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
A
H
T1
C
d
D
W
E1
F
178.0±2.00
50 MIN.
8.4+2.00
-0.00
13.0+0.50
-0.20
1.5 MIN.
20.2 MIN.
8.0±0.30
1.75±0.10
3.5±0.05
P0
P1
P2
D0
D1
T
A0
B0
K0
4.0±0.10
4.0±0.10
2.0±0.05
1.5+0.10
-0.00
1.0 MIN.
0.6+0.00
-0.40
3.20±0.20
3.10±0.20
1.50±0.20
(mm)
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2012
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APW7236
Devices Per Unit
Package Type
Unit
Quantity
TDFN2x2-8
Tape & Reel
3000
TSOT-23-6A
Tape & Reel
3000
Taping Direction Information
TDFN2x2-8
USER DIRECTION OF FEED
TSOT-23-6A
USER DIRECTION OF FEED
AAAX
AAAX
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2012
AAAX
AAAX
15
AAAX
AAAX
AAAX
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APW7236
Classification Profile
Classification Reflow Profiles
Profile Feature
Sn-Pb Eutectic Assembly
Pb-Free Assembly
100 °C
150 °C
60-120 seconds
150 °C
200 °C
60-120 seconds
3 °C/second max.
3°C/second max.
183 °C
60-150 seconds
217 °C
60-150 seconds
See Classification Temp in table 1
See Classification Temp in table 2
Time (tP)** within 5°C of the specified
classification temperature (Tc)
20** seconds
30** seconds
Average ramp-down rate (Tp to Tsmax)
6 °C/second max.
6 °C/second max.
6 minutes max.
8 minutes max.
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
Average ramp-up rate
(Tsmax to TP)
Liquidous temperature (TL)
Time at liquidous (tL)
Peak package body Temperature
(Tp)*
Time 25°C to peak temperature
* Tolerance for peak profile Temperature (Tp) is defined as a supplier minimum and a user maximum.
** Tolerance for time at peak profile temperature (tp) is defined as a supplier minimum and a user maximum.
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2012
16
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APW7236
Classification Reflow Profiles
Table 1. SnPb Eutectic Process – Classification Temperatures (Tc)
Package
Thickness
<2.5 mm
≥2.5 mm
Volume mm
<350
235 °C
220 °C
3
Volume mm
≥350
220 °C
220 °C
3
Table 2. Pb-free Process – Classification Temperatures (Tc)
Package
Thickness
<1.6 mm
1.6 mm – 2.5 mm
≥2.5 mm
Volume mm
<350
260 °C
260 °C
250 °C
3
Volume mm
350-2000
260 °C
250 °C
245 °C
3
Volume mm
>2000
260 °C
245 °C
245 °C
3
Reliability Test Program
Test item
SOLDERABILITY
HOLT
PCT
TCT
HBM
MM
Latch-Up
Method
JESD-22, B102
JESD-22, A108
JESD-22, A102
JESD-22, A104
MIL-STD-883-3015.7
JESD-22, A115
JESD 78
Description
5 Sec, 245°C
1000 Hrs, Bias @ 125°C
168 Hrs, 100%RH, 2atm, 121°C
500 Cycles, -65°C~150°C
VHBM≧2KV
VMM≧200V
10ms, 1tr≧100mA
Customer Service
Anpec Electronics Corp.
Head Office :
No.6, Dusing 1st Road, SBIP,
Hsin-Chu, Taiwan, R.O.C.
Tel : 886-3-5642000
Fax : 886-3-5642050
Taipei Branch :
2F, No. 11, Lane 218, Sec 2 Jhongsing Rd.,
Sindian City, Taipei County 23146, Taiwan
Tel : 886-2-2910-3838
Fax : 886-2-2917-3838
Copyright  ANPEC Electronics Corp.
Rev. A.4 - Sep., 2012
17
www.anpec.com.tw