AO4494 30V N-Channel MOSFET General Description Product Summary The AO4494 combines advanced trench MOSFET technology with a low resistance package to provide extremely low RDS(ON). This device is for PWM applications. VDS (V) = 30V ID = 18A (VGS = 10V) RDS(ON) < 6.5mΩ RDS(ON) < 9.5mΩ (VGS = 10V) (VGS = 4.5V) 100% UIS Tested 100% Rg Tested SOIC-8 Top View D D D Bottom View D D G G S S S S Absolute Maximum Ratings TA=25°C unless otherwise noted Parameter Symbol VDS Drain-Source Voltage VGS Gate-Source Voltage Continuous Drain Current TC=25°C Pulsed Drain Current C Avalanche Current C Repetitive avalanche energy L=0.1mH TC=25°C Power Dissipation B TC=70°C C Thermal Characteristics Parameter Maximum Junction-to-Ambient A Maximum Junction-to-Ambient A D Maximum Junction-to-Lead Alpha & Omega Semiconductor, Ltd. ±20 V A 14 IDM 130 IAR 32 A 51 mJ EAR 3.1 PD Junction and Storage Temperature Range Units V 18 ID TC=70°C Maximum 30 TJ, TSTG -55 to 150 Symbol t ≤ 10s Steady-State Steady-State W 2 RθJA RθJL Typ 28 59 16 °C Max 40 75 24 Units °C/W °C/W °C/W www.aosmd.com AO4494 Electrical Characteristics (TJ=25°C unless otherwise noted) Symbol Parameter STATIC PARAMETERS BVDSS Drain-Source Breakdown Voltage IDSS IGSS VGS(th) ID(ON) Zero Gate Voltage Drain Current Conditions Min ID=250µA, VGS=0V Typ 30 1 TJ=125°C 5 Gate-Body leakage current VDS=0V, VGS= ±20V VDS=VGS ID=250µA 1.5 VGS=10V, VDS=5V 130 VGS=10V, ID=18A ±100 nA 2.5 V 5.4 6.5 8.4 10.1 9.5 A Static Drain-Source On-Resistance VGS=4.5V, ID=16A 7.5 gFS Forward Transconductance VDS=5V, ID=18A 70 VSD Diode Forward Voltage IS=1A,VGS=0V IS Maximum Body-Diode Continuous Current DYNAMIC PARAMETERS Ciss Input Capacitance Coss Output Capacitance Reverse Transfer Capacitance Rg Gate resistance VGS=0V, VDS=0V, f=1MHz SWITCHING PARAMETERS Qg(10V) Total Gate Charge Qg(4.5V) Total Gate Charge Qgs Gate Source Charge 0.75 1270 VGS=0V, VDS=15V, f=1MHz VGS=10V, VDS=15V, ID=18A 1590 mΩ mΩ S 1 V 3 A 1900 pF 170 240 310 pF 87 145 200 pF 0.8 1.5 2.3 Ω 24 30 36 nC 12 15 18 nC 4.2 5.2 6.2 nC 4.7 7.8 11 nC Qgd Gate Drain Charge tD(on) Turn-On DelayTime tr Turn-On Rise Time tD(off) Turn-Off DelayTime tf trr Turn-Off Fall Time IF=18A, dI/dt=500A/µs 22 28 34 Qrr Body Diode Reverse Recovery Charge IF=18A, dI/dt=500A/µs 19 24 30 Body Diode Reverse Recovery Time µA 2 RDS(ON) TJ=125°C Units V VDS=30V, VGS=0V Gate Threshold Voltage On state drain current Crss Max VGS=10V, VDS=15V, RL=0.83Ω, RGEN=3Ω 6.7 ns 3.5 ns 22.5 ns 4 ns ns nC A. The value of RθJA is measured with the device mounted on 1in2 FR-4 board with 2oz. Copper, in a still air environment with TA =25°C. The Power dissipation PDSM is based on R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design. B. The power dissipation PD is based on TJ(MAX)=150°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. C. Repetitive rating, pulse width limited by junction temperature TJ(MAX)=150°C. Ratings are based on low frequency and duty cycles to keep initial TJ =25°C. D. The RθJA is the sum of the thermal impedence from junction to case RθJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300µs pulses, duty cycle 0.5% max. F. These curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of TJ(MAX)=150°C. The SOA curve provides a single pulse ratin g. Rev1: Nov. 2010 COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE. Alpha & Omega Semiconductor, Ltd. www.aosmd.com AO4494 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 140 100 10V 5V 120 VDS=5V 6V 4.5V 80 100 60 4V ID(A) ID (A) 7V 80 60 40 3.5V 40 125°C 20 20 25°C VGS=3V 0 0 0 1 2 3 4 0 5 1 3 4 5 6 VGS(Volts) Figure 2: Transfer Characteristics (Note E) VDS (Volts) Fig 1: On-Region Characteristics (Note E) 12 Normalized On-Resistance 1.8 10 RDS(ON) (mΩ ) 2 VGS=4.5V 8 6 VGS=10V 4 1.6 VGS=10V ID=18A 1.4 17 5 VGS=4.5V 2 ID=16A 10 1.2 1 0.8 2 0 5 0 10 15 20 25 30 ID (A) Figure 3: On-Resistance vs. Drain Current and Gate Voltage (Note E) 25 50 75 100 125 150 175 0 Temperature (°C) Figure 4: On-Resistance vs. Junction 18 Temperature (Note E) 25 1.0E+02 ID=18A 1.0E+01 20 40 15 IS (A) RDS(ON) (mΩ ) 1.0E+00 125°C 1.0E-01 125°C 1.0E-02 10 25°C 1.0E-03 5 25°C 1.0E-04 1.0E-05 0 2 4 6 8 10 VGS (Volts) Figure 5: On-Resistance vs. Gate-Source Voltage (Note E) Alpha & Omega Semiconductor, Ltd. 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VSD (Volts) Figure 6: Body-Diode Characteristics (Note E) www.aosmd.com AO4494 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS 2200 10 2000 VDS=15V ID=18A Ciss 1800 Capacitance (pF) VGS (Volts) 8 6 4 2 1600 1400 1200 1000 800 600 Coss 400 200 0 0 5 10 15 20 25 Qg (nC) Figure 7: Gate-Charge Characteristics 30 0 90.00 10µs 70.00 60.00 5 10 15 20 25 VDS (Volts) Figure 8: Capacitance Characteristics 30 1000.0 TA=25°C RDS(ON) limited 80.00 100.0 10µs TA=100°C TA=150°C 50.00 TA=125°C ID (Amps) ID(A), Peak Avalanche Current Crss 0 10.0 100µs 1ms 1.0 10ms 100ms 10s DC 40.00 TJ(Max)=150°C TA=25°C 0.1 30.00 0.0 20.00 0.000001 0.1 0.00001 0.0001 0.001 Time in avalanche, tA (s) Figure 12: Single Pulse Avalanche capability (Note C) 1 10 100 VDS (Volts) Figure 9: Maximum Forward Biased Safe Operating Area (Note F) 1000 TA=25°C Power (W) 100 10 1 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 Pulse Width (s) Figure 15: Single Pulse Power Rating Junction-to-Ambient (Note F) Alpha & Omega Semiconductor, Ltd. www.aosmd.com AO4494 TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS Zθ JA Normalized Transient Thermal Resistance 10 1 D=Ton/T TJ,PK=TA+PDM.ZθJA.RθJA In descending order D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 40 RθJA=40°C/W 0.1 PD 0.01 Single Pulse Ton 0.001 0.00001 0.0001 0.001 0.01 0.1 1 T 10 100 1000 Pulse Width (s) Figure 16: Normalized Maximum Transient Thermal Impedance (Note F) Alpha & Omega Semiconductor, Ltd. www.aosmd.com AO4494 Gate Charge Test Circuit & Waveform Vgs Qg 10V + + Vds VDC - Qgs Qgd VDC - DUT Vgs Ig Charge Resistive Switching Test Circuit & Waveforms RL Vds Vds Vgs 90% + Vdd DUT VDC - Rg 10% Vgs Vgs t d(on) tr t d(off) t on tf t off Unclamped Inductive Switching (UIS) Test Circuit & Waveforms L 2 EAR= 1/2 LIAR Vds BVDSS Vds Id + Vdd Vgs Vgs I AR VDC - Rg Id DUT Vgs Vgs Diode Recovery Test Circuit & Waveforms Q rr = - Idt Vds + DUT Vgs Vds Isd L Vgs Ig Alpha & Omega Semiconductor, Ltd. Isd + Vdd t rr dI/dt I RM Vdd VDC - IF Vds www.aosmd.com