TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 features typical applications Window-Watchdog With Programmable Applications Using DSPs, Microcontrollers, Delay and Window Ratio 6-Pin SOT-23 Package Supply Current of 9 µA (Typ) Power On Reset Generator With a Fixed Delay Time of 25 ms Precision Supply Voltage Monitor 2.5 V, 3 V, 3.3 V, 5 V Open-Drain Reset Output Temperature Range . . . –40°C to 85°C or Microprocessors Safety Critical Systems Automotive Systems Heating Systems TPS3813 DBV PACKAGE (TOP VIEW) description The TPS3813 family of supervisory circuits provides circuit initialization and timing supervision, primarily for DSPs and processor-based systems. WDI 1 6 RESET GND 2 5 WDR WDT 3 4 VDD During power on, RESET is asserted when supply voltage (VDD) becomes higher than 1.1 V. Thereafter, the supervisory circuit monitors VDD and keeps RESET active as long as VDD remains below the threshold voltage (VIT). An internal timer delays the return of the output to the inactive state (high) to ensure proper system reset. The delay time, td = 25 ms typical, starts after VDD has risen above the threshold voltage (VIT). When the supply voltage drops below the threshold voltage (VIT), the output becomes active (low) again. No external components are required. All the devices of this family have a fixed-sense threshold voltage (VIT) set by an internal voltage divider. For safety critical applications the TPS3813 family incorporates a so-called window-watchdog with programmable delay and window ratio. The upper limit of the watchdog time-out can be set by either connecting WDT to GND, VDD, or using an external capacitor. The lower limit and thus the window ratio is set by connecting WDR to GND or VDD. The supervised processor now needs to trigger the TPS3813 within this window not to assert a RESET. typical operating circuit VDD 0.1 µF 0.1 µF R VDD WDR RESET VDD RESET TPS3813 WDT CWP WDI GND uC I/O GND Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 description continued The product spectrum is designed for supply voltages of 2.5 V, 3 V, 3.3 V, and 5 V. The circuits are available in a 6-pin SOT–23 package. The TPS3813 devices are characterized for operation over a temperature range of –40°C to 85°C. PACKAGE INFORMATION DEVICE NAME THRESHOLD VOLTAGE MARKING TPS3813J25DBV 2.25 V PCDI PEZI TA –40C 40C to 85C TPS3813L30DBV 2.64 V TPS3813K33DBV 2.93 V PFAI TPS3813I50DBV 4.55 V PFBI ordering information TPS381 3 J 25 DBV R Reel Package Nominal Supply Voltage Nominal Threshold Voltage Functionality Family TPS3813 FUNCTION/TRUTH TABLE VDD > VIT 0 RESET 1 H L functional schematic RESET Oscillator WDT Reset Logic and Timer Detection Circuit VDD GND Power to circuitry Watchdog Ratio Detection R1 + _ WDR R2 GND GND Bandgap Voltage Reference Rising Edge Detection GND 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 WDI TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 timing diagram VDD VIT 1.1 V t td td RESET td Output Condition Undefined Output Condition Undefined t WDI t 3rd Window With Lower Boundary 2nd Window With Lower Boundary 1st Window Without Lower Boundary 1st Window Without Lower Boundary 1st Window Without Lower Boundary 2nd Window With Lower Boundary 3rd Window With Lower Boundary Trigger Pulse in Lower Window Boundary Terminal Functions TERMINAL NAME NO. I/O DESCRIPTION GND 2 I Ground RESET 6 O Open-drain reset output VDD WDI 4 I Supply voltage and supervising input 1 I Watchdog timer input WDR 5 I Selectable watchdog window ratio input WDT 3 I Programmable watchdog delay input absolute maximum ratings over operating free-air temperature (unless otherwise noted)† Supply voltage, VDD (see Note1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V All other pins (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 7 V Maximum low output current, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA Maximum high output current, IOH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –5 mA Input clamp current, IIK (VI < 0 or VI > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to 85°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C Soldering temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: All voltage values are with respect to GND. For reliable operation the device should not be operated at 7 V for more than t = 1000h continuously. DISSIPATION RATING TABLE PACKAGE TA <25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DBV 437 mW 3.5 mW/°C 280 mW 227 mW POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 recommended operating conditions at specified temperature range Supply voltage, VDD Input voltage, VI High-level input voltage, VIH MIN MAX UNIT 2 6 V 0 VDD + 0.3 V 0.7 x VDD Low-level input voltage, VIL V 0.3 x VDD V 100 ns/V Input transition rise and fall rate, ∆t/∆V Pulse width of WDI trigger pulse, tw 50 Operating free-air temperature range, TA –40 ns °C 85 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VOL VIT TEST CONDITIONS Low-level out output ut voltage VDD = 2 V to 6 V, VDD = 3.3 V Power up reset voltage (see Note 2) VDD = 6 V, VDD ≥ 1.1 V, Negative-going in input ut threshold voltage g (see Note 3) Hysteresis High-level input current IIL Low level input current Low-level IOH High-level output current IDD Supply current MAX 0.4 IOL= 50 µA 0.2 V V TPS3813J25 2.2 2.25 2.3 2.58 2.64 2.7 2.87 2.93 3 4.45 4.55 4.65 TA = –40°C 40°C – 85°C V 0.4 TPS3813L30 TPS3813K33 UNIT IOL = 2 mA IOL = 4 mA TPS3813J25 30 TPS3813L30 35 TPS3813K33 40 TPS3813I50 IIH TYP 0.2 TPS3813I50 Vhys MIN IOL = 500 µA mV 60 WDI, WDR WDI = VDD = 6 V, WDR = VDD = 6 V WDT WDT = VDD = 6 V, VDD > VIT RESET = High WDI, WDR WDI = 0 V, WDR = 0 V, VDD = 6 V WDT WDT = 0 V, VDD > VIT, RESET = High –25 25 –100 100 –25 25 –100 100 nA VDD = VIT + 0.2 V, VOH = VDD VDD = 2 V output unconnected 25 VDD = 5 V output unconnected VI = 0 V to VDD 9 13 20 25 nA µA A Ci Input capacitance 5 pF NOTES: 2. The lowest supply voltage at which RESET becomes active. tr,VDD ≥ 15 µs/V. 3. To ensure best stability of the threshold voltage, a bypass capacitor (ceramic, 0.1 µF) should be placed near to the supply terminals. timing requirements at RL = 1 MΩ, CL = 50 pF, TA = –40°C to 85°C PARAMETER tw 4 Pulse width at VDD TEST CONDITIONS VDD = VIT– + 0.2 V, POST OFFICE BOX 655303 VDD = VIT– – 0.2 V • DALLAS, TEXAS 75265 MIN 3 TYP MAX UNIT µs TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 switching characteristics at RL = 1 MΩ, CL = 50 pF, TA = –40°C to 85°C PARAMETER td tt(out) TEST CONDITIONS VDD ≥ VIT + 0.2 V, See timing diagram WDT = 0 V Delay time Watchdog time-out Upper limit WDT = VDD tPHL Propagation (delay) time, high-to-low-level output MAX 25 35 0.15 0.25 0.35 1.5 2.5 3.5 See Note 5 WDR = 0 V, WDT = 0 V 1:31.8 WDR = 0 V, WDT = Programmable VDD to RESET delay TYP 15 WDT = Programmable (see Note 4) WDR = 0 V, WDT = VDD Watchdog window ratio MIN s ms 1:32 1:124.9 WDR = VDD, WDT = VDD 1:127.7 VIH = VIT + 0.2 V ms 1:25.8 WDR = VDD, WDT = 0 V VIL = VIT – 0.2 V, UNIT 30 50 µs NOTES: 4. 155 pF < C(EXT) < 63 nF 5. C(EXT) ÷ 15.55 pF + 1 x 6.25 ms POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 TYPICAL CHARACTERISTICS LOW-LEVEL OUTPUT VOLTAGE vs LOW-LEVEL OUTPUT CURRENT SUPPLY CURRENT vs SUPPLY VOLTAGE 2 20 I DD – Supply Current – µ A 18 VOL – Low-Level Output Voltage – V WDI = GND, WDT = GND, WDR = GND 16 85°C 14 12 25°C 10 8 40°C 6 0°C 4 1.50 25°C 1.25 1 0.75 85°C 0°C 0.50 40°C 0.25 2 0 VDD = 2 V, WDI = GND, WDT = GND, WDR = GND 1.75 0 1 2 3 5 4 0 6 0 1 2 Figure 1 VIT – Normalized Input Threshold Voltage – V (25 ° C) 800 I – Input Current – nA 25°C 400 85°C 0°C 0 –200 40°C –400 I VDD = 6 V, WDI = GND, WDR = GND –600 –800 –1000 0 1 2 3 7 4 5 6 1.001 1.000 0.999 0.998 0.997 WDI = Triggered, WDR = GND, WDT = GND 0.996 0.995 –40 –20 0 20 Figure 3 Figure 4 POST OFFICE BOX 655303 40 TA – Free-Air Temperature – °C VI – Input Voltage at WDT – V 6 6 NORMALIZED INPUT THRESHOLD VOLTAGE vs FREE-AIR TEMPERATURE AT VDD 1000 200 5 Figure 2 INPUT CURRENT vs INPUT VOLTAGE AT WDT 600 4 3 IOL – Low-Level Output Current – mA VDD – Supply Voltage – V • DALLAS, TEXAS 75265 60 80 TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 TYPICAL CHARACTERISTICS MINIMUM PULSE DURATION AT VDD vs VDD THRESHOLD OVERDRIVE VOLTAGE t W – Minimum Pulse Duration at VDD – µ s 20 18 16 14 12 10 8 6 4 2 0 0 0.2 0.4 0.6 0.8 1 1.2 1.4 VDD – Threshold Overdrive Voltage – V Figure 5 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 7 TPS3813J25, TPS3813L30, TPS3813K33, TPS3813I50 PROCESSOR SUPERVISORY CIRCUITS WITH WINDOW-WATCHDOG SLVS331 – DECEMBER 2000 MECHANICAL DATA DBV (R-PDSO-G6) PLASTIC SMALL-OUTLINE 0,50 0,30 0,95 6 0,20 M 4 1,70 1,50 1 0,15 NOM 3,00 2,60 3 Gage Plane 3,00 2,80 0,25 0°–8° 0,55 0,35 Seating Plane 1,45 0,95 0,05 MIN 0,10 4073253-5/E 05/99 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. 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