ETC NTP8N50/D

NTP8N50, NTB8N50
Preferred Device
Advance Information
Power MOSFET
8 Amps, 500 Volts
N–Channel TO–220 and D2PAK
Designed for high voltage, high speed switching applications in
power supplies, converters, power motor controls and bridge circuits.
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8 AMPERES
500 VOLTS
RDS(on) = 750 mΩ
Features
•
•
•
•
•
•
Higher Current Rating
Lower RDS(on)
Lower Capacitances
Lower Total Gate Charge
Tighter VSD Specifications
Avalanche Energy Specified
N–Channel
D
Typical Applications
•
•
•
•
Switch Mode Power Supplies
PWM Motor Controls
Converters
Bridge Circuits
G
4
S
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Rating
Symbol
1
Value
VDSS
500
Vdc
Drain–Gate Voltage (RGS = 1.0 MΩ)
VDGR
500
Vdc
Vdc
VGS
VGSM
20
40
3
ID
ID
IDM
8.0
6.2
28
PD
202
1.61
Watts
W/°C
–55 to 150
°C
1
2
3
Adc
Total Power Dissipation
Derate above 25°C
Operating and Storage Temperature
Range
TJ, Tstg
Single Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 100 Vdc, VGS = 10 Vdc,
IL = 8 A, L = 10 mH, RG = 25 Ω)
EAS
Thermal Resistance
– Junction–to–Case
– Junction–to–Ambient
– Junction–to–Ambient (Note 1.)
Maximum Lead Temperature for
Soldering Purposes, 1/8″ from case
for 10 seconds
320
Source
°C/W
TL
260
Gate
NTx8N50
LL
Y
WW
Drain
Source
= Device Code
= Location Code
= Year
= Work Week
ORDERING INFORMATION
Device
°C
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
November, 2000 – Rev. 1
NTP8N50
LLYWW
mJ
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
 Semiconductor Components Industries, LLC, 2000
NTB8N50
LLYWW
Drain
0.62
62.5
50
Drain
Drain
Gate
RθJC
RθJA
RθJA
D2PAK
CASE 418B
STYLE 2
TO–220AB
CASE 221A
STYLE 5
MARKING DIAGRAMS
AND PIN ASSIGNMENTS
Drain
– Continuous
– Continuous @ 100°C
– Single Pulse (tp10 µs)
2
Unit
Drain–Source Voltage
Gate–Source Voltage
– Continuous
– Non–Repetitive (tp10 ms)
4
1
Package
Shipping
NTP8N50
TO–220AB
50 Units/Rail
NTB8N50
D2PAK
50 Units/Rail
NTB8N50T4
D2PAK
800/Tape & Reel
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
NTP8N50/D
NTP8N50, NTB8N50
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
500
–
–
560
–
–
–
–
–
–
10
100
–
–
–
–
100
100
2.0
–
2.6
6.5
4.0
–
mV/°C
–
600
750
mOhm
–
–
–
–
7.2
6.3
gFS
4.0
7.0
–
Mhos
Ciss
–
1530
2140
pF
Coss
–
380
530
Crss
–
15
30
td(on)
–
14
30
tr
–
17
30
td(off)
–
34
70
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Collector Current
(VDS = 500 Vdc, VGS = 0 Vdc)
(VDS = 500 Vdc, VGS = 0 Vdc, TJ =125°C)
Vdc
µAdc
IDSS
Gate–Body Leakage Current (VGS = ±20 Vdc, VDS = 0)
IGSS(f)
IGSS(r)
mV/°C
nAdc
ON CHARACTERISTICS (Note 2.)
Gate Threshold Voltage
ID = 0.25 mA, VDS = VGS
Temperature Coefficient (Negative)
VGS(th)
Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 4.0 Adc)
RDS(on)
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 8.0 Adc)
(VGS = 10 Vdc, ID = 4.0 Adc, TJ = 125°C)
VDS(on)
Forward Transconductance (VDS = 15 Vdc, ID = 4.0 Adc)
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
(VDS = 25 Vd
Vdc, VGS = 0 Vdc,
Vd
f = 1.0 MHz)
Output Capacitance
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 3.)
Turn–On Delay Time
(VDD = 250 Vdc, ID = 12 Adc,
VGS = 10 Vdc,
Vdc
RG = 9.1 Ω)
Rise Time
Turn–Off Delay Time
Fall Time
Gate Charge
(VDS = 400 Vdc, ID = 8.0 Adc,
VGS = 10 Vdc)
tf
–
25
50
QT
–
25
40
Q1
–
6.0
–
Q2
–
8.0
–
Q3
–
12
–
–
–
0.9
0.8
1.1
–
trr
–
375
–
ta
–
155
–
tb
–
220
–
QRR
–
2.75
–
–
–
3.5
4.5
–
–
–
7.5
–
ns
nC
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage (Note 2.)
VSD
(IS = 8.0 Adc, VGS = 0 Vdc)
(IS = 8.0 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse Recovery Time
(IS = 8.0
8 0 Adc,
Adc VGS = 0 Vdc,
Vdc
dIS/dt = 100 A/µs)
Reverse Recovery Stored
Charge
Vdc
ns
µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
LD
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
LS
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
3. Switching characteristics are independent of operating junction temperature.
http://onsemi.com
2
nH
NTP8N50, NTB8N50
PACKAGE DIMENSIONS
TO–220 THREE–LEAD
TO–220AB
CASE 221A–09
ISSUE AA
SEATING
PLANE
–T–
B
C
F
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
----0.080
STYLE 5:
PIN 1.
2.
3.
4.
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
----2.04
GATE
DRAIN
SOURCE
DRAIN
D2PAK
CASE 418B–03
ISSUE D
C
E
V
–B–
4
A
1
2
3
S
–T–
SEATING
PLANE
K
J
G
D 3 PL
0.13 (0.005)
H
M
T B
M
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
DIM
A
B
C
D
E
G
H
J
K
S
V
INCHES
MIN
MAX
0.340
0.380
0.380
0.405
0.160
0.190
0.020
0.035
0.045
0.055
0.100 BSC
0.080
0.110
0.018
0.025
0.090
0.110
0.575
0.625
0.045
0.055
STYLE 2:
PIN 1.
2.
3.
4.
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3
GATE
DRAIN
SOURCE
DRAIN
MILLIMETERS
MIN
MAX
8.64
9.65
9.65
10.29
4.06
4.83
0.51
0.89
1.14
1.40
2.54 BSC
2.03
2.79
0.46
0.64
2.29
2.79
14.60
15.88
1.14
1.40
NTP8N50, NTB8N50
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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4
NTP8N50/D