ETC NTP10N60

NTP10N60
Preferred Device
Product Preview
TMOS 7 E-FET 
Power Field Effect Transistor
N–Channel Enhancement–Mode
Silicon Gate
http://onsemi.com
This advanced TMOS E–FET is designed to withstand high energy
in the avalanche and commutation modes. The new energy efficient
design also offers a drain–to–source diode with a fast recovery time.
Designed for low voltage, high speed switching applications in power
supplies, converters and PWM motor controls. These devices are
particularly well–suited for bridge circuits where diode speed and
commutating safe operating areas are critical and offer additional
safety margin against unexpected voltage transients.
TMOS POWER FET
10 AMPERES
600 VOLTS
RDS(on) = 0.75 Ω
N–Channel
New Features of TMOS 7
D
• Ultra Low On–Resistance Provides Higher Efficiency
• Reduced Gate Charge
Features Common to TMOS 7 and TMOS E–FETS
•
•
•
Avalanche Energy Specified
Diode Characterized for Use in Bridge Circuits
IDSS and VDS(on) Specified at Elevated Temperature
G

S
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Symbol
Value
Unit
Drain–Source Voltage
VDSS
600
Vdc
Drain–Gate Voltage (RGS = 1.0 MΩ)
VDGR
600
Vdc
Gate–Source Voltage
— Continuous
— Non–Repetitive (tp 10 ms)
"20
"40
Vdc
VGS
VGSM
ID
ID
IDM
10
8.0
35
PD
201
1.61
Watts
W/°C
TO–220AB
CASE 221A
STYLE 5
Operating and Storage Temperature
Range
TJ, Tstg
– 55 to 150
°C
PIN ASSIGNMENT
Single Drain–to–Source Avalanche
Energy — Starting TJ = 25°C
(VDD = 100 V, VGS = 10 Vdc,
IL = 10 A, L = 10 mH, RG = 25 Ω)
EAS
500
mJ
Rating
v
Drain
4
Adc
— Continuous
— Continuous @ 100°C
— Single Pulse (tp 10 µs)
v
Total Power Dissipation
Derate above 25°C
Thermal Resistance
— Junction–to–Case
— Junction–to–Ambient
Maximum Lead Temperature for
Soldering Purposes, 1/8″ from case
for 10 seconds
April, 2000 – Rev. 0
2
3
1
Gate
2
Drain
3
Source
4
Drain
°C/W
RθJC
RθJA
0.62
62.5
TL
260
ORDERING INFORMATION
°C
This document contains information on a new product. Specifications and information
herein are subject to change without notice.
 Semiconductor Components Industries, LLC, 2000
1
1
Device
Package
Shipping
NTP10N60
TO220AB
50 Units/Rail
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
NTP10N60/D
NTP10N60
ELECTRICAL CHARACTERISTICS (TC = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
600
—
—
585
—
—
—
—
—
—
10
100
—
—
—
—
100
100
2.0
—
2.5
5.8
4.0
—
mV/°C
—
0.65
0.75
Ohm
—
—
—
—
9.0
7.9
gFS
3.0
10
—
mhos
Ciss
—
1840
2580
pF
Coss
—
470
660
Crss
—
20
40
td(on)
—
11.5
20
tr
—
20
40
td(off)
—
50
100
tf
—
30
60
QT
—
36
50
Q1
—
8.0
—
Q2
—
11
—
Q3
—
20
—
—
—
0.85
0.75
1.0
—
trr
—
510
—
ta
—
165
—
tb
—
345
—
QRR
—
4.1
—
—
—
3.5
4.5
—
—
—
7.5
—
OFF CHARACTERISTICS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 0.25 mAdc)
Temperature Coefficient (Positive)
V(BR)DSS
Zero Gate Voltage Collector Current
(VDS = 600 Vdc, VGS = 0 Vdc)
(VDS = 600 Vdc, VGS = 0 Vdc, TJ =125°C)
Vdc
µAdc
IDSS
Gate–Body Leakage Current (VGS = ± 20 Vdc, VDS = 0)
IGSS(f)
IGSS(r)
mV/°C
nAdc
ON CHARACTERISTICS (1)
Gate Threshold Voltage
ID = 0.25 mA, VDS = VGS
Temperature Coefficient (Negative)
VGS(th)
Static Drain–to–Source On–Resistance (VGS = 10 Vdc, ID = 5 Adc)
RDS(on)
Drain–to–Source On–Voltage
(VGS = 10 Vdc, ID = 10 Adc)
(VGS = 10 Vdc, ID = 5 Adc, TJ = 125°C)
VDS(on)
Forward Transconductance (VDS = 8 Vdc, ID = 5 Adc)
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
(VDS = 25 Vdc,
Vd VGS = 0 Vdc,
Vd
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (2)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = 300 Vdc, ID = 10 Adc,
VGS = 10 Vdc
Vdc,
RG = 9.1 Ω)
Fall Time
Gate Charge
((VDS = 400 Vdc, ID = 10 Adc,
VGS = 10 Vdc)
SOURCE–DRAIN DIODE CHARACTERISTICS
Forward On–Voltage(1)
(IS = 10 Adc, VGS = 0 Vdc)
(IS = 10 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse Recovery Time
(IS = 10 Adc
Adc, VGS = 0 Vdc
Vdc,
diS/dt = 100 A/µs)
Reverse Recovery Stored
Charge
VSD
ns
nC
Vdc
ns
µC
INTERNAL PACKAGE INDUCTANCE
Internal Drain Inductance
(Measured from contact screw on tab to center of die)
(Measured from the drain lead 0.25″ from package to center of die)
LD
Internal Source Inductance
(Measured from the source lead 0.25″ from package to source bond pad)
LS
(1) Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
(2) Switching characteristics are independent of operating junction temperature.
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2
nH
NTP10N60
PACKAGE DIMENSIONS
TO–220AB
CASE 221A–09
ISSUE Z
–T–
SEATING
PLANE
C
T
S
4
DIM
A
B
C
D
F
G
H
J
K
L
N
Q
R
S
T
U
V
Z
A
Q
1 2 3
U
H
K
Z
L
R
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION Z DEFINES A ZONE WHERE ALL
BODY AND LEAD IRREGULARITIES ARE
ALLOWED.
J
G
D
N
INCHES
MIN
MAX
0.570
0.620
0.380
0.405
0.160
0.190
0.025
0.035
0.142
0.147
0.095
0.105
0.110
0.155
0.018
0.025
0.500
0.562
0.045
0.060
0.190
0.210
0.100
0.120
0.080
0.110
0.045
0.055
0.235
0.255
0.000
0.050
0.045
–––
–––
0.080
STYLE 5:
PIN 1.
2.
3.
4.
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3
GATE
DRAIN
SOURCE
DRAIN
MILLIMETERS
MIN
MAX
14.48
15.75
9.66
10.28
4.07
4.82
0.64
0.88
3.61
3.73
2.42
2.66
2.80
3.93
0.46
0.64
12.70
14.27
1.15
1.52
4.83
5.33
2.54
3.04
2.04
2.79
1.15
1.39
5.97
6.47
0.00
1.27
1.15
–––
–––
2.04
NTP10N60
E–FET is a trademark of Semiconductor Components Industries, LLC.
TMOS is a registered trademark of Semiconductor Components Industries, LLC.
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
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For additional information, please contact your local
Sales Representative.
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4
NTP10N60/D