ONSEMI MMDF1300R2

MMDF1300
Power MOSFET
3 Amps, 25 Volts
Complementary SO–8, Dual
These miniature surface mount MOSFETs feature ultra low RDS(on)
and true logic level performance. They are capable of withstanding
high energy in the avalanche and commutation modes and the
drain–to–source diode has a very low reverse recovery time.
MiniMOS devices are designed for use in low voltage, high speed
switching applications where power efficiency is important. Typical
applications are dc–dc converters, and power management in portable
and battery powered products such as computers, printers, cellular and
cordless phones. They can also be used for low voltage motor controls
in mass storage products such as disk drives and tape drives. The
avalanche energy is specified to eliminate the guesswork in designs
where inductive loads are switched and offer additional safety margin
against unexpected voltage transients.
• Low RDS(on) Provides Higher Efficiency and Extends Battery Life
• Logic Level Gate Drive – Can be Driven by Logic ICs
• Miniature SO–8 Surface Mount Package – Saves Board Space
• Diode Exhibits High Speed, with Soft Recovery
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3 AMPERES
25 VOLTS
RDS(on) = 100 m (N–Channel)
RDS(on) = 210 m (P–Channel)
N–Channel
P–Channel
D
D
G
G
S
S
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Drain–to–Source Voltage
Gate–to–Source Voltage
Drain Current – Continuous
N–Channel
P–Channel
Drain Current – Pulsed
N–Channel
P–Channel
Operating and Storage Temperature Range
Total Power Dissipation @ TA = 25°C
Single Pulse Drain–to–Source Avalanche
Energy – Starting TJ = 25°C
(VDD = 20 Vdc, VGS = 10 Vdc,
IL = 3.0 Apk, L = 25 mH, RG = 25 )
Thermal Resistance – Junction–to–Ambient
(Note 1.)
Maximum Lead Temperature for Soldering
Purposes, 1/8″ from Case for 10 sec.
Symbol
Value
Unit
VDSS
VGS
25
Vdc
± 20
Vdc
ID
MARKING
DIAGRAM
Adc
3.0
2.0
SO–8, Dual
CASE 751
STYLE 11
8
IDM
Apk
9.0
6.0
TJ, Tstg
–65 to
+150
°C
PD
EAS
1.8
Watts
1300
LYWW
1
1300
L
Y
WW
= Device Code
= Location Code
= Year
= Work Week
mJ
PIN ASSIGNMENT
113
RθJA
TL
°C/W
66.3
°C
260
Source–1
1
8
Drain–1
Gate–1
2
7
Drain–1
Source–2
3
6
Drain–2
4
5
Drain–2
Gate–2
Top View
1. Mounted on 2″ square FR4 board (1″ sq. 2 oz. Cu 0.06″ thick single sided),
10 sec. max.
ORDERING INFORMATION
 Semiconductor Components Industries, LLC, 2001
March, 2001 – Rev. 1
1
Device
Package
MMDF1300R2
SO–8
Shipping
2500 Tape & Reel
Publication Order Number:
MMDF1300/D
MMDF1300
ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted)
Symbol
Characteristic
Polarity
Min
Typ
Max
–
30
–
–
Unit
OFF CHARACTERISTICS
V(BR)DSS
Drain–to–Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 µAdc)
Vdc
Zero Gate Voltage Drain Current
(VDS = 25 Vdc, VGS = 0 Vdc)
IDSS
(N)
(P)
–
–
–
–
1.0
1.0
µAdc
Gate–Body Leakage Current (VGS = 20 Vdc, VDS = 0)
IGSS
–
–
–
±100
nAdc
Gate Threshold Voltage
(VDS = VGS, ID = 250 µAdc)
VGS(th)
(N)
(P)
1.0
1.0
1.5
2.0
2.0
3.0
Vdc
Drain–to–Source On–Resistance
(VGS = 10 Vdc, ID = 2.0 Adc)
RDS(on)
(N)
(P)
–
–
0.09
0.16
0.10
0.21
Ohms
Drain–to–Source On–Resistance
(VGS = 4.5 Vdc, ID = 1.0 Adc)
RDS(on)
(N)
(P)
–
–
0.13
0.30
0.16
0.375
Forward Transconductance
(VDS = 3.0 Vdc, ID = 1.5 Adc)
gFS
(N)
(P)
1.0
1.0
–
–
–
–
mhos
Ciss
(N)
(P)
–
–
215
200
301
300
pF
Coss
(N)
(P)
–
–
111
100
158
160
Crss
(N)
(P)
–
–
30
40
60
75
td(on)
(N)
(P)
–
–
18
14
36
28
tr
(N)
(P)
–
–
98
95
196
180
td(off)
(N)
(P)
–
–
16
22
32
45
tf
(N)
(P)
–
–
30
40
60
80
QT
(N)
(P)
–
–
3.3
7.0
5.0
10
Q1
(N)
(P)
–
–
1.2
1.2
–
–
Q2
(N)
(P)
–
–
2.0
2.5
–
–
Q3
(N)
(P)
–
–
1.9
3.5
–
–
ON CHARACTERISTICS (Notes 2. & 3.)
Ohms
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Vd
(VDS = 16 Vdc,
VGS = 0 Vdc,
f = 1.0 MHz)
Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 4.)
Turn–On Delay Time
Rise Time
Turn–Off Delay Time
(VDD = 10 Vdc,
ID = 2.0 Adc,
VGS = 4.5 Vdc,
RG = 6.0 Ω)
Fall Time
Total Gate Charge
(VDS = 16 Vdc,
ID = 2.0
2 0 Adc,
Adc
VGS = 4.5 Vdc)
2. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
3. Negative signs for P–Channel device omitted for clarity.
4. Switching characteristics are independent of operating junction temperature.
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2
ns
nC
MMDF1300
ELECTRICAL CHARACTERISTICS – continued (TA = 25°C unless otherwise noted)
Characteristic
Symbol
Polarity
Min
Typ
Max
Unit
VSD
(N)
(P)
–
–
1.0
1.3
1.4
1.7
Vdc
trr
(N)
(P)
–
–
23
20
–
–
ns
ta
(N)
(P)
–
–
18
13
–
–
tb
(N)
(P)
–
–
5.0
7.0
–
–
QRR
(N)
(P)
–
–
0.02
0.02
–
–
SOURCE–DRAIN DIODE CHARACTERISTICS (Note 5.)
Forward On–Voltage
(Note 6.)
(IS = 3.0 Adc, VGS = 0 Vdc)
(IS = 2.0 Adc, VGS = 0 Vdc)
Reverse Recovery Time
(N)
(ID = 2.0 Adc,
VGS = 0 Vdc
dIS/dt = 100 A/µs)
Reverse Recovery Stored
Charge
5. Negative signs for P–Channel device omitted for clarity.
6. Pulse Test: Pulse Width ≤ 300 µs, Duty Cycle ≤ 2%.
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3
µC
MMDF1300
PACKAGE DIMENSIONS
SO–8
CASE 751–07
ISSUE V
–X–
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER
SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN
EXCESS OF THE D DIMENSION AT MAXIMUM
MATERIAL CONDITION.
A
8
5
0.25 (0.010)
S
B
1
M
Y
M
4
K
–Y–
G
C
N
X 45 SEATING
PLANE
–Z–
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
S
J
DIM
A
B
C
D
G
H
J
K
M
N
S
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0
8
0.25
0.50
5.80
6.20
STYLE 11:
PIN 1.
2.
3.
4.
5.
6.
7.
8.
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0
8
0.010
0.020
0.228
0.244
SOURCE 1
GATE 1
SOURCE 2
GATE 2
DRAIN 2
DRAIN 2
DRAIN 1
DRAIN 1
MiniMOS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and
are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes
without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular
purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability,
including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or
specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be
validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others.
SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or
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attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
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For additional information, please contact your local
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4
MMDF1300/D