STB20NE06L N-CHANNEL 60V - 0.06Ω - 20A D2PAK STripFET POWER MOSFET TYPE STB20NE06L ■ ■ ■ ■ ■ ■ VDSS RDS(on) ID 60 V <0.07 Ω 20 A TYPICAL RDS(on) = 0.06 Ω EXCEPTIONAL dv/dt CAPABILITY 100% AVALANCHE TESTED LOW GATE CHARGE 100 oC LOW THRESHOLD DRIVE ADD SUFFIX “T4” FOR ORDERING IN TAPE & REEL DESCRIPTION This Power Mosfet is the latest development of STMicroelectronis unique “Single Feature Size ” strip-based process. The resulting transistor shows extremely high packing density for low onresistance, rugged avalance characteristics and less critical alignment steps therefore a remarkable manufacturing reproducibility. 3 1 D2PAK TO-263 (suffix“T4”) INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ DC MOTOR CONTROL ■ DC-DC & DC-AC CONVERTERS ■ SYNCHRONOUS RECTIFICATION ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR VGS ID ID IDM(•) Ptot Parameter Tstg Tj Unit Drain-source Voltage (VGS = 0) 60 V Drain-gate Voltage (RGS = 20 kΩ) 60 V Gate- source Voltage ±20 V Drain Current (continuos) at TC = 25°C 20 A Drain Current (continuos) at TC = 100°C 14 A Drain Current (pulsed) 80 A Total Dissipation at TC = 25°C Derating Factor dv/dt (1) Value Peak Diode Recovery voltage slope Storage Temperature Max. Operating Junction Temperature ( •)Pulse width limited by safe operating area. December 2000 70 W 0.47 W/°C 7 V/ns –60 to 175 °C 175 °C (1)ISD ≤20A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX. 1/8 STB20NE06L THERMAL DATA R thj-case R thj-amb Rthc-sink Tj Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Resistance Case-sink Maximum Lead Temperature For Soldering Purpose 2.14 62.5 0.5 300 °C/W °C/W °C/W °C Max Value Unit Max Max Typ AVALANCHE CHARACTERISTICS Symbol Parameter IAR Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) 20 A EAS Single Pulse Avalanche Energy (starting Tj = 25 °C, ID = IAR, VDD = 35 V) 100 mJ ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA IDSS Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating VDS = Max Rating TC = 125 °C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20 V V(BR)DSS VGS = 0 Min. Typ. Max. 60 Unit V 1 10 µA µA ±100 nA Max. Unit ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS ID = 250 µA I DS(on) Static Drain-source On Resistance VGS = 5 V VGS = 10 V ID = 10 A ID = 10 A ID(on) On State Drain Current VDS > ID(on) x RDS(on)max VGS = 10 V Min. Typ. 1 V 0.07 0.06 0.085 0.07 20 Ω Ω A DYNAMIC Symbol 2/8 Parameter Test Conditions Min. Typ. 5 9 S 800 125 40 pF pF pF gfs (*) Forward Transconductance VDS>ID(on) x RDS(on)max ID=10A C iss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitances VDS = 25V f = 1 MHz VGS = 0 Max. Unit STB20NE06L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 30 V ID = 10 A VGS = 5 V RG = 4.7 Ω (see test circuit, Figure 3) 20 45 Qg Qgs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge 14 8 4 20 nC nC nC Typ. Max. Unit VDD=48V I D=20A VGS=5V ns ns SWITCHING OFF Symbol tr(Voff) tr tc Parameter Off-voltage Rise Time Fall Time Cross-over Time Test Conditions Min. 10 25 42 I D = 20 A VDD = 48 V VGS = 5 V RG = 4.7 Ω (see test circuit, Figure 5) ns ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 20 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current di/dt = 100 A/µs ISD = 20 A Tj = 150 °C VDD = 30 V (see test circuit, Figure 5) trr Qrr IRRM Test Conditions Min. Typ. VGS = 0 65 130 4 Max. Unit 20 80 A A 1.5 V ns nC A (*) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %. (•)Pulse width limit ed by safe operating area. Safe Operating Area Thermal Impedance 3/8 STB20NE06L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/8 STB20NE06L Normalized Gate Threshold Voltage vs Temperature Normalized On Resistance vs Temperature Source-drain Diode Forward Characteristics 5/8 STB20NE06L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/8 STB20NE06L D2PAK MECHANICAL DATA DIM. mm. MIN. TYP inch MAX. MIN. A 4.4 4.6 0.173 TYP. 0.181 MAX. A1 2.49 2.69 0.098 0.106 A2 0.03 0.23 0.001 0.009 B 0.7 0.93 0.027 0.036 B2 1.14 1.7 0.044 0.067 C 0.45 0.6 0.017 0.023 C2 1.23 1.36 0.048 0.053 D 8.95 9.35 0.352 0.368 10.4 0.393 D1 E 8 10 E1 0.315 8.5 0.334 G 4.88 5.28 0.192 0.208 L 15 15.85 0.590 0.625 L2 1.27 1.4 0.050 0.055 L3 1.4 1.75 0.055 0.068 M 2.4 3.2 0.094 R V2 0.4 0º 0.126 0.015 8º 7/8 STB20NE06L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in lif e support devices or systems without express written approval of STMicroelectronics. The ST logo is registered trademark of STMicroelectronics 2000 STMicroelectronics - All Rights Reserved All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A . http://w ww.st.com 8/8