STD110NH02L N-CHANNEL 20V - 0.004 Ω - 80A DPAK STripFET III POWER MOSFET TYPE STD110NH02L ■ ■ ■ ■ ■ ■ VDSS R DS(on) ID 20 V < 0.005 Ω 80 A(#) TYPICAL RDS(on) = 0.004 Ω @ 10 V RDS(ON) * Qg INDUSTRY’s BENCHMARK CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED LOW THRESHOLD DEVICE SURFACE-MOUNTING DPAK (TO-252) POWER PACKAGE IN TAPE & REEL (SUFFIX “T4”) 3 1 DPAK TO-252 (Suffix “T4”) DESCRIPTION The STD110NH02L utilizes the latest advanced design rules of ST’s proprietary STripFET technology. This is suitable fot the most demanding DC-DC converter application where high efficiency is to be achieved. INTERNAL SCHEMATIC DIAGRAM APPLICATIONS ■ SPECIFICALLY DESIGNED AND OPTIMISED FOR HIGH EFFICIENCY DC/DC CONVERTES ABSOLUTE MAXIMUM RATINGS Symbol V DS V DGR Parameter Value Unit Drain-source Voltage (VGS = 0) 20 V Drain-gate Voltage (RGS = 20 kΩ) 20 V ± 20 V VGS Gate- source Voltage ID(#) 80 A ID(#) Drain Current (continuous) at TC = 25°C Drain Current (continuous) at TC = 100°C 80 A IDM(•) Drain Current (pulsed) 320 A Ptot E AS (1) Tstg Tj Total Dissipation at TC = 25°C 125 W Derating Factor 0.83 W/°C Single Pulse Avalanche Energy 900 mJ -55 to 175 °C Storage Temperature Max. Operating Junction Temperature (•) Pulse width limited by safe operating area. (#) Value limited by wire bonding October 2002 (1) Starting Tj = 25 oC, ID = 40A, VDD = 10V 1/9 STD110NH02L THERMAL DATA Rthj-case Rthj-amb Tl Thermal Resistance Junction-case Thermal Resistance Junction-ambient Maximum Lead Temperature For Soldering Purpose Max Max °C/W °C/W °C 1.20 100 275 ELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED) OFF Symbol Parameter Test Conditions Drain-source Breakdown Voltage ID = 250 µA, VGS = 0 IDSS Zero Gate Voltage Drain Current (V GS = 0) VDS = Max Rating VDS = Max Rating TC = 125°C IGSS Gate-body Leakage Current (VDS = 0) VGS = ± 20V V(BR)DSS Min. Typ. Max. 20 Unit V 1 10 µA µA ±100 nA Max. Unit ON (*) Symbol Parameter Test Conditions VGS(th) Gate Threshold Voltage VDS = VGS I D = 250 µA R DS(on) Static Drain-source On Resistance VGS = 10 V I D = 40 A Min. Typ. 1 V 0.004 0.0050 Ω Typ. Max. Unit DYNAMIC Symbol 2/9 Parameter Test Conditions gfs (*) Forward Transconductance VDS = 10 V C iss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance VDS = 15V f = 1 MHz VGS = 0 RG Gate Input Resistance f = 1 MHz Gate DC Bias = 0 Test Signal Level = 20 mV Open Drain ID = 40 A Min. 52 S 4450 1126 141 pF pF pF 1.6 Ω STD110NH02L ELECTRICAL CHARACTERISTICS (continued) SWITCHING ON Symbol Parameter Test Conditions Min. Typ. Max. Unit td(on) tr Turn-on Delay Time Rise Time VDD = 10 V I D = 40 A V GS = 10 V R G = 4.7 Ω (Resistive Load, Figure 3) 14 224 Qg Qgs Q gd Total Gate Charge Gate-Source Charge Gate-Drain Charge VDD= 10 V ID= 80 A VGS= 10 V 69 13 9 93 nC nC nC Typ. Max. Unit ns ns SWITCHING OFF Symbol td(off) tf Parameter Test Conditions Min. VDD = 10 V I D = 40 A VGS = 10 V RG = 4.7Ω, (Resistive Load, Figure 3) Turn-off Delay Time Fall Time 69 40 ns ns SOURCE DRAIN DIODE Symbol Parameter ISD ISDM (•) Source-drain Current Source-drain Current (pulsed) VSD (*) Forward On Voltage ISD = 80 A Reverse Recovery Time Reverse Recovery Charge Reverse Recovery Current ISD = 80 A di/dt = 100A/µs T j = 150°C VDD = 15 V (see test circuit, Figure 5) trr Qrr IRRM (*)Pulsed: Pulse duration = 300 µs, duty cycle (•)Pulse width limit ed by safe operating area. Safe Operating Area Test Conditions Min. Typ. VGS = 0 47 58 2.5 Max. Unit 80 320 A A 1.3 V ns nC A 1.5 %. Thermal Impedance 3/9 STD110NH02L Output Characteristics Transfer Characteristics Transconductance Static Drain-source On Resistance Gate Charge vs Gate-source Voltage Capacitance Variations 4/9 STD110NH02L Normalized Gate Threshold Voltage vs Temperature Normalized on Resistance vs Temperature Source-drain Diode Forward Characteristics Normalized Breakdown Voltage vs Temperature . . 5/9 STD110NH02L Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform Fig. 3: Switching Times Test Circuits For Resistive Load Fig. 4: Gate Charge test Circuit Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times 6/9 STD110NH02L TO-252 (DPAK) MECHANICAL DATA mm DIM. MIN. inch TYP. MAX. MIN. TYP. MAX. A 2.2 2.4 0.086 0.094 A1 0.9 1.1 0.035 0.043 A2 0.03 0.23 0.001 0.009 B 0.64 0.9 0.025 0.035 B2 5.2 5.4 0.204 0.212 C 0.45 0.6 0.017 0.023 C2 0.48 0.6 0.019 0.023 D 6 6.2 0.236 0.244 E 6.4 6.6 0.252 0.260 G 4.4 4.6 0.173 0.181 H 9.35 10.1 0.368 0.397 L2 0.8 L4 0.031 0.6 1 0.023 0.039 A1 C2 A H A2 C DETAIL ”A” L2 D = 1 = G 2 = = = E = B2 3 B DETAIL ”A” L4 0068772-B 7/9 STD110NH02L 8/9 STD110NH02L Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. 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