ETC STB9NB50T4

STB9NB50
N-CHANNEL 500V - 0.75 Ω - 8.6A D2PAK
STripFET POWER MOSFET
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TYPE
VDSS
RDS(on)
ID
STB9NB50
500 V
<0.85 Ω
8.6 A
TYPICAL RDS(on) = 0.75 Ω
EXTREMELY HIGHT dv/dt CAPABILITY
100% AVALANCHE TESTED
REPETITIVE AVALANCHE DATA AT 100 oC
VERY LOW INTRINSIC CAPACITANCE
GATE CHARGE MINIMIZED
LOW LEAKAGE CURRENT
APPLICATION ORIENTED
FOR THROUGH-HOLE VERSION CONTACT
SALES OFFICE
DESCRIPTION
This Power Mosfet is the latest development of
STMicroelectronis unique ”Single Feature Size ” stripbased process. The resulting transistor shows extremely
high packing density for low on-resistance, rugged
avalanche characteristics and less critical alignment
steps
therefore
a
remarkable
manufacturing
reproducibility.
3
1
D2PAK
TO-263
(suffix“T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
■ HIGH CURRENT, HIGH SPEED SWITCHING
■ SWITCH MODE POWER SUPPLY (SMPS)
■ DC-AC CONVERTER FOR WELDING
EQUIPMENT AND UNINTERRUPTABLE
POWER SUPPLY (UPS)
ABSOLUTE MAXIMUM RATINGS
Symbol
V DS
V DGR
VGS
ID
ID
IDM(•)
Ptot
dv/dt (2)
Tstg
Tj
Parameter
Value
Unit
Drain-source Voltage (VGS = 0)
500
V
Drain-gate Voltage (RGS = 20 kΩ)
500
V
Gate- source Voltage
± 30
V
Drain Current (continuos) at TC = 25°C
Drain Current (continuos) at TC = 100°C
8.6
A
5.4
A
Drain Current (pulsed)
34.4
A
Total Dissipation at TC = 25°C
125
W
Derating Factor
1.0
W/°C
Peak Diode Recovery voltage slope
4.5
V/ns
–60 to 150
°C
150
°C
Storage Temperature
Max. Operating Junction Temperature
( •)Pulse width limited by safe operating area.
November 2000
(2) ISD ≤9A, di/dt ≤200A/µs, VDD ≤ V (BR)DSS, Tj ≤ TJMAX.
1/8
STB9NB50
THERMAL DATA
Max
1
°C/W
Thermal Resistance Junction-ambient
Max
62.5
°C/W
Thermal Resistance Case-sink
Typ
0.5
°C/W
300
°C
Max Value
Unit
R thj-case
Thermal Resistance Junction-case
R thj-amb
Rthc-sink
Tj
Maximum Lead Temperature For Soldering Purpose
AVALANCHE CHARACTERISTICS
Symbol
Parameter
IAR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by Tj max)
8.6
A
EAS
Single Pulse Avalanche Energy
(starting Tj = 25 °C, ID = IAR, VDD = 50 V)
520
mJ
ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)
OFF
Symbol
Parameter
Test Conditions
Drain-source
Breakdown Voltage
ID = 250 µA, VGS = 0
IDSS
Zero Gate Voltage
Drain Current (V GS = 0)
VDS = Max Rating
VDS = Max Rating, TC = 125 °C
IGSS
Gate-body Leakage
Current (VDS = 0)
VGS = ± 30V
V(BR)DSS
Min.
Typ.
Max.
500
Unit
V
1
50
µA
µA
±100
nA
ON (1)
Symbol
Parameter
Test Conditions
VGS(th)
Gate Threshold Voltage
VDS = VGS
ID = 250 µA
R DS(on)
Static Drain-source On
Resistance
VGS = 10 V
ID = 4.3 A
ID(on)
On State Drain Current
VDS > ID(on) x RDS(on)max
VGS = 10 V
Min.
Typ.
Max.
Unit
3
4
5
V
0.75
0.85
Ω
8.6
A
DYNAMIC
Symbol
Parameter
Test Conditions
Forward Transconductance
VDS > ID(on) x R DS(on)max,
ID = 4.3 A
C iss
Input Capacitance
VDS = 25V f = 1 MHz VGS = 0
Coss
Crss
gfs
2/8
(*)
Min.
Typ.
4.5
5.7
Max.
Unit
S
1250
1625
pF
Output Capacitance
175
236
pF
Reverse Transfer Capacitances
20
27
pF
STB9NB50
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symbol
Typ.
Max.
Unit
Turn-on Delay Time Rise Time VDD = 250V
ID = 4.3 A
RG = 4.7 Ω
VGS = 10 V
(see test circuit, Figure 3)
19
11
30
15
ns
ns
Qg
Total Gate Charge
32
45
nC
Qgs
Gate-Source Charge
10.6
nC
Q gd
Gate-Drain Charge
13.7
nC
td(on)
tr
Parameter
Test Conditions
Min.
VDD=400V ID=8.6A VGS=10V
SWITCHING OFF
Symbol
Typ.
Max.
Unit
11.5
11
20
17
16
28
ns
ns
ns
Typ.
Max.
Unit
Source-drain Current
8.6
A
ISDM (•)
Source-drain Current (pulsed)
34.4
A
VSD (*)
Forward On Voltage
ISD = 8.6 A
1.6
V
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
ISD = 8.6 A
di/dt = 100 A/µs
VDD = 100V
Tj = 150 °C
(see test circuit, Figure 3)
tr(Voff)
tr
tc
Parameter
Off-voltage Rise Time
Fall Time
Cross-over Time
Test Conditions
Min.
VDD = 400 V
ID = 8.6 A
RG = 4.7 Ω
VGS = 10 V
(see test circuit, Figure 5)
SOURCE DRAIN DIODE
Symbol
ISD
trr
Qrr
IRRM
Parameter
Test Conditions
Min.
VGS = 0
420
3.5
16.5
ns
µC
A
(*) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(•)Pulse width limit ed by safe operating area.
Safe Operating Area
Thermal Impedance
3/8
STB9NB50
Output Characteristics
Transfer Characteristics
Transconductance
Static Drain-source On Resistance
Gate Charge vs Gate-source Voltage
Capacitance Variations
4/8
STB9NB50
Normalized Gate Threshold Voltage vs
Temperature
Normalized On Resistance vs Temperature
Source-drain Diode Forward Characteristics
5/8
STB9NB50
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuits For Resistive
Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
6/8
STB9NB50
D2PAK MECHANICAL DATA
DIM.
mm.
MIN.
TYP
inch
MAX.
MIN.
A
4.4
4.6
0.173
TYP.
0.181
MAX.
A1
2.49
2.69
0.098
0.106
A2
0.03
0.23
0.001
0.009
B
0.7
0.93
0.027
0.036
B2
1.14
1.7
0.044
0.067
C
0.45
0.6
0.017
0.023
C2
1.23
1.36
0.048
0.053
D
8.95
9.35
0.352
D1
E
8
10
10.4
0.393
4.88
5.28
0.192
0.208
E1
G
0.368
0.315
8.5
0.334
L
15
15.85
0.590
0.625
L2
1.27
1.4
0.050
0.055
L3
1.4
1.75
0.055
0.068
M
2.4
3.2
0.094
0.126
R
V2
0.4
0º
0.015
8º
7/8
STB9NB50
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in lif e support devices or systems without express written approval of STMicroelectronics.
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