RT9214 5V/12V Synchronous Buck PWM DC-DC Controller General Description Features The RT9214 is a high efficiency synchronous buck PWM controllers that generate logic-supply voltages in PC based systems. These high performance , single output devices include internal soft-start, frequency compensation networks and integrates all of the control, output adjustment, monitoring and protection functions into a single package. z The device operating at fixed 300kHz frequency provides an optimum compromise between efficiency, external component size, and cost. Adjustable over-current protection (OCP) monitors the voltage drop across the RDS(ON) of the lower MOSFET for synchronous buck PWM DC-DC controller. The overcurrent function cycles the soft-start in 4-times hiccup mode to provide fault protection, and in an always hiccup mode for under-voltage protection. z z z z z z z z Adaptive Non-Overlapping Gate Driver Over-Current Fault Monitor on MOSFET, No Current Sense Resistor Required RoHS Compliant and 100% Lead (Pb)-Free Applications z z z z Ordering Information Operating with 5V or 12V Supply Voltage Drives All Low Cost N-Channel MOSFETs Voltage Mode PWM Control 300kHz Fixed Frequency Oscillator Fast Transient Response : `High-Speed GM Amplifier `Full 0 to 100% Duty Ratio Internal Soft-Start z Graphic Card Motherboard, Desktop Servers IA Equipments Telecomm Equipments High Power DC-DC Regulators RT9214 Package Type S : SOP-8 SP : SOP-8 (Exposed Pad-Option 1) Operating Temperature Range P : Pb Free with Commercial Standard G : Green (Halogen Free with Commercial Standard) Pin Configurations (TOP VIEW) BOOT 8 PHASE UGATE 2 7 OPS GND 3 6 FB LGATE 4 5 VCC Note : SOP-8 Richtek Pb-free and Green products are : `RoHS compliant and compatible with the current requirements of IPC/JEDEC J-STD-020. `Suitable for use in SnPb or Pb-free soldering processes. `100% matte tin (Sn) plating. BOOT UGATE 2 GND 3 LGATE 4 NC 9 8 PHASE 7 OPS 6 FB 5 VCC SOP-8 (Exposed Pad) DS9214-13 September 2007 www.richtek.com 1 RT9214 Typical Application Circuit +5V to +12V D1 1N4148 VIN +3.3V/+5V/+12V RBOOT 2.2 R1 10 1 BOOT 5 C1 1uF 6 UGATE VCC FB 3 PHASE RT9214 GND OPS LGATE Disable > R2 32 2 C3 1uF C2 0.1uF RUGATE Q1 MU 2.2 8 L1 3uH ROCSET 7 Q2 ML 4 C4 470uF VOUT R C C6 to C8 1000uFx3 Q3 3904 VOUT = VREF × (1 + R3 ) R2 VREF : Internal reference voltage (0.8V ± 2%) R3 68 R4 200-1k C5 0.1-0.33uF Functional Pin Description BOOT (Pin 1) FB (Pin 6) Bootstrap supply pin for the upper gate driver. Connect the bootstrap capacitor between BOOT pin and the PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. Switcher feedback voltage. This pin is the inverting input of the error amplifier. FB senses the switcher output through an external resistor divider network. OPS (OCSET, POR and Shut-Down) (Pin 7) UGATE (Pin 2) Upper gate driver output. Connect to the gate of highside power N-Channel MOSFET. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the upper MOSFET has turned off. GND (Pin 3) Both signal and power ground for the IC. All voltage levels are measured with respect to this pin. Ties the pin directly to the low-side MOSFET source and ground plane with the lowest impedance. LGATE (Pin 4) Lower gate drive output. Connect to the gate of low-side power N-Channel MOSFET. This pin is monitored by the adaptive shoot-through protection circuitry to determine when the lower MOSFET has turned off. This pin provides multi-function of the over-current setting, UGATE turn-on POR sensing, and shut-down features. Connecting a resistor (ROCSET) between OPS and PHASE pins sets the over-current trip point. Pulling the pin to ground resets the device and all external MOSFETs are turned off allowing the output voltage power rails to float. This pin is also used to detect VIN in power on stage and issues an internal POR signal. PHASE (Pin 8) Connect this pin to the source of the upper MOSFET and the drain of the lower MOSFET. NC [Exposed Pad (9)] No Internal Connection. VCC (Pin 5) Connect this pin to a well-decoupled 5V or 12V bias supply. It is also the positive supply for the lower gate driver, LGATE. www.richtek.com 2 DS9214-13 September 2007 RT9214 Function Block Diagram VCC + EN - (3V_Logic & 3VDD_Analog) PH_M Power On Reset Reference + Bias & Regulators 0.1V 1.5V 0.8VREF 3V + 0.6V UV_S Soft-Start & Fault Logic 40uA - OC + OPS 0.4V + BOOT UGATE + FB PHASE EO + GM Gate Control Logic VCC - - LGATE Oscillator (300kHz) GND DS9214-13 September 2007 www.richtek.com 3 RT9214 Absolute Maximum Ratings (Note 1) Supply Voltage, VCC -------------------------------------------------------------------------------------- 16V z BOOT, VBOOT - VPHASE ------------------------------------------------------------------------------------ 16V z PHASE to GND DC ------------------------------------------------------------------------------------------------------------- −5V to 15V < 200ns ------------------------------------------------------------------------------------------------------ −10V to 30V z BOOT to PHASE ------------------------------------------------------------------------------------------ 15V z BOOT to GND DC ------------------------------------------------------------------------------------------------------------- −0.3V to VCC+15V < 200ns ------------------------------------------------------------------------------------------------------ −0.3V to 42V z UGATE ------------------------------------------------------------------------------------------------------- VPHASE - 0.3V to VBOOT + 0.3V z LGATE ------------------------------------------------------------------------------------------------------- GND - 0.3V to VVCC + 0.3V z Input, Output or I/O Voltage ----------------------------------------------------------------------------- GND-0.3V to 7V z Power Dissipation, PD @ TA = 25°C (Note 4) SOP-8 -------------------------------------------------------------------------------------------------------- 0.625W SOP-8 (Exposed Pad) ----------------------------------------------------------------------------------- 1.33W z Package Thermal Resistance SOP-8, θJA -------------------------------------------------------------------------------------------------- 160°C/W SOP-8 (Exposed Pad), θJA ------------------------------------------------------------------------------ 75°C/W z Junction Temperature ------------------------------------------------------------------------------------- 150°C z Lead Temperature (Soldering, 10 sec.) --------------------------------------------------------------- 260°C z Storage Temperature Range ---------------------------------------------------------------------------- −65°C to 150°C z ESD Susceptibility (Note 2) HBM (Human Body Mode) ------------------------------------------------------------------------------ 2kV MM (Machine Mode) -------------------------------------------------------------------------------------- 200V z Recommended Operating Conditions z z z (Note 3) Supply Voltage, VCC -------------------------------------------------------------------------------------- 5V ± 5%,12V ± 10% Junction Temperature Range ---------------------------------------------------------------------------- −40°C to 125°C Ambient Temperature Range ---------------------------------------------------------------------------- −40°C to 85°C Electrical Characteristics (VCC = 5V/12V, TA = 25°C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ Max Units VCC Supply Current ICC UGATE and LGATE Open -- 6 15 mA POR Threshold VCCRTH VCC Rising -- 4.1 4.5 V Hysteresis VCCHYS 0.35 0.5 -- V 0.784 0.8 0.816 V Nominal Supply Current Power-On Reset Switcher Reference Reference Voltage VREF VCC = 12V To be continued www.richtek.com 4 DS9214-13 September 2007 RT9214 Parameter Symbol Test Conditions Min Typ Max Units Oscillator Free Running Frequency fOSC VCC = 12V 250 300 350 kHz Ramp Amplitude ΔVOSC VCC = 12V -- 1.5 -- VP-P Error Amplifier (GM) E/A Transconductance gm -- 0.2 -- ms Open Loop DC Gain AO -- 90 -- dB 0.6 1 -- A -- 4 8 Ω PWM Controller Gate Drivers (VCC = 12V) VBOOT − VPHASE = 12V, VUGATE − VPHASE = 6V VBOOT − VPHASE = 12V, VUGATE − VPHASE = 1V Upper Gate Source IUGATE Upper Gate Sink RUGATE Lower Gate Source ILGATE VCC = 12V, VLGATE = 6V 0.6 1 -- A Lower Gate Sink RLGATE VCC = 12V, VLGATE = 1V -- 3 5 Ω Dead Time TDT -- -- 100 ns Protection FB Under-Voltage Trip Δ FBUVT FB Falling 70 75 80 % OC Current Source IOC VPHASE = 0V 35 40 45 μA Soft-Start Interval TSS -- 3.5 -- ms Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. Note 2. Devices are ESD sensitive. Handling precaution recommended. Note 3. The device is not guaranteed to function outside its operating conditions. Note 4. θJA is measured in the natural convection at T A = 25°C on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. DS9214-13 September 2007 www.richtek.com 5 RT9214 Typical Operating Characteristics Efficiency vs. Output Current 1 1 0.95 0.95 0.9 0.9 Efficiency(%) Efficiency(%) (VOUT = 2.5V, unless otherwise specified ) Efficiency vs. Output Current 0.85 0.8 0.75 0.7 0.85 0.8 0.75 0.7 0.65 0.65 VCC = 5V VIN = 5V 0.6 0 5 VCC = 12V VIN = 5V 0.6 0 5 10 15 20 25 Output Current (A) 25 Frequency vs. Temperature VCC = 12V VIN = 5V 330 0.808 0.806 0.804 0.802 310 290 270 0.8 250 0.798 -40 -25 -10 5 20 35 50 65 80 -40 95 110 125 -10 20 50 80 POR vs. Temperature 140 VCC Switching 4.75 Rising 4.5 110 Temperature (°C) Temperature (°C) POR Rising or Falling (V) 20 350 Frequency (kHz) Reference Voltage (V) 0.81 15 Output Current (A) Reference Voltage vs. Temperature 0.812 10 (100mV/Div) VOUT IOUT 4.25 (10A/Div) UGATE 4 Falling (20V/Div) V CC 3.75 VCC = 12Vto 5V IOUT= 10A VIN = 5V 3.5 -40 -10 20 50 80 110 140 (10V/Div) Time (10ms/Div) Temperature (°C) www.richtek.com 6 DS9214-13 September 2007 RT9214 Power On VCC Switching (100mV/Div) VOUT (500mV/Div) VOUT IOUT (10A/Div) UGATE (2A/Div) IOUT (20V/Div) V CC VCC = 5V to 12V IOUT= 10A, VIN = 5V (10V/Div) UGATE (10V/Div) Time (10ms/Div) Time (500us/Div) Power Off Dead Time (Rising) V CC VCC = VIN = 5V IOUT = 25A (10V/Div) VOUT UGATE (2V/Div) VIN PHASE (2V/Div) (5V/Div) UGATE LGATE (10V/Div) IOUT = 2A Time (5ms/Div) Time (25ns/Div) Dead Time (Falling) Transient Response (Rising) VCC = 12V VIN = 5V IOUT= 25A UGATE UGATE (10V/Div) VOUT (100mV/Div) PHASE (5V/Div) LGATE VCC = VIN = 12V IOUT= 0A to 15A IL (10A/Div) Time (10ns/Div) DS9214-13 September 2007 L = 2.2uH C = 2000uF Freq. = 1/20ms, SR = 2.5A/us Time (5us/Div) www.richtek.com 7 RT9214 Transient Response (Falling) L = 2.2uH C = 2000uF UGATE (10V/Div) VOUT (100mV/Div) IL (10A/Div) VCC = VIN = 12V IOUT= 15A to 0A Freq. = 1/20ms SR = 2.5A/us Time (25us/Div) www.richtek.com 8 DS9214-13 September 2007 RT9214 Application Information Inductor Selection The selection of output inductor is based on the considerations of efficiency, output power and operating frequency. Low inductance value has smaller size, but results in low efficiency, large ripple current and high output ripple voltage. Generally, an inductor that limits the ripple current (ΔIL) between 20% and 50% of output current is appropriate. Figure 1 shows the typical topology of synchronous step-down converter and its related waveforms. iS1 L iS2 VIN S2 VIN − VOUT = L V ΔIL D ; Δt = ; D = OUT Δt fs VIN L = (VIN − VOUT ) × VOUT VIN × fs × ΔIL (1) Where : VIN = Maximum input voltage VOUT = Output Voltage Δt = S1 turn on time IL + VL S1 According to Figure 1 the ripple current of inductor can be calculated as follows : + VOR VOC - + RL VOUT fS = Switching frequency D = Duty Cycle + + rC ΔIL = Inductor current ripple IOUT iC COUT - rC = Equivalent series resistor of output capacitor Output Capacitor The selection of output capacitor depends on the output ripple voltage requirement. Practically, the output ripple voltage is a function of both capacitance value and the equivalent series resistance (ESR) rC. Figure 2 shows the related waveforms of output capacitor. TS Vg1 TON TOFF Vg2 VIN - VOUT VL diL VIN-VOUT = L dt iL diL VOUT dt = L IOUT - VOUT TS iL iC ΔIL IL = IOUT iS1 1/2ΔIL 0 ΔIL VOC ΔVOC iS2 VOR ΔIL x rc 0 Figure 1. The waveforms of synchronous step-down converter DS9214-13 September 2007 t1 t2 Figure 2. The related waveforms of output capacitor www.richtek.com 9 RT9214 The AC impedance of output capacitor at operating frequency is quite smaller than the load impedance, so the ripple current (ΔIL) of the inductor current flows mainly ZOUT is the shut impedance at the output node to ground (see Figure 3 and Figure 4), through output capacitor. The output ripple voltage is described as : ΔVOUT = ΔVOR + ΔVOC 1 t2 ΔVOUT = ΔIL × rc + ∫ ic dt CO t1 1 VOUT 2 ΔVOUT = ΔIL × ΔIL × rc + (1− D)T S 8 COL C1 (2) C2 R1 (3) (4) where ΔVOR is caused by ESR and ΔVOC by capacitance. For electrolytic capacitor application, typically 90 to 95% of the output voltage ripple is contributed by the ESR of output capacitor. So Equation (4) could be simplified as : ΔVOUT = ΔIL x rc VOUT GM Figure 3. A Type 2 error-amplifier with shut network to ground + + EA+ EA- (5) Users could connect capacitors in parallel to get calculated ESR. - VOUT RO GM Figure 4. Equivalent circuit Pole and Zero : Input Capacitor The selection of input capacitor is mainly based on its maximum ripple current capability. The buck converter draws pulsewise current from the input capacitor during the on time of S1 as shown in Figure 1. The RMS value of ripple current flowing through the input capacitor is described as : Irms = IOUT D(1 − D) (A) FP = 1 1 ; FZ = 2π × R1C 2 2π × R1C1 We can see the open loop gain and the Figure 3 whole loop gain in Figure 5. (6) The input capacitor must be cable of handling this ripple current. Sometime, for higher efficiency the low ESR capacitor is necessarily. Gain (dB) Open Loop, Unloaded Gain A FZ The transconductance : dI GM = OUT dVm The mid-frequency gain : FP Gain = GMR1 PWM Loop Stability RT9214 is a voltage mode buck converter using the high gain error amplifier with transconductance (OTA, Operational Transconductance Amplifier). Closed Loop, Unloaded Gain 100 1000 10k B 100k Frequency (Hz) Figure 5. Gain with the Figure 2 circuit RT9214 internal compensation loop : GM = 0.2ms, R1=75kΩ, C1 = 2.5nF, C2 = 10pF dVOUT = dIOUT Z OUT = GMdVIN Z OUT dVOUT G= = GMZ OUT dVIN www.richtek.com 10 DS9214-13 September 2007 RT9214 OPS (Over Current Setting, VIN_POR and Shutdown) 1.OCP Sense the low-side MOSFET’ s RDS(ON) to set over-current trip point. Connecting a resistor (ROCSET) from this pin to the source of the upper MOSFET and the drain of the lower MOSFET sets the over-current trip point. ROCSET, an internal 40μA current source, and the lower MOSFET on resistance, RDS(ON), set the converter over-current trip point (IOCSET) according to the following equation : I OCSET = 40uA × R OCSET − 0.4V R DS(ON) of the lower MOSFET OPS pin function is similar to RC charging or discharging circuit, so the over-current trip point is very sensitive to parasitic capacitance (ex. shut-down MOSFET) and the duty ratio. Below Figures say those effect. And test conditions are Rocset = 15kΩ (over -current trip point = 20.6A), Low-side MOSFET is IR3707. OCP OCP UGATE (10V/Div) UGATE (10V/Div) IL (10A/Div) IL (10A/Div) OPS (200mV/Div) VIN = 5V, VCC = 12V VOUT = 1.5V VIN = 5V, VCC = 12V VOUT = 1.5V Time (5μs/Div) Time (5μs/Div) OCP OCP OPS (200mV/Div) UGATE (10V/Div) UGATE (10V/Div) IL (10A/Div) IL (10A/Div) VIN = 12V, VCC = 12V VOUT = 1.5V Time (2.5μs/Div) DS9214-13 September 2007 VIN = 12V, VCC = 12V VOUT = 1.5V Time (2.5μs/Div) www.richtek.com 11 RT9214 2. VIN_POR 1) Mode 1 (SS< Vramp_valley) UGATE will continuously generate a 10kHz clock with 1% duty cycle before VIN is ready. VIN is recognized ready by detecting VOPS crossing 1.5V four times (rising & falling). ROCSET must be kept lower than 37.5kΩ for large ROCSET will keep VOPS always higher than 1.5V. Figure 6 shows the detail actions of OCP and POR. It is highly recommend-ed that ROCSET be lower than 30kΩ. Initially the COMP stays in the positive saturation. When SS< VRAMP_Valley, there is no non-inverting input available 3V 40uA ROCSET OC - OPS 0.4V 10pF + + - VIN POR_H + PHASE_M - Cparasitic UGATE 1.5V PHASE Q2 DISABLE 1st 2nd 3rd 4th OPS waveform (1) Internal Counter will count (VOPS > 1.5V) four times (rising & falling) to recognize VIN is ready. (2) ROCSET can be set too large. Or can detect VIN is ready (counter = 1, not equal 4) Figure 6. OCP and VIN_POR actions 3. Shutdown Pulling low the OPS pin by a small single transistor can shutdown the RT9214 PWM controller as shown in typical application circuit. Soft Start A built-in soft-start is used to prevent surge current from power supply input during power on. The soft-start voltage is controlled by an internal digital counter. It clamps the ramping of reference voltage at the input of error amplifier and the pulse-width of the output driver slowly. The typical soft-start duration is 3ms. COMP to produce duty width. So there is no PWM signal and VOUT is zero. 2) Mode 2 (VRAMP_Valley< SS< Cross-over) When SS>VRAMP_Valley, SS takes over the non-inverting input and produce the PWM signal and the increasing duty width according to its magnitude above the ramp signal. The output follows the ramp signal, SS. However while VOUT increases, the difference between VOUT and SSE (SS − VGS) is reduced and COMP leaves the saturation and declines. The takeover of SS lasts until it meets the COMP. During this interval, since the feedback path is broken, the converter is operated in the open loop. 3) Mode3 ( Cross-over< SS < VGS + VREF) When the Comp takes over the non-inverting input for PWM Amplifier and when SSE (SS − VGS) < VREF, the output of the converter follows the ramp input, SSE (SS − VGS). Before the crossover, the output follows SS signal. And when Comp takes over SS, the output is expected to follow SSE (SS − VGS). Therefore the deviation of VGS is represented as the falling of VOUT for a short while. The COMP is observed to keep its decline when it passes the cross-over, which shortens the duty width and hence the falling of VOUT happens. Since there is a feedback loop for the error amplifier, the output’ s response to the ramp input, SSE (SS − VGS) is lower than that in Mode 2. 4) Mode 4 (SS > VGS + VREF) When SS > VGS + VREF, the output of the converter follows the desired VREF signal and the soft start is completed now. VRAMP_Valley Cross-over SS_Internal VCORE SSE_Internal www.richtek.com 12 DS9214-13 September 2007 RT9214 Under Voltage Protection The voltage at FB pin is monitored and protected against UV (under voltage). The UV threshold is the FB or FBL under 80%. UV detection has 15μs triggered delay. When OC is trigged, a hiccup restart sequence will be initialized, as shown in Figure 7 Only 4 times of trigger are allowed to latch off. Hiccup is disabled during soft-start interval, but UV_FB has some difference from OC, it will always trigger VIN power sensing after 4 times hiccup, as shown in Figure 8. SS Internal COUNT = 1 COUNT = 2 COUNT = 3 COUNT = 4 4V 2V 0V Inductor Current OVERLOAD APPLIED 0A T0 T1 T2 T3 T4 TIME Figure 7. UV and OC trigger hiccup mode Power Off UGATE FB There are two sets of critical components in a DC-DC converter using the RT9214. The switching power components are most critical because they switch large amounts of energy, and as such, they tend to generate equally large amounts of noise. The critical small signal components are those connected to sensitive nodes or those supplying critical bypass current. The power components and the PWM controller should be placed firstly. Place the input capacitors, especially the high-frequency ceramic decoupling capacitors, close to the power switches. Place the output inductor and output capacitors between the MOSFETs and the load. Also locate the PWM controller near by MOSFETs. A multi-layer printed circuit board is recommended. (20V/Div) UV (500mV/Div) VIN Power Sensing VOUT VIN (2V/Div) (2V/Div) IOUT = 2A Time (10ms/Div) Figure 8, UV_FB trigger VIN power sensing PWM Layout Considerations MOSFETs switch very fast and efficiently. The speed with which the current transitions from one device to another causes voltage spikes across the interconnecting impedances and parasitic circuit elements. The voltage spikes can degrade efficiency and radiate noise, that results in over-voltage stress on devices. Careful component DS9214-13 placement layout and printed circuit design can minimize the voltage spikes induced in the converter. Consider, as an example, the turn-off transition of the upper MOSFET prior to turn-off, the upper MOSFET was carrying the full load current. During turn-off, current stops flowing in the upper MOSFET and is picked up by the low side MOSFET or schottky diode. Any inductance in the switched current path generates a large voltage spike during the switching interval. Careful component selections, layout of the critical components, and use shorter and wider PCB traces help in minimizing the magnitude of voltage spikes. September 2007 Figure 9 shows the connections of the critical components in the converter. Note that the capacitors CIN and COUT each of them represents numerous physical capacitors. Use a dedicated grounding plane and use vias to ground all critical components to this layer. Apply another solid layer as a power plane and cut this plane into smaller islands of common voltage levels. The power plane should support the input power and output power nodes. Use copper filled polygons on the top and bottom circuit layers for the PHASE node, but it is not necessary to oversize this particular island. Since the PHASE node is subjected to very high dV/dt voltages, the stray capacitance formed between these island and the surrounding circuitry will tend to couple switching noise. Use the remaining printed circuit layers for small signal routing. The PCB traces between the PWM controller and the gate of MOSFET and also the traces connecting source of MOSFETs should be sized to carry 2A peak currents. www.richtek.com 13 RT9214 IQ1 IL VOUT 5V/12V IQ2 + + + Q1 LOAD Q2 GND GND LGATE VCC RT9214 UGATE FB Figure 9. The connections of the critical components in the converter Below PCB gerber files are our test board for your reference : www.richtek.com 14 DS9214-13 September 2007 RT9214 According to our test experience, you must still notice two items to avoid noise coupling : 1.The ground plane should not be separated. 2.VCC rail adding the LC filter is recommended. DS9214-13 September 2007 www.richtek.com 15 RT9214 Outline Dimension H A M J B F C I D Dimensions In Millimeters Dimensions In Inches Symbol Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 3.988 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.508 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.050 0.254 0.002 0.010 J 5.791 6.200 0.228 0.244 M 0.400 1.270 0.016 0.050 8-Lead SOP Plastic Package www.richtek.com 16 DS9214-13 September 2007 RT9214 H A M EXPOSED THERMAL PAD (Bottom of Package) Y J X B F C I D Dimensions In Millimeters Symbol Dimensions In Inches Min Max Min Max A 4.801 5.004 0.189 0.197 B 3.810 4.000 0.150 0.157 C 1.346 1.753 0.053 0.069 D 0.330 0.510 0.013 0.020 F 1.194 1.346 0.047 0.053 H 0.170 0.254 0.007 0.010 I 0.000 0.152 0.000 0.006 J 5.791 6.200 0.228 0.244 M 0.406 1.270 0.016 0.050 X 2.000 2.300 0.079 0.091 Y 2.000 2.300 0.079 0.091 X 2.100 2.500 0.083 0.098 Y 3.000 3.500 0.118 0.138 Option 1 Option 2 8-Lead SOP (Exposed Pad) Plastic Package Richtek Technology Corporation Richtek Technology Corporation Headquarter Taipei Office (Marketing) 5F, No. 20, Taiyuen Street, Chupei City 8F, No. 137, Lane 235, Paochiao Road, Hsintien City Hsinchu, Taiwan, R.O.C. Taipei County, Taiwan, R.O.C. Tel: (8863)5526789 Fax: (8863)5526611 Tel: (8862)89191466 Fax: (8862)89191465 Email: [email protected] DS9214-13 September 2007 www.richtek.com 17