ON Semiconductor JFET - VHF/UHF Amplifier Transistor MMBFJ309LT1 MMBFJ310LT1 N–Channel 3 MAXIMUM RATINGS 1 Rating Symbol Value Unit Drain–Source Voltage VDS 25 Vdc Gate–Source Voltage VGS 25 Vdc IG 10 mAdc Symbol Max Unit PD 225 mW 1.8 mW/°C RJA 556 °C/W TJ, Tstg –55 to +150 °C Gate Current 2 CASE 318–08, STYLE 10 SOT–23 (TO–236AB) 2 SOURCE THERMAL CHARACTERISTICS Characteristic Total Device Dissipation FR–5 Board(1) TA = 25°C Derate above 25°C Thermal Resistance, Junction to Ambient Junction and Storage Temperature 3 GATE 1 DRAIN DEVICE MARKING MMBFJ309LT1 = 6U; MMBFJ310LT1 = 6T ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Min Typ V(BR)GSS –25 – – Vdc IGSS – – – – –1.0 –1.0 nAdc µAdc MMBFJ309 MMBFJ310 VGS(off) –1.0 –2.0 – – –4.0 –6.5 Vdc MMBFJ309 MMBFJ310 IDSS 12 24 – – 30 60 mAdc VGS(f) – – 1.0 Vdc Forward Transfer Admittance (VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz) |Yfs| 8.0 – 18 mmhos Output Admittance (VDS = 10 Vdc, ID = 10 mAdc, f = 1.0 kHz) |yos| – – 250 µmhos Input Capacitance (VGS = –10 Vdc, VDS = 0 Vdc, f = 1.0 MHz) Ciss – – 5.0 pF Reverse Transfer Capacitance (VGS = –10 Vdc, VDS = 0 Vdc, f = 1.0 MHz) Crss – – 2.5 pF en – 10 – nV Hz Characteristic Max Unit OFF CHARACTERISTICS Gate–Source Breakdown Voltage (IG = –1.0 µAdc, VDS = 0) Gate Reverse Current (VGS = –15 Vdc) Gate Reverse Current (VGS = –15 Vdc, TA = 125°C) Gate Source Cutoff Voltage (VDS = 10 Vdc, ID = 1.0 nAdc) ON CHARACTERISTICS Zero–Gate–Voltage Drain Current (VDS = 10 Vdc, VGS = 0) Gate–Source Forward Voltage (IG = 1.0 mAdc, VDS = 0) SMALL–SIGNAL CHARACTERISTICS Equivalent Short–Circuit Input Noise Voltage (VDS = 10 Vdc, ID = 10 mAdc, f = 100 Hz) 1. FR–5 = 1.0 0.75 0.062 in. Semiconductor Components Industries, LLC, 2001 November, 2001 – Rev. 2 1 Publication Order Number: MMBFJ309LT1/D 70 70 I D , DRAIN CURRENT (mA) 60 VDS = 10 V 50 50 +25°C IDSS +25°C 40 60 TA = -55°C 40 30 30 +150°C 20 20 +25°C -55°C 10 -5.0 10 +150°C -1.0 -4.0 -3.0 -2.0 ID - VGS, GATE-SOURCE VOLTAGE (VOLTS) IDSS - VGS, GATE-SOURCE CUTOFF VOLTAGE (VOLTS) 0 IDSS, SATURATION DRAIN CURRENT (mA) MMBFJ309LT1 MMBFJ310LT1 0 Figure 1. Drain Current and Transfer Characteristics versus Gate–Source Voltage Yfs 10 k 100 1.0 k Yos 100 0.01 VGS(off) = -2.3 V = VGS(off) = -5.7 V = 10 1.0 0.1 0.2 0.3 0.5 1.0 2.0 3.0 5.0 10 20 30 50 100 ID, DRAIN CURRENT (mA) RDS 7.0 72 Cgs 4.0 48 24 Cgd 1.0 0 10 9.0 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 VGS, GATE SOURCE VOLTAGE (VOLTS) Figure 2. Common–Source Output Admittance and Forward Transconductance versus Drain Current Figure 3. On Resistance and Junction Capacitance versus Gate–Source Voltage http://onsemi.com 2 96 0 0 R DS , ON RESISTANCE (OHMS) Yfs 120 10 1.0 k Yos, OUTPUT ADMITTANCE (µ mhos) CAPACITANCE (pF) Yfs , FORWARD TRANSCONDUCTANCE (µmhos) 100 k MMBFJ309LT1 MMBFJ310LT1 24 VDS = 10 V ID = 10 mA TA = 25°C 0 100 1.2 0.73 0.33 0.67 0.27 200 300 500 f, FREQUENCY (MHz) 700 θ21, θ11 180° 50° 30° 150° 20° 140° 10° 0.036 0.96 0.024 0.94 1000 -40° 200 300 500 f, FREQUENCY (MHz) 700 1000 θ11, θ12 -20° 120° 86° -40° 100° 85° -60° 80° 84° -80° 60° 83° -100° 40° 82° -120° 20° 100 θ21, θ22 0 θ11 θ21 θ22 -20° -60° -80° -40° -100° 130° 0° 100 -120° θ12 θ11 -140° VDS = 10 V ID = 10 mA TA = 25°C 200 300 500 f, FREQUENCY (MHz) -160° -180° 700 -200° 1000 0.90 Figure 5. Common–Gate S Parameter Magnitude versus Frequency -20° θ21 0.012 0.92 0.55 0.15 100 θ12, θ22 -20° 87° θ22 160° VDS = 10 V ID = 10 mA TA = 25°C S12 Y12 40° 0.048 0.98 0.61 0.21 0.6 Figure 4. Common–Gate Y Parameter Magnitude versus Frequency 170° S22 S11 Y22 6.0 0.79 0.39 1.8 Y21 12 2.4 |S12|, |S22| 0.060 1.00 S21 Y11 18 3.0 Y12 (mmhos) |Y11|, |Y21 |, |Y22 | (mmhos) 30 |S21|, |S11| 0.85 0.45 Figure 6. Common–Gate Y Parameter Phase–Angle versus Frequency θ21 θ12 VDS = 10 V ID = 10 mA TA = 25°C 200 300 500 f, FREQUENCY (MHz) θ11 700 -60° -80° -100° 1000 Figure 7. S Parameter Phase–Angle versus Frequency http://onsemi.com 3 MMBFJ309LT1 MMBFJ310LT1 INFORMATION FOR USING THE SOT–23 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process. 0.037 0.95 0.037 0.95 0.079 2.0 0.035 0.9 0.031 0.8 inches mm SOT–23 SOT–23 POWER DISSIPATION SOLDERING PRECAUTIONS The power dissipation of the SOT–23 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SOT–23 package, PD can be calculated as follows: PD = The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference shall be a maximum of 10°C. • The soldering temperature and time shall not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient shall be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, one can calculate the power dissipation of the device which in this case is 225 milliwatts. PD = 150°C – 25°C 556°C/W = 225 milliwatts The 556°C/W for the SOT–23 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 225 milliwatts. There are other alternatives to achieving higher power dissipation from the SOT–23 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. http://onsemi.com 4 MMBFJ309LT1 MMBFJ310LT1 PACKAGE DIMENSIONS SOT–23 (TO–236AB) CASE 318–08 ISSUE AF NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 3 1 V B S 2 G C D H K J STYLE 10: PIN 1. DRAIN 2. SOURCE 3. GATE http://onsemi.com 5 DIM A B C D G H J K L S V INCHES MIN MAX 0.1102 0.1197 0.0472 0.0551 0.0350 0.0440 0.0150 0.0200 0.0701 0.0807 0.0005 0.0040 0.0034 0.0070 0.0140 0.0285 0.0350 0.0401 0.0830 0.1039 0.0177 0.0236 MILLIMETERS MIN MAX 2.80 3.04 1.20 1.40 0.89 1.11 0.37 0.50 1.78 2.04 0.013 0.100 0.085 0.177 0.35 0.69 0.89 1.02 2.10 2.64 0.45 0.60 MMBFJ309LT1 MMBFJ310LT1 Notes http://onsemi.com 6 MMBFJ309LT1 MMBFJ310LT1 Notes http://onsemi.com 7 MMBFJ309LT1 MMBFJ310LT1 SENSEFET is a trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. 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