SCAS063A − D3257, JANUARY 1989 − REVISED APRIL 1993
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3-State Outputs Interface Directly With
System Bus
Flow-Through Architecture to Optimize
PCB Layout
Center-Pin VCC and GND Configurations to
Minimize High-Speed Switching Noise
EPICt (Enhanced-Performance Implanted
CMOS) 1-mm Process
500-mA Typical Latch-Up Immunity
at 125°C
Provides Bus Interface from Multiple
Sources in High-Performance Systems
Package Options Include Plastic Small
Outline Packages, and Standard Plastic
300-mil DIPs
DW OR N PACKAGE
(TOP VIEW)
A/B
1Y
2Y
GND
GND
GND
GND
3Y
4Y
G
G
This device is designed to multiplex signals from
4-bit data sources to 4-output data lines in
bus-organized systems. The 3-state outputs will
not load the data lines when the output control pin
(G) is at a high logic level.
A/B
1A
1B
2A
The 74AC11258 is characterized for operation
from − 40°C to 85°C.
2B
3A
FUNCTION TABLE
3B
INPUTS
A
B
H
X
X
X
Z
L
L
L
X
H
L
L
H
X
L
L
H
X
L
H
L
H
X
H
L
DATA
4A
OUTPUT
Y
SELECT
A/B
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
1A
1B
2A
2B
VCC
VCC
3A
3B
4A
4B
logic symbol †
description
OUTPUT
CONTROL
G
1
4B
10
1
20
19
18
17
EN
G1
1
MUX
2
1
3
1Y
2Y
14
13
12
11
8
9
3Y
4Y
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
EPIC is a trademark of Texas Instruments Incorporated.
Copyright 1993, Texas Instruments Incorporated
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#".)(&' ("!"#$ &" '+*(!(%&"' +*# &0* &*#$' "! *1%' '&#)$*&'
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1
SCAS063A − D3257, JANUARY 1989 − REVISED APRIL 1993
logic diagram (positive logic)
10
G
A/B
1A
1B
2A
2B
3A
3B
4A
4B
1
20
2
1Y
19
18
3
2Y
17
14
8
3Y
13
12
9
4Y
11
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to 7 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to VCC + 0.5 V
Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 50 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 100 mA
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . − 65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2
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SCAS063A − D3257, JANUARY 1989 − REVISED APRIL 1993
recommended operating conditions
VCC
Supply voltage
VIH
VCC = 3 V
VCC = 4.5 V
High-level input voltage
5
5.5
0.9
1.35
VCC
VCC
0
Dt/Dv
Input transition rise or fall rate
TA
Operating free-air temperature
V
1.65
VCC = 3 V
VCC = 4.5 V
Low-level output current
V
V
0
High-level output current
UNIT
3.85
Output voltage
IOL
3
3.15
Input voltage
IOH
MAX
VCC = 4.5 V
VCC = 5.5 V
Low-level input voltage
VI
VO
NOM
2.1
VCC = 5.5 V
VCC = 3 V
VIL
MIN
V
V
−4
− 24
VCC = 5.5 V
VCC = 3 V
−24
VCC = 4.5 V
VCC = 5.5 V
24
mA
12
mA
24
0
10
ns /V
− 40
85
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
IOH = − 50 mA
VOH
TA = 25°C
MIN
TYP
MAX
MIN
3V
2.9
2.9
4.5 V
4.4
4.4
MAX
5.5 V
5.4
5.4
3V
2.58
2.48
4.5 V
3.94
3.8
IOH = − 24 mA
5.5 V
4.94
IOH = − 75 mA{
5.5 V
3V
0.1
0.1
IOL = 50 mA
4.5 V
0.1
0.1
IOH = − 4 mA
UNIT
V
4.8
3.85
5.5 V
0.1
0.1
3V
0.36
0.44
4.5 V
0.36
0.44
IOL = 24 mA
5.5 V
0.36
0.44
IOL = 75 mA{
5.5 V
IOZ
II
VO = VCC or GND
VI = VCC or GND
5.5 V
± 0.5
±5
mA
5.5 V
± 0.1
±1
mA
ICC
Ci
VI = VCC or GND,
VI = VCC or GND
5.5 V
8
80
mA
VOL
IOL = 12 mA
IO = 0
5V
1.65
4
Co
VO = VCC or GND
5V
10
† Not more than one output should be tested at a time, and the duration of the test should not exceed 10 ms.
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•
V
pF
pF
3
SCAS063A − D3257, JANUARY 1989 − REVISED APRIL 1993
switching characteristics over operating free-air temperature range, VCC = 3.3 V ± 0.3 V (unless
otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
tPLH
tPHL
A/B
Any Y
tPZH
tPZL
G
Any Y
tPHZ
tPLZ
G
Any Y
MIN
TA = 25°C
TYP
MAX
MIN
MAX
1.5
5.3
7
1.5
7.7
1.5
6
7.9
1.5
9.2
1.5
5.6
7.9
1.5
8.7
1.5
6.7
9.1
1.5
10.1
1.5
5.3
7.1
1.5
7.7
1.5
6.8
9.1
1.5
10.2
1.5
5.4
6.9
1.5
7.4
1.5
6
7.8
1.5
8.4
UNIT
ns
ns
ns
ns
switching characteristics over operating free-air temperature range, VCC = 5 V ± 0.5 V (unless
otherwise noted)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
Y
tPLH
tPHL
A/B
Any Y
tPZH
tPZL
G
Any Y
tPHZ
tPLZ
G
Any Y
TA = 25°C
MIN
TYP
MAX
MIN
MAX
1.5
3.3
5
1.5
5.4
1.5
4
6.1
1.5
6.8
1.5
3.6
5.8
1.5
6.3
1.5
4.4
6.7
1.5
7.5
1.5
3.5
5.3
1.5
5.7
1.5
4.5
6.8
1.5
7.5
1.5
4.5
6.1
1.5
6.5
1.5
4.7
6.4
1.5
6.9
UNIT
ns
ns
ns
ns
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
Outputs enabled
Cpd
4
Power dissipation capacitance
Outputs disabled
•
UNIT
33
CL = 50 pF,
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TYP
f = 1 MHz
13
pF
SCAS063A − D3257, JANUARY 1989 − REVISED APRIL 1993
PARAMETER MEASUREMENT INFORMATION
2 X VCC
500 Ω
From Output
Under Test
S1
S1
OPEN
2 x VCC
GND
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
GND
500 Ω
CL = 50 pF
(see Note A)
LOAD CIRCUIT
VCC
Input
(see Note C)
1.5 V
1.5 V
0
VOH
50%
50%
VOL
tPLH
tPHL
Out-of-Phase
Output
1.5 V
VOH
50%
50%
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
1.5 V
0
tPZL
tPLZ
tPHL
tPLH
In-Phase
Output
VCC
Output
Control
(Low-Level
Enabling)
≈ VCC
Output
Waveform 1
S1 at 2 x VCC
(see Note B)
50%
20%
VOL
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
tPHZ
50%
80%
VOH
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform
2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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5
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