Cascadable Silicon Bipolar MMIC␣ Amplifier Technical Data MSA-0100 Features • Cascadable 50 Ω Gain Block • 3 dB Bandwidth: DC to 1.3 GHz • High Gain: 18.5 dB Typical at 0.5 GHz • Unconditionally Stable (k>1) Description The MSA-0100 is a high performance silicon bipolar Monolithic Microwave Integrated Circuit (MMIC) chip. This MMIC is designed for use as a general purpose 50 Ω gain block. Typical applications include narrow and broad band IF and RF amplifiers in commercial, industrial and military applications. The MSA-series is fabricated using HP’s 10 GHz fT, 25␣ GHz f MAX, silicon bipolar MMIC process which uses nitride self-alignment, ion implantation, and gold metallization to achieve excellent performance, uniformity and reliability. The use of an external bias resistor for temperature and current stability also allows bias flexibility. The recommended assembly procedure is gold-eutectic die attach at 400°C and either wedge or ball bonding using 0.7 mil gold wire.[1] See APPLICATIONS section, “Chip Use”. Typical Biasing Configuration R bias VCC > 7 V RFC (Optional) C block IN C block OUT MSA Vd = 5 V 5965-9689E 6-242 Chip Outline[1] Note: 1. This chip contains additional biasing options. The performance specified applies only to the bias option whose bond pads are indicated on the chip outline. Refer to the APPLICATIONS section “Silicon MMIC Chip Use” for additional information. MSA-0100 Absolute Maximum Ratings Absolute Maximum[1] Parameter Device Current Power Dissipation[2,3] RF Input Power Junction Temperature Storage Temperature 40 mA 200 mW +20 dBm 200°C –65 to 200°C Thermal Resistance[2,4]: θjc = 45°C/W Notes: 1. Permanent damage may occur if any of these limits are exceeded. 2. TMounting Surface (TMS) = 25°C. 3. Derate at 22.2 mW/°C for TMS␣ >␣ 191 °C. 4. The small spot size of this technique results in a higher, though more accurate determination of θjc than do alternate methods. See MEASUREMENTS section “Thermal Resistance” for more information. Electrical Specifications[1], TA = 25°C Symbol Parameters and Test Conditions[2]: Id = 17 mA, ZO = 50 Ω GP Power Gain (|S21| 2) f = 0.1 GHz ∆GP Gain Flatness f = 0.1 to 0.7 GHz f3 dB 3 dB Bandwidth VSWR Units Min. Typ. dB 19.0 dB ± 0.6 GHz 1.3 Input VSWR f = 0.1 to 3.0 GHz 1.3:1 Output VSWR f = 0.1 to 3.0 GHz 1.3:1 NF 50 Ω Noise Figure f = 0.5 GHz dB 5.5 P1 dB Output Power at 1 dB Gain Compression f = 0.5 GHz dBm 1.5 IP3 Third Order Intercept Point f = 0.5 GHz dBm 14.0 tD Group Delay f = 0.5 GHz psec 150 Vd Device Voltage dV/dT Device Voltage Temperature Coefficient V mV/°C 4.5 5.0 Max. 5.5 –9.0 Notes: 1. The recommended operating current range for this device is 13 to 25 mA. Typical performance as a function of current is on the following page. 2. RF performance of the chip is determined by packaging and testing 10 devices per wafer in a dual ground configuration. Part Number Ordering Information Part Number MSA-0100-GP4 Devices Per Tray 100 6-243 MSA-0100 Typical Scattering Parameters[1] (ZO = 50 Ω, TA = 25°C, Id = 17 mA) S11 Freq. GHz Mag 0.1 0.2 0.3 0.4 0.5 0.6 0.8 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 .08 .07 .07 .06 .06 .05 .04 .04 .08 .12 .15 .19 .25 .27 .28 .28 S21 S12 S22 Ang dB Mag Ang dB Mag Ang Mag Ang 171 161 152 143 133 115 84 3 –39 –76 –102 –122 –137 –147 –157 –171 19.0 18.9 18.8 18.6 18.5 18.2 17.7 17.1 15.5 13.7 12.2 10.8 9.4 8.2 7.0 6.0 8.91 8.82 8.72 8.56 8.37 8.15 7.68 7.17 5.95 4.86 4.09 3.47 2.96 2.56 2.24 2.00 174 169 163 156 151 146 136 126 106 90 82 71 60 51 42 35 –22.7 –22.5 –22.3 –22.4 –22.1 –21.9 –21.3 –20.3 –19.3 –17.9 –16.9 –16.4 –15.6 –15.2 –14.8 –14.4 .073 .075 .077 .076 .079 .080 .086 .096 .109 .127 .142 .151 .165 .173 .182 .190 2 6 9 12 14 19 22 26 32 32 36 36 34 32 29 28 .10 .11 .10 .11 .11 .12 .12 .12 .10 .08 .06 .06 .07 .10 .13 .16 –11 –24 –35 –44 –53 –60 –75 –88 –107 –128 –130 –125 –107 –86 –80 –77 Note: 1. S-parameters are de-embedded from 70 mil package measured data using the package model found in the DEVICE MODELS section. MSA-0100 Typical Performance, TA = 25°C (unless otherwise noted) 21 0.1 GHz 0.5 GHz 18 20 Gain Flat to DC 5 0 0.1 0.3 0.5 1.0 3.0 6.0 10 15 20 FREQUENCY (GHz) 25 30 I d (mA) Figure 1. Typical Power Gain vs. Frequency, TA = 25°C, Id = 17 mA. 7.0 I d = 13 mA I d = 17 mA I d = 20 mA I d = 20 mA 4 6.5 I d = 17 mA NF (dB) 2 6.0 I d = 13 mA 5.5 –2 5.0 0.2 0.3 0.5 1.0 2.0 4.0 4 0.1 0.2 0.3 0.5 1.0 2.0 FREQUENCY (GHz) FREQUENCY (GHz) Figure 4. Output Power at 1 dB Gain Compression vs. Frequency. Figure 5. Noise Figure vs. Frequency. 6-244 P1 dB 2 0 –2 –55 –25 +25 +85 +125 TEMPERATURE (°C) Figure 2. Power Gain vs. Current. 6 6 4 3 0 6 10 Figure 3. Output Power at 1 dB Gain Compression, NF and Power Gain vs. Mounting Surface Temperature, f = 0.5 GHz, Id = 17 mA. NF (dB) 9 8 NF 2.0 GHz P1 dB (dBm) G p (dB) Gp (dB) GP 8 15 6 P1 dB (dBm) 18 1.0 GHz 12 –4 0.1 20 16 15 0 G p (dB) 25 MSA-0100 Chip Dimensions NOT APPLICABLE INPUT 394 µm 15.5 mil GROUND OPTIONAL OUTPUT[1] 394 µm 15.5 mil Chip thickness is 114 µm/4.5 mil. Bond Pads are 41 µm/1.6 mil typical on each side. Note 1: Output contact is made by die attaching the backside of the die. 6-245